diff options
| author | Leendert van Doorn <leendert@paramecium.org> | 2016-03-24 15:30:06 -0500 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2016-03-25 07:17:53 +0100 |
| commit | f0bbcdf80df932cb72aae4707ad4274fdfcc5726 (patch) | |
| tree | 7b3c6a4c684fbc28d47850b33d55ad7e4956a5de /ArmPkg | |
| parent | 91673dfdfe78906023f07e585002689e8baf654e (diff) | |
| download | edk2-platforms-f0bbcdf80df932cb72aae4707ad4274fdfcc5726.tar.xz | |
ArmPkg|EmbeddedPkg: make PcdCpuVectorBaseAddress 64 bits wide
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leo Duran <leo.duran@amd.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'ArmPkg')
| -rw-r--r-- | ArmPkg/ArmPkg.dec | 4 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index ff4531e441..e903066538 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -60,7 +60,7 @@ # On ARM Architecture with the Security Extension, the address for the
# Vector Table can be mapped anywhere in the memory map. It means we can
# point the Exception Vector Table to its location in CpuDxe.
- # By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress)
+ # By default we copy the Vector Table at PcdGet64(PcdCpuVectorBaseAddress)
gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
# Set this PCD to TRUE if the Exception Vector is changed to add debugger support before
# it has been configured by the CPU DXE
@@ -90,7 +90,7 @@ # This PCD will free the unallocated buffers if their size reach this threshold.
# We set the default value to 512MB.
gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004
gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
#
diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c index 0cf0766b9c..e8ea1f159d 100644 --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c +++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c @@ -103,7 +103,7 @@ InitializeCpuExceptionHandlers( // if we are requested to copy exceptin handlers to another location
if (gArmRelocateVectorTable) {
- VectorBase = PcdGet32(PcdCpuVectorBaseAddress);
+ VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
Status = CopyExceptionHandlers(VectorBase);
}
@@ -118,7 +118,7 @@ InitializeCpuExceptionHandlers( // for encapsulated FVs.
ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
- // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector
+ // We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
// Base Address to point into CpuDxe code.
VectorBase = (UINTN)ExceptionHandlersStart;
|