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| author | Olivier Martin <olivier.martin@arm.com> | 2013-09-23 09:42:05 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-09-23 09:42:05 +0000 |
| commit | 433a49a0949bef6c2d526cb9fb80fb0a443c236f (patch) | |
| tree | d6225ffbe45bc1faf09dd995e69a917e4f9cc962 /ArmPkg | |
| parent | cc271ec31186ebd43ba904451e5a33df33b7f132 (diff) | |
| download | edk2-platforms-433a49a0949bef6c2d526cb9fb80fb0a443c236f.tar.xz | |
ArmPkg/ArmLib: Revert change 'Fixed field shifting in CLIDR_EL1 (AArch64)'
The shift by 1 on the left was expected. It eases the access to CSSELR and set/way operations
where the cache level field is at the BIT1 position.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14704 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg')
| -rw-r--r-- | ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index 27c1d465fd..29251c9961 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -320,7 +320,8 @@ ASM_PFX(AArch64AllDataCachesOperation): mov x1, x0 // Save Function call in x1
mrs x6, clidr_el1 // Read EL1 CLIDR
and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC)
- lsr x3, x3, #24 // Left align cache level value
+ lsr x3, x3, #23 // Left align cache level value - the level is shifted by 1 to the
+ // right to ease the access to CSSELR and the Set/Way operation.
cbz x3, L_Finished // No need to clean if LoC is 0
mov x10, #0 // Start clean at cache level 0
b Loop1
@@ -332,7 +333,8 @@ ASM_PFX(AArch64PerformPoUDataCacheOperation): mov x1, x0 // Save Function call in x1
mrs x6, clidr_el1 // Read EL1 CLIDR
and x3, x6, #0x38000000 // Mask out all but Point of Unification (PoU)
- lsr x3, x3, #27 // Left align cache level value
+ lsr x3, x3, #26 // Left align cache level value - the level is shifted by 1 to the
+ // right to ease the access to CSSELR and the Set/Way operation.
cbz x3, L_Finished // No need to clean if LoC is 0
mov x10, #0 // Start clean at cache level 0
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