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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2013-05-10 12:41:27 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2013-05-10 12:41:27 +0000
commitbebda7ceec3d3024c76b3c2ed0c9b4e502a13d61 (patch)
tree9c2d34dc7e57c2c52224c2990946778d955359fe /ArmPkg
parentbc7b889a033a2617b650fbb5596d4f02530090bd (diff)
downloadedk2-platforms-bebda7ceec3d3024c76b3c2ed0c9b4e502a13d61.tar.xz
ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()
Checking if a core if the primary/boot core used to be done with the macro IS_PRIMARY_CORE(). Some platforms exposes configuration registers to change the primary core. Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows some flexibility in the way to check the primary core. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg')
-rw-r--r--ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c2
-rw-r--r--ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf5
-rw-r--r--ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c3
-rw-r--r--ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf9
-rw-r--r--ArmPkg/Drivers/PL390Gic/PL390GicSec.c5
-rw-r--r--ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf6
-rw-r--r--ArmPkg/Include/AsmMacroIoLib.h22
-rw-r--r--ArmPkg/Include/AsmMacroIoLib.inc4
-rw-r--r--ArmPkg/Include/Library/ArmLib.h1
9 files changed, 31 insertions, 26 deletions
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c
index 95ab073e18..b15597893a 100644
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c
@@ -55,7 +55,7 @@ ArmCpuSetupSmpNonSecure (
)
{
/*// Make the SCU accessible in Non Secure world
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
ScuBase = ArmGetScuBaseAddress();
// Allow NS access to SCU register
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
index bcf7f6bfba..3ddd4c5704 100644
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
@@ -31,10 +31,5 @@
[Sources.common]
ArmCortexA15Lib.c
-[FeaturePcd]
-
[FixedPcd]
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c
index 8d9530cee2..4fc6a08b9a 100644
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c
@@ -15,6 +15,7 @@
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/ArmCpuLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
@@ -64,7 +65,7 @@ ArmCpuSetupSmpNonSecure (
INTN ScuBase;
// Make the SCU accessible in Non Secure world
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
ScuBase = ArmGetScuBaseAddress();
// Allow NS access to SCU register
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf
index 866736f6ff..a84501dea4 100644
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf
@@ -1,5 +1,5 @@
#/* @file
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -22,9 +22,11 @@
[Packages]
MdePkg/MdePkg.dec
ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
ArmLib
+ ArmPlatformLib
IoLib
PcdLib
@@ -33,8 +35,3 @@
ArmCortexA9Helper.asm | RVCT
ArmCortexA9Helper.S | GCC
-[FeaturePcd]
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 6244575772..bae76e441b 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -14,6 +14,7 @@
#include <Base.h>
#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
@@ -51,7 +52,7 @@ ArmGicSetupNonSecure (
}
// Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
// Ensure all GIC interrupts are Non-Secure
for (Index = 0; Index < (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32); Index++) {
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf b/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
index 73faa39b66..205e503427 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
@@ -25,14 +25,14 @@
[Packages]
ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
[LibraryClasses]
ArmLib
+ ArmPlatformLib
DebugLib
IoLib
PcdLib
-[FixedPcd.common]
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
index c8692fcfd7..c507329741 100644
--- a/ArmPkg/Include/AsmMacroIoLib.h
+++ b/ArmPkg/Include/AsmMacroIoLib.h
@@ -122,9 +122,12 @@
// Convert the (ClusterId,CoreId) into a Core Position
// We assume there are 4 cores per cluster
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
- lsr Pos, MpId, #6 ; \
- and Tmp, MpId, #3 ; \
+// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
+#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
+ ldr Tmp, =0xFFFF \
+ and MpId, Tmp \
+ lsr Pos, MpId, #6 ; \
+ and Tmp, MpId, #3 ; \
add Pos, Pos, Tmp
// Reserve a region at the top of the Primary Core stack
@@ -207,10 +210,15 @@ _InitializePrimaryStackEnd:
#define LoadConstantToReg(Data, Reg) \
ldr Reg, =Data
-
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
- lsr Pos, MpId, #6 ; \
- and Tmp, MpId, #3 ; \
+
+// Convert the (ClusterId,CoreId) into a Core Position
+// We assume there are 4 cores per cluster
+// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
+#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
+ ldr Tmp, =0xFFFF ; \
+ and MpId, Tmp ; \
+ lsr Pos, MpId, #6 ; \
+ and Tmp, MpId, #3 ; \
add Pos, Pos, Tmp
#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
index 1ca99fdd1d..5796adcb12 100644
--- a/ArmPkg/Include/AsmMacroIoLib.inc
+++ b/ArmPkg/Include/AsmMacroIoLib.inc
@@ -82,6 +82,10 @@
MACRO
GetCorePositionFromMpId $Pos, $MpId, $Tmp
+ ;Note: The ARM macro does not support the pre-processing. 0xFF and (0xFF << 8) are the values of
+ ; ARM_CORE_MASK and ARM_CLUSTER_MASK
+ mov $Tmp, #(0xFF :OR: (0xFF << 8))
+ and $MpId, $Tmp
lsr $Pos, $MpId, #6
and $Tmp, $MpId, #3
add $Pos, $Pos, $Tmp
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index b12be1424e..75f7755362 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -112,7 +112,6 @@ typedef enum {
//
// ARM MP Core IDs
//
-#define IS_PRIMARY_CORE(MpId) (((MpId) & PcdGet32(PcdArmPrimaryCoreMask)) == PcdGet32(PcdArmPrimaryCore))
#define ARM_CORE_MASK 0xFF
#define ARM_CLUSTER_MASK (0xFF << 8)
#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)