diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-12-22 18:10:17 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2016-12-26 19:14:55 +0800 |
| commit | 7809daf1046ca96896130038402054a8ace671e7 (patch) | |
| tree | 426ea4f568c618e0b0ddec0d11e6ad6fe5ff33ae /ArmPlatformPkg/ArmJunoPkg | |
| parent | 496195960952f27f4d3e74761fbb692bd2333fc2 (diff) | |
| download | edk2-platforms-7809daf1046ca96896130038402054a8ace671e7.tar.xz | |
ArmPlatformPkg: Remove unused Package
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'ArmPlatformPkg/ArmJunoPkg')
33 files changed, 0 insertions, 6600 deletions
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl deleted file mode 100644 index c6d5a9a7de..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl +++ /dev/null @@ -1,176 +0,0 @@ -/** @file - Differentiated System Description Table Fields (SSDT) - - Copyright (c) 2014-2015, ARM Ltd. All rights reserved.<BR> - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "ArmPlatform.h" - -/* - See Reference [1] 6.2.12 - "There are two ways that _PRT can be used. ... - In the second model, the PCI interrupts are hardwired to specific interrupt - inputs on the interrupt controller and are not configurable. In this case, - the Source field in _PRT does not reference a device, but instead contains - the value zero, and the Source Index field contains the global system - interrupt to which the PCI interrupt is hardwired." -*/ -#define PRT_ENTRY(Address, Pin, Interrupt) \ - Package (4) { \ - Address, /* uses the same format as _ADR */ \ - Pin, /* The PCI pin number of the device (0-INTA, 1-INTB, 2-INTC, 3-INTD). */ \ - Zero, /* allocated from the global interrupt pool. */ \ - Interrupt /* global system interrupt number */ \ - } - -/* - See Reference [1] 6.1.1 - "High word–Device #, Low word–Function #. (for example, device 3, function 2 is - 0x00030002). To refer to all the functions on a device #, use a function number of FFFF)." -*/ -#define ROOT_PRT_ENTRY(Pin, Interrupt) PRT_ENTRY(0x0000FFFF, Pin, Interrupt) - // Device 0 for Bridge. - - -DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) { - Scope(_SB) { - // - // PCI Root Complex - // - Device(PCI0) - { - Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge - Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge - Name(_SEG, Zero) // PCI Segment Group number - Name(_BBN, Zero) // PCI Base Bus Number - - // Root Complex 0 - Device (RP0) { - Name(_ADR, 0xF0000000) // Dev 0, Func 0 - } - - // PCI Routing Table - Name(_PRT, Package() { - ROOT_PRT_ENTRY(0, 136), // INTA - ROOT_PRT_ENTRY(1, 137), // INTB - ROOT_PRT_ENTRY(2, 138), // INTC - ROOT_PRT_ENTRY(3, 139), // INTD - }) - // Root complex resources - Method (_CRS, 0, Serialized) { - Name (RBUF, ResourceTemplate () { - WordBusNumber ( // Bus numbers assigned to this root - ResourceProducer, - MinFixed, MaxFixed, PosDecode, - 0, // AddressGranularity - 0, // AddressMinimum - Minimum Bus Number - 255, // AddressMaximum - Maximum Bus Number - 0, // AddressTranslation - Set to 0 - 256 // RangeLength - Number of Busses - ) - - DWordMemory ( // 32-bit BAR Windows - ResourceProducer, PosDecode, - MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, // Granularity - 0x50000000, // Min Base Address - 0x57FFFFFF, // Max Base Address - 0x00000000, // Translate - 0x08000000 // Length - ) - - QWordMemory ( // 64-bit BAR Windows - ResourceProducer, PosDecode, - MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, // Granularity - 0x4000000000, // Min Base Address - 0x40FFFFFFFF, // Max Base Address - 0x00000000, // Translate - 0x100000000 // Length - ) - }) // Name(RBUF) - - Return (RBUF) - } // Method(_CRS) - - // - // OS Control Handoff - // - Name(SUPP, Zero) // PCI _OSC Support Field value - Name(CTRL, Zero) // PCI _OSC Control Field value - - /* - See [1] 6.2.10, [2] 4.5 - */ - Method(_OSC,4) { - // Check for proper UUID - If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { - // Create DWord-adressable fields from the Capabilities Buffer - CreateDWordField(Arg3,0,CDW1) - CreateDWordField(Arg3,4,CDW2) - CreateDWordField(Arg3,8,CDW3) - - // Save Capabilities DWord2 & 3 - Store(CDW2,SUPP) - Store(CDW3,CTRL) - - // Only allow native hot plug control if OS supports: - // * ASPM - // * Clock PM - // * MSI/MSI-X - If(LNotEqual(And(SUPP, 0x16), 0x16)) { - And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits) - } - - // Always allow native PME, AER (no dependencies) - - // Never allow SHPC (no SHPC controller in this system) - And(CTRL,0x1D,CTRL) - -#if 0 - If(LNot(And(CDW1,1))) { // Query flag clear? - // Disable GPEs for features granted native control. - If(And(CTRL,0x01)) { // Hot plug control granted? - Store(0,HPCE) // clear the hot plug SCI enable bit - Store(1,HPCS) // clear the hot plug SCI status bit - } - If(And(CTRL,0x04)) { // PME control granted? - Store(0,PMCE) // clear the PME SCI enable bit - Store(1,PMCS) // clear the PME SCI status bit - } - If(And(CTRL,0x10)) { // OS restoring PCIe cap structure? - // Set status to not restore PCIe cap structure - // upon resume from S3 - Store(1,S3CR) - } - } -#endif - - If(LNotEqual(Arg1,One)) { // Unknown revision - Or(CDW1,0x08,CDW1) - } - - If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked - Or(CDW1,0x10,CDW1) - } - // Update DWORD3 in the buffer - Store(CTRL,CDW3) - Return(Arg3) - } Else { - Or(CDW1,4,CDW1) // Unrecognized UUID - Return(Arg3) - } - } // End _OSC - } // PCI0 - } -} diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf deleted file mode 100644 index 92a1c25354..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf +++ /dev/null @@ -1,52 +0,0 @@ -## @file
-#
-# ACPI table data and ASL sources required to boot the platform.
-#
-# Copyright (c) 2014-2015, ARM Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = JunoAcpiTables
- FILE_GUID = a1dd808e-1e95-4399-abc0-653c82e8530c
- MODULE_TYPE = USER_DEFINED
- VERSION_STRING = 1.0
-
-[Sources]
- Dsdt.asl
- Facs.aslc
- Fadt.aslc
- Gtdt.aslc
- Madt.aslc
- AcpiSsdtRootPci.asl # Juno R1 specific
-
-[Packages]
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
- ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec
- EmbeddedPkg/EmbeddedPkg.dec
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
-
-[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
- gArmTokenSpaceGuid.PcdGicDistributorBase
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
-
- gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
-
- gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
- gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl deleted file mode 100644 index 7a56f001a6..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl +++ /dev/null @@ -1,184 +0,0 @@ -/** @file
- Differentiated System Description Table Fields (DSDT)
-
- Copyright (c) 2014-2015, ARM Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "ArmPlatform.h"
-
-DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) {
- Scope(_SB) {
- //
- // A57x2-A53x4 Processor declaration
- //
- Device(CPU0) { // A53-0: Cluster 1, Cpu 0
- Name(_HID, "ACPI0007")
- Name(_UID, 0)
- }
- Device(CPU1) { // A53-1: Cluster 1, Cpu 1
- Name(_HID, "ACPI0007")
- Name(_UID, 1)
- }
- Device(CPU2) { // A53-2: Cluster 1, Cpu 2
- Name(_HID, "ACPI0007")
- Name(_UID, 2)
- }
- Device(CPU3) { // A53-3: Cluster 1, Cpu 3
- Name(_HID, "ACPI0007")
- Name(_UID, 3)
- }
- Device(CPU4) { // A57-0: Cluster 0, Cpu 0
- Name(_HID, "ACPI0007")
- Name(_UID, 4)
- }
- Device(CPU5) { // A57-1: Cluster 0, Cpu 1
- Name(_HID, "ACPI0007")
- Name(_UID, 5)
- }
-
- //
- // Keyboard and Mouse
- //
- Device(KMI0) {
- Name(_HID, "ARMH0501")
- Name(_CID, "PL050_KBD")
- Name(_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, 0x1C060008, 0x4)
- Memory32Fixed(ReadWrite, 0x1C060000, 0x4)
- Memory32Fixed(ReadOnly, 0x1C060004, 0x4)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 197 }
- })
- }
-
- //
- // LAN9118 Ethernet
- //
- Device(ETH0) {
- Name(_HID, "ARMH9118")
- Name(_UID, Zero)
- Name(_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, 0x1A000000, 0x1000)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 }
- })
- }
-
- // UART PL011
- Device(COM0) {
- Name(_HID, "ARMH0011")
- Name(_CID, "PL011")
- Name(_UID, Zero)
- Name(_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 115 }
- })
- }
-
- //
- // USB Host Controller
- //
- Device(USB0){
- Name(_HID, "ARMH0D20")
- Name(_CID, "PNP0D20")
- Name(_UID, 2)
-
- Method(_CRS, 0x0, Serialized){
- Name(RBUF, ResourceTemplate(){
- Memory32Fixed(ReadWrite, 0x7FFC0000, 0x000000B0)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) {149} // INT ID=149 GIC IRQ ID=117 for Juno SoC USB EHCI Controller
- })
- Return(RBUF)
- }
-
- //
- // Root Hub
- //
- Device(RHUB){
- Name(_ADR, 0x00000000) // Address of Root Hub should be 0 as per ACPI 5.0 spec
-
- //
- // Ports connected to Root Hub
- //
- Device(HUB1){
- Name(_ADR, 0x00000001)
- Name(_UPC, Package(){
- 0x00, // Port is NOT connectable
- 0xFF, // Don't care
- 0x00000000, // Reserved 0 must be zero
- 0x00000000 // Reserved 1 must be zero
- })
-
- Device(PRT1){
- Name(_ADR, 0x00000001)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT1
- Device(PRT2){
- Name(_ADR, 0x00000002)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT2
-
- Device(PRT3){
- Name(_ADR, 0x00000003)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT3
-
- Device(PRT4){
- Name(_ADR, 0x00000004)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT4
- } // USB0_RHUB_HUB1
- } // USB0_RHUB
- } // USB0
- } // Scope(_SB)
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Facs.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Facs.aslc deleted file mode 100644 index 137ead77c1..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Facs.aslc +++ /dev/null @@ -1,62 +0,0 @@ -/** @file
-* Firmware ACPI Control Structure (FACS)
-*
-* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <IndustryStandard/Acpi.h>
-
-EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = {
- EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE, // UINT32 Signature
- sizeof (EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE), // UINT32 Length
- 0xA152, // UINT32 HardwareSignature
- 0, // UINT32 FirmwareWakingVector
- 0, // UINT32 GlobalLock
- 0, // UINT32 Flags
- 0, // UINT64 XFirmwareWakingVector
- EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION, // UINT8 Version;
- { EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0[0]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0[1]
- EFI_ACPI_RESERVED_BYTE }, // UINT8 Reserved0[2]
- 0, // UINT32 OspmFlags "Platform firmware must
- // initialize this field to zero."
- { EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[0]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[1]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[2]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[3]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[4]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[5]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[6]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[7]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[8]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[9]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[10]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[11]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[12]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[13]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[14]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[15]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[16]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[17]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[18]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[19]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[20]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[21]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[22]
- EFI_ACPI_RESERVED_BYTE }, // UINT8 Reserved1[23]
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Facs;
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc deleted file mode 100644 index eafdecb8af..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc +++ /dev/null @@ -1,99 +0,0 @@ -/** @file
-* Fixed ACPI Description Table (FADT)
-*
-* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "ArmPlatform.h"
-#include <Library/AcpiLib.h>
-#include <IndustryStandard/Acpi.h>
-
-#ifdef ARM_JUNO_ACPI_5_0
-EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
- ARM_ACPI_HEADER (
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE,
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
- ),
-#else
-EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
- ARM_ACPI_HEADER (
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE,
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
- ),
-#endif
- 0, // UINT32 FirmwareCtrl
- 0, // UINT32 Dsdt
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
- EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED, // UINT8 PreferredPmProfile
- 0, // UINT16 SciInt
- 0, // UINT32 SmiCmd
- 0, // UINT8 AcpiEnable
- 0, // UINT8 AcpiDisable
- 0, // UINT8 S4BiosReq
- 0, // UINT8 PstateCnt
- 0, // UINT32 Pm1aEvtBlk
- 0, // UINT32 Pm1bEvtBlk
- 0, // UINT32 Pm1aCntBlk
- 0, // UINT32 Pm1bCntBlk
- 0, // UINT32 Pm2CntBlk
- 0, // UINT32 PmTmrBlk
- 0, // UINT32 Gpe0Blk
- 0, // UINT32 Gpe1Blk
- 0, // UINT8 Pm1EvtLen
- 0, // UINT8 Pm1CntLen
- 0, // UINT8 Pm2CntLen
- 0, // UINT8 PmTmrLen
- 0, // UINT8 Gpe0BlkLen
- 0, // UINT8 Gpe1BlkLen
- 0, // UINT8 Gpe1Base
- 0, // UINT8 CstCnt
- 0, // UINT16 PLvl2Lat
- 0, // UINT16 PLvl3Lat
- 0, // UINT16 FlushSize
- 0, // UINT16 FlushStride
- 0, // UINT8 DutyOffset
- 0, // UINT8 DutyWidth
- 0, // UINT8 DayAlrm
- 0, // UINT8 MonAlrm
- 0, // UINT8 Century
- 0, // UINT16 IaPcBootArch
- 0, // UINT8 Reserved1
- EFI_ACPI_5_0_HW_REDUCED_ACPI | EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE, // UINT32 Flags
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg
- 0, // UINT8 ResetValue
-#if ARM_JUNO_ACPI_5_0
- {EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE}, // UINT8 Reserved2[3]
-#else
- EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
-#endif
- 0, // UINT64 XFirmwareCtrl
- 0, // UINT64 XDsdt
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg
- NULL_GAS // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Fadt;
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc deleted file mode 100644 index 50057c2641..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc +++ /dev/null @@ -1,103 +0,0 @@ -/** @file
-* Generic Timer Description Table (GTDT)
-*
-* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "ArmPlatform.h"
-#include <Library/AcpiLib.h>
-#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi.h>
-
-#define GTDT_GLOBAL_FLAGS_MAPPED EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT
-#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0
-#define GTDT_GLOBAL_FLAGS_EDGE EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE
-#define GTDT_GLOBAL_FLAGS_LEVEL 0
-
-// Note: We could have a build flag that switches between memory mapped/non-memory mapped timer
-#ifdef SYSTEM_TIMER_BASE_ADDRESS
- #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL)
-#else
- #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_NOT_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL)
- #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF -#endif
-
-#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE -#define GTDT_TIMER_LEVEL_TRIGGERED 0 -#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY -#define GTDT_TIMER_ACTIVE_HIGH 0 -
-#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
-
-#ifdef ARM_JUNO_ACPI_5_0
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = {
- ARM_ACPI_HEADER(
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE,
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
- ),
- SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
- GTDT_GLOBAL_FLAGS, // UINT32 GlobalFlags
- FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
- FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
- GTDT_GTIMER_FLAGS // UINT32 NonSecurePL2TimerFlags
- };
-#else
- #pragma pack (1)
-
- typedef struct {
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
- EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Watchdogs[JUNO_WATCHDOG_COUNT];
- } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES;
-
- #pragma pack ()
-
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
- {
- ARM_ACPI_HEADER(
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE,
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
- ),
- SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
- 0, // UINT32 Reserved
- FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
- FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
- 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
- JUNO_WATCHDOG_COUNT, // UINT32 PlatformTimerCount
- sizeof (EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
- },
- {
- EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
- FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 93, 0),
- EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
- FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 94, EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER)
- }
- };
-#endif
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Gtdt;
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc deleted file mode 100644 index 406bd94f56..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc +++ /dev/null @@ -1,130 +0,0 @@ -/** @file
-* Multiple APIC Description Table (MADT)
-*
-* Copyright (c) 2012 - 2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "ArmPlatform.h"
-#include <Library/AcpiLib.h>
-#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi.h>
-
-//
-// Multiple APIC Description Table
-//
-#ifdef ARM_JUNO_ACPI_5_0
- #pragma pack (1)
-
- typedef struct {
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_5_0_GIC_STRUCTURE GicInterfaces[FixedPcdGet32 (PcdCoreCount)];
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
- } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
- #pragma pack ()
-
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
- {
- ARM_ACPI_HEADER (
- EFI_ACPI_1_0_APIC_SIGNATURE,
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
- ),
- //
- // MADT specific fields
- //
- 0, // LocalApicAddress
- 0, // Flags
- },
- {
- // Format: EFI_ACPI_5_0_GIC_STRUCTURE_INIT(GicId, AcpiCpuId, Flags, PmuIrq, GicBase)
- // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GIC Structure of
- // ACPI v5.0).
- // On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the
- // Trusted Firmware. When supported, we will need to code to dynamically change the ordering.
- // For now we leave CPU2 (A53-0) at the first position.
- // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
- // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 0, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-0
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 1, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-1
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 2, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-2
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 3, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-3
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 4, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A57-0
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 5, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase)) // A57-1
- },
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)
- };
-#else
- #pragma pack (1)
-
- typedef struct {
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_5_1_GIC_STRUCTURE GicInterfaces[FixedPcdGet32 (PcdCoreCount)];
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
- EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE MsiFrame;
- } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
- #pragma pack ()
-
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
- {
- ARM_ACPI_HEADER (
- EFI_ACPI_1_0_APIC_SIGNATURE,
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
- EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
- ),
- //
- // MADT specific fields
- //
- 0, // LocalApicAddress
- 0, // Flags
- },
- {
- // Format: EFI_ACPI_5_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase,
- // GsivId, GicRBase, Mpidr)
- // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of
- // ACPI v5.1).
- // On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the
- // Trusted Firmware. When supported, we will need to code to dynamically change the ordering.
- // For now we leave CPU2 (A53-0) at the first position.
- // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
- // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-0
- 2, 0, GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-1
- 3, 1, GET_MPID(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-2
- 4, 2, GET_MPID(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-3
- 5, 3, GET_MPID(1, 3), EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-0
- 0, 4, GET_MPID(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-1
- 1, 5, GET_MPID(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- },
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0),
- EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(0, ARM_JUNO_GIV2M_MSI_BASE, 0, 0, 0)
- };
-#endif
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec b/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec deleted file mode 100644 index 040a906ac1..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec +++ /dev/null @@ -1,49 +0,0 @@ -#
-# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-[Defines]
- DEC_SPECIFICATION = 0x00010005
- PACKAGE_NAME = ArmJunoPkg
- PACKAGE_GUID = a1147a20-3144-4f8d-8295-b48311c8e4a4
- PACKAGE_VERSION = 0.1
-
-################################################################################
-#
-# Include Section - list of Include Paths that are provided by this package.
-# Comments are used for Keywords and Module Types.
-#
-# Supported Module Types:
-# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
-#
-################################################################################
-[Includes.common]
- Include # Root include for the package
-
-[Guids.common]
- gArmJunoTokenSpaceGuid = { 0xa1147a20, 0x3144, 0x4f8d, { 0x82, 0x95, 0xb4, 0x83, 0x11, 0xc8, 0xe4, 0xa4 } }
-
-[PcdsFeatureFlag.common]
- gArmJunoTokenSpaceGuid.PcdPciMaxPayloadFixup|FALSE|BOOLEAN|0x00000013
-
-[PcdsFixedAtBuild.common]
- gArmJunoTokenSpaceGuid.PcdPcieControlBaseAddress|0x7FF20000|UINT64|0x0000000B
- gArmJunoTokenSpaceGuid.PcdPcieRootPortBaseAddress|0x7FF30000|UINT64|0x0000000C
- gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress|0x40000000|UINT64|0x00000011
- gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceSize|0x10000000|UINT64|0x00000012
-
- gArmJunoTokenSpaceGuid.PcdSynopsysUsbOhciBaseAddress|0x7FFB0000|UINT32|0x00000004
- gArmJunoTokenSpaceGuid.PcdSynopsysUsbEhciBaseAddress|0x7FFC0000|UINT32|0x00000005
-
- # Juno Device Trees are loaded from NOR Flash
- gArmJunoTokenSpaceGuid.PcdJunoR0FdtDevicePath|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/juno.dtb"|VOID*|0x00000006
- gArmJunoTokenSpaceGuid.PcdJunoR1A57x2FdtDevicePath|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/r1a57.dtb"|VOID*|0x00000007
- gArmJunoTokenSpaceGuid.PcdJunoR1A57x2A53x4FdtDevicePath|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/r1a57a53.dtb"|VOID*|0x00000008
diff --git a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc b/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc deleted file mode 100644 index ba838c7063..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc +++ /dev/null @@ -1,294 +0,0 @@ -#
-# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
- PLATFORM_NAME = ArmJuno
- PLATFORM_GUID = ca0722fd-7d3d-45ea-948c-d62b2199807d
- PLATFORM_VERSION = 0.1
- DSC_SPECIFICATION = 0x00010005
- OUTPUT_DIRECTORY = Build/ArmJuno
- SUPPORTED_ARCHITECTURES = AARCH64|ARM
- BUILD_TARGETS = DEBUG|RELEASE
- SKUID_IDENTIFIER = DEFAULT
- FLASH_DEFINITION = ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf
-
-# On RTSM, most peripherals are VExpress Motherboard peripherals
-!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
-
-[LibraryClasses.common]
- ArmPlatformLib|ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoLib.inf
- ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
-
- ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
- NorFlashPlatformLib|ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf
- EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
-
- TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
-
- # USB Requirements
- UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
-
-[LibraryClasses.ARM]
- ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
-
-[LibraryClasses.AARCH64]
- ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
-
-[LibraryClasses.common.SEC]
- PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
- ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
- LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
- MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
- HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
- PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
- PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
- PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
-
-[LibraryClasses.common.SEC, LibraryClasses.common.PEIM]
- MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
-
-[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
-
-[BuildOptions]
- *_*_*_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmJunoPkg/Include
-
-################################################################################
-#
-# Pcd Section - list of all EDK II PCD Entries defined by this Platform
-#
-################################################################################
-
-[PcdsFeatureFlag.common]
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
-
- ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
- # It could be set FALSE to save size.
- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
-
- gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
-
-[PcdsFixedAtBuild.common]
- gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Juno"
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmJuno"
-
- #
- # NV Storage PCDs. Use base of 0x08000000 for NOR0
- #
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0BFC0000
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0BFD0000
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0BFE0000
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
-
- # System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address space)
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
- gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000
-
- # Juno Dual-Cluster profile
- gArmPlatformTokenSpaceGuid.PcdCoreCount|6
- gArmPlatformTokenSpaceGuid.PcdClusterCount|2
-
- gArmTokenSpaceGuid.PcdVFPEnabled|1
-
- #
- # ARM PrimeCell
- #
-
- ## PL011 - Serial Terminal
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
- gArmPlatformTokenSpaceGuid.PL011UartInteger|4
- gArmPlatformTokenSpaceGuid.PL011UartFractional|0
-
- ## PL031 RealTimeClock
- gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
-
- # LAN9118 Ethernet Driver
- gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress|0x18000000
- gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress|0x1215161822242628
-
- #
- # ARM General Interrupt Controller
- #
- gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C010000
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C02F000
-
- #
- # PLDA PCI Root Complex
- #
- gArmPlatformTokenSpaceGuid.PcdPciBusMax|255
- gArmPlatformTokenSpaceGuid.PcdPciIoBase|0x5f800000
- gArmPlatformTokenSpaceGuid.PcdPciIoSize|0x00800000
- gArmPlatformTokenSpaceGuid.PcdPciMmio32Base|0x50000000
- gArmPlatformTokenSpaceGuid.PcdPciMmio32Size|0x08000000
- gArmPlatformTokenSpaceGuid.PcdPciMmio64Base|0x4000000000
- gArmPlatformTokenSpaceGuid.PcdPciMmio64Size|0x100000000
-
- # List of Device Paths that support BootMonFs
- gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)"
-
- #
- # ARM OS Loader
- #
- # Support the Linux EFI stub by default
- gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"EFI Linux from NOR Flash"
- gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/Image"
- gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L"console=ttyAMA0,115200 earlycon=pl011,0x7ff80000 root=/dev/sda1 rootwait verbose debug"
-
- # Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
- gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi();VenHw(CE660500-824D-11E0-AC72-0002A5D5C51B)"
- gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()"
-
- #
- # ARM Architectural Timer Frequency
- #
- gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|50000000
- gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
-
-[PcdsPatchableInModule]
- # Console Resolution (Full HD)
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1920
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|1080
-
-[PcdsDynamicDefault.common]
- #
- # The size of a dynamic PCD of the (VOID*) type can not be increased at run
- # time from its size at build time. Set the "PcdFdtDevicePaths" PCD to a 128
- # character "empty" string, to allow to be able to set FDT text device paths
- # up to 128 characters long.
- #
- gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths|L" "
-
- # Not all Juno platforms support PCI. This dynamic PCD disables or enable
- # PCI support.
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
-
-################################################################################
-#
-# Components Section - list of all EDK II Modules needed by this Platform
-#
-################################################################################
-[Components.common]
- #
- # PEI Phase modules
- #
- ArmPlatformPkg/PrePi/PeiMPCore.inf {
- <LibraryClasses>
- ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
- }
-
- #
- # DXE
- #
- MdeModulePkg/Core/Dxe/DxeMain.inf {
- <LibraryClasses>
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
- }
-
- #
- # Architectural Protocols
- #
- ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
- EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
- EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
- MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
- MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
-
- MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
- <LibraryClasses>
- NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
- }
- MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
-
- #
- # ACPI Support
- #
- MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
-
- MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
- ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
-
- #
- # Semi-hosting filesystem
- #
- ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- # Required by PCI
- UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
-
- #
- # PCI Support
- #
- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
- ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
-
- #
- # SATA Controller
- #
- MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
- EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf
-
- #
- # Networking stack
- #
- EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf
-
- #
- # Usb Support
- #
- MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
- MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
- MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
- MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
- MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
-
- #
- # Juno platform driver
- #
- ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf
-
- #
- # Bds
- #
- MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- ArmPlatformPkg/Bds/Bds.inf
-
diff --git a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf b/ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf deleted file mode 100644 index 51b1180e7a..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf +++ /dev/null @@ -1,365 +0,0 @@ -#
-# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into the Flash Device Image. Each FD section
-# defines one flash "device" image. A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash" image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.BL33_AP_UEFI]
-BaseAddress = 0xE0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
-Size = 0x000F0000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize = 0x00001000
-NumBlocks = 0xF0
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x000F0000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file. This section also defines order the components and modules are positioned
-# within the image. The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize = 0x40
-NumBlocks = 0 # This FV gets compressed so make it just big enough
-FvAlignment = 8 # FV alignment and FV attributes setting.
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
-
- APRIORI DXE {
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- }
-
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
- INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
- INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
-
- #
- # ACPI Support
- #
- INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- INF RuleOverride=ACPITABLE ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
-
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- #
- # Multiple Console IO support
- #
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
- INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
- INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
-
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
-
- # NOR Flash driver
- INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
-
- # Versatile Express FileSystem
- INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatBinPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- # Required by PCI
- INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
-
- # FV FileSystem
- INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
-
- #
- # Usb Support
- #
- INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
- INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
- INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
- INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
- INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
-
- #
- # PCI Support
- #
- INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
- INF ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
-
- #
- # SATA Controller
- #
- INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
- INF EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf
-
- #
- # Networking stack
- #
- INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
- INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
- INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
- INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
- INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
- INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
- INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
- INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
- INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
- INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
- INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
- INF EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf
-
- #
- # UEFI applications
- #
- INF ShellBinPkg/UefiShell/UefiShell.inf
- INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf
-
- #
- # Juno platform driver
- #
- INF ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf
-
- #
- # Bds
- #
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF ArmPlatformPkg/Bds/Bds.inf
-
- #
- # FDT installation
- #
- # The UEFI driver is at the end of the list of the driver to be dispatched
- # after the device drivers (eg: Ethernet) to ensure we have support for them.
- INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
-
-[FV.FVMAIN_COMPACT]
-FvAlignment = 8
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmPlatformPkg/PrePi/PeiMPCore.inf
-
- FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
- SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
- SECTION FV_IMAGE = FVMAIN
- }
- }
-
-
-################################################################################
-#
-# Rules are use with the [FV] section's module INF type to define
-# how an FFS file is created for a given INF file. The following Rule are the default
-# rules for the different module type. User can add the customized rules to define the
-# content of the FFS file.
-#
-################################################################################
-
-
-############################################################################
-# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
-############################################################################
-#
-#[Rule.Common.DXE_DRIVER]
-# FILE DRIVER = $(NAMED_GUID) {
-# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-# COMPRESS PI_STD {
-# GUIDED {
-# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
-# UI STRING="$(MODULE_NAME)" Optional
-# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-# }
-# }
-# }
-#
-############################################################################
-
-#
-# These SEC rules are used for ArmPlatformPkg/PrePi module.
-# ArmPlatformPkg/PrePi is declared as a SEC module to make GenFv patch the
-# UEFI Firmware to jump to ArmPlatformPkg/PrePi entrypoint
-#
-[Rule.ARM.SEC]
- FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
- TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- }
-
-[Rule.AARCH64.SEC]
- FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
- TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
- }
-
-# A shim specific rule is required to ensure the alignment is 4K.
-# Otherwise BaseTools pick up the AArch32 alignment (ie: 32)
-[Rule.ARM.SEC.SHIM]
- FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
- TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi
- }
-
-[Rule.Common.PEI_CORE]
- FILE PEI_CORE = $(NAMED_GUID) FIXED {
- TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING ="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.PEIM]
- FILE PEIM = $(NAMED_GUID) FIXED {
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.PEIM.TIANOCOMPRESSED]
- FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- }
- }
-
-[Rule.Common.DXE_CORE]
- FILE DXE_CORE = $(NAMED_GUID) {
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.UEFI_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.DXE_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.DXE_RUNTIME_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.UEFI_APPLICATION]
- FILE APPLICATION = $(NAMED_GUID) {
- UI STRING ="$(MODULE_NAME)" Optional
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
- }
-
-[Rule.Common.UEFI_DRIVER.BINARY]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional |.depex
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.UEFI_APPLICATION.BINARY]
- FILE APPLICATION = $(NAMED_GUID) {
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
- }
-
-[Rule.Common.USER_DEFINED.ACPITABLE]
- FILE FREEFORM = $(NAMED_GUID) {
- RAW ACPI |.acpi
- RAW ASL |.aml
- }
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/AcpiTables.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/AcpiTables.c deleted file mode 100644 index bf08346434..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/AcpiTables.c +++ /dev/null @@ -1,78 +0,0 @@ -/** @file
-
- This file contains support for ACPI Tables that are generated at boot time.
-
- Copyright (c) 2015, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "ArmPlatform.h"
-#include "ArmJunoDxeInternal.h"
-
-#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
-
-/*
- * Memory Mapped Configuration Space Access Table (MCFG)
- */
-typedef struct {
- EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
- EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE Entry;
-} MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ACCESS_TABLE;
-
-MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ACCESS_TABLE mAcpiMcfgTable = {
- {
- ARM_ACPI_HEADER (
- EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
- MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ACCESS_TABLE,
- EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION
- ),
- 0, // Reserved
- }, {
- FixedPcdGet32 (PcdPciConfigurationSpaceBaseAddress),
- 0, // PciSegmentGroupNumber
- FixedPcdGet32 (PcdPciBusMin),
- FixedPcdGet32 (PcdPciBusMax),
- 0 // Reserved;
- }
-};
-
-/**
- * Callback called when ACPI Protocol is installed
- */
-VOID
-AcpiPciNotificationEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- EFI_STATUS Status;
- EFI_ACPI_TABLE_PROTOCOL *AcpiTableProtocol;
- UINTN AcpiTableKey;
-
- //
- // Ensure the ACPI protocol is installed
- //
- Status = gBS->LocateProtocol (
- &gEfiAcpiTableProtocolGuid,
- NULL,
- (VOID**)&AcpiTableProtocol
- );
- if (EFI_ERROR (Status)) {
- return;
- }
-
- //
- // Install MCFG Table
- //
- AcpiTableKey = 0;
- Status = AcpiTableProtocol->InstallAcpiTable (AcpiTableProtocol, &mAcpiMcfgTable, sizeof (mAcpiMcfgTable), &AcpiTableKey);
- ASSERT_EFI_ERROR (Status);
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c deleted file mode 100644 index 756c2751e1..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c +++ /dev/null @@ -1,562 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "ArmJunoDxeInternal.h"
-#include <ArmPlatform.h>
-
-#include <Protocol/DevicePathFromText.h>
-#include <Protocol/PciRootBridgeIo.h>
-
-#include <Guid/EventGroup.h>
-#include <Guid/GlobalVariable.h>
-
-#include <Library/ArmShellCmdLib.h>
-#include <Library/AcpiLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-#include <Library/IoLib.h>
-#include <Library/PrintLib.h>
-
-//
-// Size in number of characters of the Linux boot argument
-// passing the MAC address to be used by the PCI GigaByte
-// Ethernet device : " sky2.mac_address=0x11,0x22,0x33,0x44,0x55,0x66"
-//
-#define SKY2_MAC_ADDRESS_BOOTARG_LEN 47
-
-//
-// Hardware platform identifiers
-//
-typedef enum {
- UNKNOWN,
- JUNO_R0,
- JUNO_R1
-} JUNO_REVISION;
-
-//
-// Function prototypes
-//
-STATIC EFI_STATUS SetJunoR1DefaultBootEntries (
- VOID
- );
-
-// This GUID must match the FILE_GUID in ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
-STATIC CONST EFI_GUID mJunoAcpiTableFile = { 0xa1dd808e, 0x1e95, 0x4399, { 0xab, 0xc0, 0x65, 0x3c, 0x82, 0xe8, 0x53, 0x0c } };
-
-typedef struct {
- ACPI_HID_DEVICE_PATH AcpiDevicePath;
- PCI_DEVICE_PATH PciDevicePath;
- EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
-} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
-
-STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mPciRootComplexDevicePath = {
- {
- { ACPI_DEVICE_PATH,
- ACPI_DP,
- { (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
- (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) }
- },
- EISA_PNP_ID (0x0A03),
- 0
- },
- {
- { HARDWARE_DEVICE_PATH,
- HW_PCI_DP,
- { (UINT8) (sizeof (PCI_DEVICE_PATH)),
- (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) }
- },
- 0,
- 0
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- { END_DEVICE_PATH_LENGTH, 0 }
- }
-};
-
-EFI_EVENT mAcpiRegistration = NULL;
-
-/**
- * Build and Set UEFI Variable Boot####
- *
- * @param BootVariableName Name of the UEFI Variable
- * @param Attributes 'Attributes' for the Boot#### variable as per UEFI spec
- * @param BootDescription Description of the Boot#### variable
- * @param DevicePath EFI Device Path of the EFI Application to boot
- * @param OptionalData Parameters to pass to the EFI application
- * @param OptionalDataSize Size of the parameters to pass to the EFI application
- *
- * @return EFI_OUT_OF_RESOURCES A memory allocation failed
- * @return Return value of RT.SetVariable
- */
-STATIC
-EFI_STATUS
-BootOptionCreate (
- IN CHAR16 BootVariableName[9],
- IN UINT32 Attributes,
- IN CHAR16* BootDescription,
- IN EFI_DEVICE_PATH_PROTOCOL* DevicePath,
- IN UINT8* OptionalData,
- IN UINTN OptionalDataSize
- )
-{
- UINTN VariableSize;
- UINT8 *Variable;
- UINT8 *VariablePtr;
- UINTN FilePathListLength;
- UINTN BootDescriptionSize;
-
- FilePathListLength = GetDevicePathSize (DevicePath);
- BootDescriptionSize = StrSize (BootDescription);
-
- // Each Boot#### variable is built as follow:
- // UINT32 Attributes
- // UINT16 FilePathListLength
- // CHAR16* Description
- // EFI_DEVICE_PATH_PROTOCOL FilePathList[]
- // UINT8 OptionalData[]
- VariableSize = sizeof (UINT32) + sizeof (UINT16) +
- BootDescriptionSize + FilePathListLength + OptionalDataSize;
- Variable = AllocateZeroPool (VariableSize);
- if (Variable == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- // 'Attributes' field
- *(UINT32*)Variable = Attributes;
- // 'FilePathListLength' field
- VariablePtr = Variable + sizeof (UINT32);
- *(UINT16*)VariablePtr = FilePathListLength;
- // 'Description' field
- VariablePtr += sizeof (UINT16);
- CopyMem (VariablePtr, BootDescription, BootDescriptionSize);
- // 'FilePathList' field
- VariablePtr += BootDescriptionSize;
- CopyMem (VariablePtr, DevicePath, FilePathListLength);
- // 'OptionalData' field
- VariablePtr += FilePathListLength;
- CopyMem (VariablePtr, OptionalData, OptionalDataSize);
-
- return gRT->SetVariable (
- BootVariableName,
- &gEfiGlobalVariableGuid,
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
- VariableSize, Variable
- );
-}
-
-/**
- Notification function of the event defined as belonging to the
- EFI_END_OF_DXE_EVENT_GROUP_GUID event group that was created in
- the entry point of the driver.
-
- This function is called when an event belonging to the
- EFI_END_OF_DXE_EVENT_GROUP_GUID event group is signalled. Such an
- event is signalled once at the end of the dispatching of all
- drivers (end of the so called DXE phase).
-
- @param[in] Event Event declared in the entry point of the driver whose
- notification function is being invoked.
- @param[in] Context NULL
-**/
-STATIC
-VOID
-OnEndOfDxe (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- EFI_DEVICE_PATH_PROTOCOL* PciRootComplexDevicePath;
- EFI_HANDLE Handle;
- EFI_STATUS Status;
-
- //
- // PCI Root Complex initialization
- // At the end of the DXE phase, we should get all the driver dispatched.
- // Force the PCI Root Complex to be initialized. It allows the OS to skip
- // this step.
- //
- PciRootComplexDevicePath = (EFI_DEVICE_PATH_PROTOCOL*) &mPciRootComplexDevicePath;
- Status = gBS->LocateDevicePath (&gEfiPciRootBridgeIoProtocolGuid,
- &PciRootComplexDevicePath,
- &Handle);
-
- Status = gBS->ConnectController (Handle, NULL, PciRootComplexDevicePath, FALSE);
- ASSERT_EFI_ERROR (Status);
-}
-
-STATIC
-BOOLEAN
-AcpiTableJunoR0Check (
- IN EFI_ACPI_DESCRIPTION_HEADER *AcpiHeader
- )
-{
- return TRUE;
-}
-
-STATIC
-BOOLEAN
-AcpiTableJunoR1Check (
- IN EFI_ACPI_DESCRIPTION_HEADER *AcpiHeader
- )
-{
- return TRUE;
-}
-
-EFI_STATUS
-EFIAPI
-ArmJunoEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS HypBase;
- CHAR16 *TextDevicePath;
- UINTN TextDevicePathSize;
- VOID *Buffer;
- UINT32 Midr;
- UINT32 CpuType;
- UINT32 CpuRev;
- JUNO_REVISION JunoRevision;
- EFI_EVENT EndOfDxeEvent;
-
- JunoRevision = UNKNOWN;
- Status = PciEmulationEntryPoint ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // If a hypervisor has been declared then we need to make sure its region is protected at runtime
- //
- // Note: This code is only a workaround for our dummy hypervisor (ArmPkg/Extra/AArch64ToAArch32Shim/)
- // that does not set up (yet) the stage 2 translation table to hide its own memory to EL1.
- //
- if (FixedPcdGet32 (PcdHypFvSize) != 0) {
- // Ensure the hypervisor region is strictly contained into a EFI_PAGE_SIZE-aligned region.
- // The memory must be a multiple of EFI_PAGE_SIZE to ensure we do not reserve more memory than the hypervisor itself.
- // A UEFI Runtime region size granularity cannot be smaller than EFI_PAGE_SIZE. If the hypervisor size is not rounded
- // to this size then there is a risk some non-runtime memory could be visible to the OS view.
- if (((FixedPcdGet32 (PcdHypFvSize) & EFI_PAGE_MASK) == 0) && ((FixedPcdGet32 (PcdHypFvBaseAddress) & EFI_PAGE_MASK) == 0)) {
- // The memory needs to be declared because the DXE core marked it as reserved and removed it from the memory space
- // as it contains the Firmware.
- Status = gDS->AddMemorySpace (
- EfiGcdMemoryTypeSystemMemory,
- FixedPcdGet32 (PcdHypFvBaseAddress), FixedPcdGet32 (PcdHypFvSize),
- EFI_MEMORY_WB | EFI_MEMORY_RUNTIME
- );
- if (!EFI_ERROR (Status)) {
- // We allocate the memory to ensure it is marked as runtime memory
- HypBase = FixedPcdGet32 (PcdHypFvBaseAddress);
- Status = gBS->AllocatePages (AllocateAddress, EfiRuntimeServicesCode,
- EFI_SIZE_TO_PAGES (FixedPcdGet32 (PcdHypFvSize)), &HypBase);
- }
- } else {
- // The hypervisor must be contained into a EFI_PAGE_SIZE-aligned region and its size must also be aligned
- // on a EFI_PAGE_SIZE boundary (ie: 4KB).
- Status = EFI_UNSUPPORTED;
- ASSERT_EFI_ERROR (Status);
- }
-
- if (EFI_ERROR (Status)) {
- return Status;
- }
- }
-
- //
- // Create an event belonging to the "gEfiEndOfDxeEventGroupGuid" group.
- // The "OnEndOfDxe()" function is declared as the call back function.
- // It will be called at the end of the DXE phase when an event of the
- // same group is signalled to inform about the end of the DXE phase.
- // Install the INSTALL_FDT_PROTOCOL protocol.
- //
- Status = gBS->CreateEventEx (
- EVT_NOTIFY_SIGNAL,
- TPL_CALLBACK,
- OnEndOfDxe,
- NULL,
- &gEfiEndOfDxeEventGroupGuid,
- &EndOfDxeEvent
- );
-
- // Install dynamic Shell command to run baremetal binaries.
- Status = ShellDynCmdRunAxfInstall (ImageHandle);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "ArmJunoDxe: Failed to install ShellDynCmdRunAxf\n"));
- }
-
- //
- // We detect whether we are running on a Juno r0 or Juno r1 board at
- // runtime by checking the value of the MIDR register.
- //
-
- Midr = ArmReadMidr ();
- CpuType = (Midr >> ARM_CPU_TYPE_SHIFT) & ARM_CPU_TYPE_MASK;
- CpuRev = Midr & ARM_CPU_REV_MASK;
-
- switch (CpuType) {
- case ARM_CPU_TYPE_A53:
- if (CpuRev == ARM_CPU_REV (0, 0)) {
- JunoRevision = JUNO_R0;
- } else if (CpuRev == ARM_CPU_REV (0, 3)) {
- JunoRevision = JUNO_R1;
- }
- break;
-
- case ARM_CPU_TYPE_A57:
- if (CpuRev == ARM_CPU_REV (0, 0)) {
- JunoRevision = JUNO_R0;
- } else if (CpuRev == ARM_CPU_REV (1, 1)) {
- JunoRevision = JUNO_R1;
- }
- }
-
- //
- // Try to install the ACPI Tables
- //
- if (JunoRevision == JUNO_R0) {
- Status = LocateAndInstallAcpiFromFvConditional (&mJunoAcpiTableFile, AcpiTableJunoR0Check);
- } else if (JunoRevision == JUNO_R1) {
- Status = LocateAndInstallAcpiFromFvConditional (&mJunoAcpiTableFile, AcpiTableJunoR1Check);
- }
- ASSERT_EFI_ERROR (Status);
-
-
- //
- // Set the R1 two boot options if not already done.
- //
- if (JunoRevision == JUNO_R1) {
- Status = SetJunoR1DefaultBootEntries ();
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- // Enable PCI enumeration
- PcdSetBool (PcdPciDisableBusEnumeration, FALSE);
-
- // Declare the related ACPI Tables
- EfiCreateProtocolNotifyEvent (
- &gEfiAcpiTableProtocolGuid,
- TPL_CALLBACK,
- AcpiPciNotificationEvent,
- NULL,
- &mAcpiRegistration
- );
- }
-
- //
- // Set up the device path to the FDT.
- //
- switch (JunoRevision) {
- case JUNO_R0:
- TextDevicePath = (CHAR16*)FixedPcdGetPtr (PcdJunoR0FdtDevicePath);
- break;
-
- case JUNO_R1:
- TextDevicePath = (CHAR16*)FixedPcdGetPtr (PcdJunoR1A57x2FdtDevicePath);
- break;
-
- default:
- TextDevicePath = NULL;
- }
-
- if (TextDevicePath != NULL) {
- TextDevicePathSize = StrSize (TextDevicePath);
- Buffer = PcdSetPtr (PcdFdtDevicePaths, &TextDevicePathSize, TextDevicePath);
- Status = (Buffer != NULL) ? EFI_SUCCESS : EFI_BUFFER_TOO_SMALL;
- } else {
- Status = EFI_NOT_FOUND;
- }
-
- if (EFI_ERROR (Status)) {
- DEBUG (
- (EFI_D_ERROR,
- "ArmJunoDxe: Setting of FDT device path in PcdFdtDevicePaths failed - %r\n", Status)
- );
- return Status;
- }
-
- return Status;
-}
-
-/**
- * If no boot entry is currently defined, define the two default boot entries
- * for Juno R1.
- *
- * @return EFI_SUCCESS Some boot entries were already defined or
- * the default boot entries were set successfully.
- * @return EFI_OUT_OF_RESOURCES A memory allocation failed.
- * @return EFI_DEVICE_ERROR An UEFI variable could not be saved due to a hardware failure.
- * @return EFI_WRITE_PROTECTED An UEFI variable is read-only.
- * @return EFI_SECURITY_VIOLATION An UEFI variable could not be written.
- */
-STATIC
-EFI_STATUS
-SetJunoR1DefaultBootEntries (
- VOID
- )
-{
- EFI_STATUS Status;
- CONST CHAR16* ExtraBootArgument = L" dtb=r1a57a53.dtb";
- UINTN Size;
- EFI_DEVICE_PATH_FROM_TEXT_PROTOCOL *EfiDevicePathFromTextProtocol;
- EFI_DEVICE_PATH* BootDevicePath;
- UINT32 SysPciGbeL;
- UINT32 SysPciGbeH;
- CHAR16* DefaultBootArgument;
- CHAR16* DefaultBootArgument1;
- UINTN DefaultBootArgument1Size;
- CHAR16* DefaultBootArgument2;
- UINTN DefaultBootArgument2Size;
- UINT16 BootOrder[2];
-
- BootDevicePath = NULL;
- DefaultBootArgument1 = NULL;
- DefaultBootArgument2 = NULL;
-
- //
- // Because the driver has a dependency on gEfiVariable(Write)ArchProtocolGuid
- // (see [Depex] section of the INF file), we know we can safely access the
- // UEFI Variable at that stage.
- //
- Size = 0;
- Status = gRT->GetVariable (L"BootOrder", &gEfiGlobalVariableGuid, NULL, &Size, NULL);
- if (Status != EFI_NOT_FOUND) {
- return EFI_SUCCESS;
- }
-
- Status = gBS->LocateProtocol (
- &gEfiDevicePathFromTextProtocolGuid,
- NULL,
- (VOID **)&EfiDevicePathFromTextProtocol
- );
- if (EFI_ERROR (Status)) {
- //
- // You must provide an implementation of DevicePathFromTextProtocol
- // in your firmware (eg: DevicePathDxe)
- //
- DEBUG ((EFI_D_ERROR, "Error: Require DevicePathFromTextProtocol\n"));
- return Status;
- }
- //
- // We use the same default kernel.
- //
- BootDevicePath = EfiDevicePathFromTextProtocol->ConvertTextToDevicePath (
- (CHAR16*)PcdGetPtr (PcdDefaultBootDevicePath)
- );
- if (BootDevicePath == NULL) {
- return EFI_UNSUPPORTED;
- }
-
- DefaultBootArgument = (CHAR16*)PcdGetPtr (PcdDefaultBootArgument);
- DefaultBootArgument1Size = StrSize (DefaultBootArgument) +
- (SKY2_MAC_ADDRESS_BOOTARG_LEN * sizeof (CHAR16));
- DefaultBootArgument2Size = DefaultBootArgument1Size + StrSize (ExtraBootArgument);
-
- Status = EFI_OUT_OF_RESOURCES;
- DefaultBootArgument1 = AllocatePool (DefaultBootArgument1Size);
- if (DefaultBootArgument1 == NULL) {
- goto Error;
- }
- DefaultBootArgument2 = AllocatePool (DefaultBootArgument2Size);
- if (DefaultBootArgument2 == NULL) {
- goto Error;
- }
-
- SysPciGbeL = MmioRead32 (ARM_JUNO_SYS_PCIGBE_L);
- SysPciGbeH = MmioRead32 (ARM_JUNO_SYS_PCIGBE_H);
-
- UnicodeSPrint (
- DefaultBootArgument1,
- DefaultBootArgument1Size,
- L"%s sky2.mac_address=0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x",
- DefaultBootArgument,
- (SysPciGbeH >> 8 ) & 0xFF, (SysPciGbeH ) & 0xFF,
- (SysPciGbeL >> 24) & 0xFF, (SysPciGbeL >> 16) & 0xFF,
- (SysPciGbeL >> 8 ) & 0xFF, (SysPciGbeL ) & 0xFF
- );
-
- CopyMem (DefaultBootArgument2, DefaultBootArgument1, DefaultBootArgument1Size);
- CopyMem (
- (UINT8*)DefaultBootArgument2 + DefaultBootArgument1Size - sizeof (CHAR16),
- ExtraBootArgument,
- StrSize (ExtraBootArgument)
- );
-
- //
- // Create Boot0001 environment variable
- //
- Status = BootOptionCreate (
- L"Boot0001", LOAD_OPTION_ACTIVE | LOAD_OPTION_CATEGORY_BOOT,
- L"Linux with A57x2", BootDevicePath,
- (UINT8*)DefaultBootArgument1, DefaultBootArgument1Size
- );
- if (EFI_ERROR (Status)) {
- ASSERT_EFI_ERROR (Status);
- goto Error;
- }
-
- //
- // Create Boot0002 environment variable
- //
- Status = BootOptionCreate (
- L"Boot0002", LOAD_OPTION_ACTIVE | LOAD_OPTION_CATEGORY_BOOT,
- L"Linux with A57x2_A53x4", BootDevicePath,
- (UINT8*)DefaultBootArgument2, DefaultBootArgument2Size
- );
- if (EFI_ERROR (Status)) {
- ASSERT_EFI_ERROR (Status);
- goto Error;
- }
-
- //
- // Add the new Boot Index to the list
- //
- BootOrder[0] = 1; // Boot0001
- BootOrder[1] = 2; // Boot0002
- Status = gRT->SetVariable (
- L"BootOrder",
- &gEfiGlobalVariableGuid,
- EFI_VARIABLE_NON_VOLATILE |
- EFI_VARIABLE_BOOTSERVICE_ACCESS |
- EFI_VARIABLE_RUNTIME_ACCESS,
- sizeof (BootOrder),
- BootOrder
- );
-
-Error:
- if (BootDevicePath != NULL) {
- FreePool (BootDevicePath);
- }
- if (DefaultBootArgument1 != NULL) {
- FreePool (DefaultBootArgument1);
- }
- if (DefaultBootArgument2 != NULL) {
- FreePool (DefaultBootArgument2);
- }
-
- if (EFI_ERROR (Status)) {
- DEBUG ((
- EFI_D_ERROR,
- "ArmJunoDxe - The setting of the default boot entries failed - %r\n",
- Status
- ));
- }
-
- return Status;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf deleted file mode 100644 index 6157f9807f..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf +++ /dev/null @@ -1,95 +0,0 @@ -#
-# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmJunoDxe
- FILE_GUID = 1484ebe8-2681-45f1-a2e5-12ecad893b62
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- ENTRY_POINT = ArmJunoEntryPoint
-
-[Sources.common]
- AcpiTables.c
- ArmJunoDxe.c
- PciEmulation.c
- PciRootBridgeIo.c
-
-[Packages]
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
- ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec
- EmbeddedPkg/EmbeddedPkg.dec
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
-
-[LibraryClasses]
- AcpiLib
- ArmLib
- ArmShellCmdRunAxfLib
- BaseMemoryLib
- BdsLib
- DebugLib
- DmaLib
- DxeServicesTableLib
- IoLib
- PcdLib
- PrintLib
- SerialPortLib
- UefiBootServicesTableLib
- UefiRuntimeServicesTableLib
- UefiLib
- UefiDriverEntryPoint
-
-[Guids]
- gArmGlobalVariableGuid
- gEfiEndOfDxeEventGroupGuid
- gEfiFileInfoGuid
-
-[Protocols]
- gEfiBlockIoProtocolGuid
- gEfiDevicePathFromTextProtocolGuid
- gEfiPciIoProtocolGuid
- gEfiPciRootBridgeIoProtocolGuid
- gEfiSimpleFileSystemProtocolGuid
- gEfiAcpiTableProtocolGuid
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmTokenSpaceGuid.PcdHypFvBaseAddress
- gArmTokenSpaceGuid.PcdHypFvSize
-
- gArmJunoTokenSpaceGuid.PcdSynopsysUsbEhciBaseAddress
- gArmJunoTokenSpaceGuid.PcdSynopsysUsbOhciBaseAddress
-
- gArmJunoTokenSpaceGuid.PcdJunoR0FdtDevicePath
- gArmJunoTokenSpaceGuid.PcdJunoR1A57x2FdtDevicePath
- gArmJunoTokenSpaceGuid.PcdJunoR1A57x2A53x4FdtDevicePath
-
- gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath
- gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument
-
- # PCI Root complex specific PCDs
- gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
- gArmPlatformTokenSpaceGuid.PcdPciBusMin
- gArmPlatformTokenSpaceGuid.PcdPciBusMax
-
-[Pcd]
- gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
-
-[Depex]
- # We depend on these protocols to create the default boot entries
- gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h deleted file mode 100644 index 662c41377f..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h +++ /dev/null @@ -1,46 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_JUNO_DXE_INTERNAL_H__
-#define __ARM_JUNO_DXE_INTERNAL_H__
-
-#include <Uefi.h>
-
-#include <Library/BaseLib.h>
-#include <Library/ArmLib.h>
-#include <Library/AcpiLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-
-#include <Protocol/AcpiTable.h>
-
-#include <IndustryStandard/Acpi.h>
-
-EFI_STATUS
-PciEmulationEntryPoint (
- VOID
- );
-
-/**
- * Callback called when ACPI Protocol is installed
- */
-VOID
-AcpiPciNotificationEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- );
-
-#endif // __ARM_JUNO_DXE_INTERNAL_H__
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c deleted file mode 100644 index 2ddebf606e..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c +++ /dev/null @@ -1,596 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "PciEmulation.h"
-
-#define HOST_CONTROLLER_OPERATION_REG_SIZE 0x44
-
-typedef struct {
- ACPI_HID_DEVICE_PATH AcpiDevicePath;
- PCI_DEVICE_PATH PciDevicePath;
- EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
-} EFI_PCI_IO_DEVICE_PATH;
-
-typedef struct {
- UINT32 Signature;
- EFI_PCI_IO_DEVICE_PATH DevicePath;
- EFI_PCI_IO_PROTOCOL PciIoProtocol;
- PCI_TYPE00 *ConfigSpace;
- PCI_ROOT_BRIDGE RootBridge;
- UINTN Segment;
-} EFI_PCI_IO_PRIVATE_DATA;
-
-#define EFI_PCI_IO_PRIVATE_DATA_SIGNATURE SIGNATURE_32('p', 'c', 'i', 'o')
-#define EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(a) CR (a, EFI_PCI_IO_PRIVATE_DATA, PciIoProtocol, EFI_PCI_IO_PRIVATE_DATA_SIGNATURE)
-
-EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate =
-{
- {
- { ACPI_DEVICE_PATH, ACPI_DP, { sizeof (ACPI_HID_DEVICE_PATH), 0 } },
- EISA_PNP_ID(0x0A03), // HID
- 0 // UID
- },
- {
- { HARDWARE_DEVICE_PATH, HW_PCI_DP, { sizeof (PCI_DEVICE_PATH), 0 } },
- 0,
- 0
- },
- { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0} }
-};
-
-STATIC
-VOID
-ConfigureUSBHost (
- VOID
- )
-{
-}
-
-
-EFI_STATUS
-PciIoPollMem (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- )
-{
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-PciIoPollIo (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- )
-{
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-PciIoMemRead (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
-
- return PciRootBridgeIoMemRead (&Private->RootBridge.Io,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- Private->ConfigSpace->Device.Bar[BarIndex] + Offset, //Fix me ConfigSpace
- Count,
- Buffer
- );
-}
-
-EFI_STATUS
-PciIoMemWrite (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
-
- return PciRootBridgeIoMemWrite (&Private->RootBridge.Io,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- Private->ConfigSpace->Device.Bar[BarIndex] + Offset, //Fix me ConfigSpace
- Count,
- Buffer
- );
-}
-
-EFI_STATUS
-PciIoIoRead (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-PciIoIoWrite (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
-}
-
-/**
- Enable a PCI driver to read PCI controller registers in PCI configuration space.
-
- @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] Width Signifies the width of the memory operations.
- @param[in] Offset The offset within the PCI configuration space for
- the PCI controller.
- @param[in] Count The number of PCI configuration operations to
- perform. Bytes moved is Width size * Count,
- starting at Offset.
-
- @param[in out] Buffer The destination buffer to store the results.
-
- @retval EFI_SUCCESS The data was read from the PCI controller.
- @retval EFI_INVALID_PARAMETER "Width" is invalid.
- @retval EFI_INVALID_PARAMETER "Buffer" is NULL.
-
-**/
-EFI_STATUS
-PciIoPciRead (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT32 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
- EFI_STATUS Status;
-
- if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = PciRootBridgeIoMemRW (
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
- Count,
- TRUE,
- (PTR)(UINTN)Buffer,
- TRUE,
- (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset) //Fix me ConfigSpace
- );
-
- return Status;
-}
-
-/**
- Enable a PCI driver to write PCI controller registers in PCI configuration space.
-
- @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] Width Signifies the width of the memory operations.
- @param[in] Offset The offset within the PCI configuration space for
- the PCI controller.
- @param[in] Count The number of PCI configuration operations to
- perform. Bytes moved is Width size * Count,
- starting at Offset.
-
- @param[in out] Buffer The source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from the PCI controller.
- @retval EFI_INVALID_PARAMETER "Width" is invalid.
- @retval EFI_INVALID_PARAMETER "Buffer" is NULL.
-
-**/
-EFI_STATUS
-PciIoPciWrite (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT32 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
-
- if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- Count,
- TRUE,
- (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset), //Fix me ConfigSpace
- TRUE,
- (PTR)(UINTN)Buffer
- );
-}
-
-EFI_STATUS
-PciIoCopyMem (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 DestBarIndex,
- IN UINT64 DestOffset,
- IN UINT8 SrcBarIndex,
- IN UINT64 SrcOffset,
- IN UINTN Count
- )
-{
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-PciIoMap (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
- )
-{
- DMA_MAP_OPERATION DmaOperation;
-
- if (Operation == EfiPciIoOperationBusMasterRead) {
- DmaOperation = MapOperationBusMasterRead;
- } else if (Operation == EfiPciIoOperationBusMasterWrite) {
- DmaOperation = MapOperationBusMasterWrite;
- } else if (Operation == EfiPciIoOperationBusMasterCommonBuffer) {
- DmaOperation = MapOperationBusMasterCommonBuffer;
- } else {
- return EFI_INVALID_PARAMETER;
- }
- return DmaMap (DmaOperation, HostAddress, NumberOfBytes, DeviceAddress, Mapping);
-}
-
-EFI_STATUS
-PciIoUnmap (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN VOID *Mapping
- )
-{
- return DmaUnmap (Mapping);
-}
-
-/**
- Allocate pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
- mapping.
-
- @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] Type This parameter is not used and must be ignored.
- @param[in] MemoryType The type of memory to allocate, EfiBootServicesData or
- EfiRuntimeServicesData.
- @param[in] Pages The number of pages to allocate.
- @param[out] HostAddress A pointer to store the base system memory address of
- the allocated range.
- @param[in] Attributes The requested bit mask of attributes for the allocated
- range. Only the attributes,
- EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE and
- EFI_PCI_ATTRIBUTE_MEMORY_CACHED may be used with this
- function. If any other bits are set, then EFI_UNSUPPORTED
- is returned. This function ignores this bit mask.
-
- @retval EFI_SUCCESS The requested memory pages were allocated.
- @retval EFI_INVALID_PARAMETER HostAddress is NULL.
- @retval EFI_INVALID_PARAMETER MemoryType is invalid.
- @retval EFI_UNSUPPORTED Attributes is unsupported.
- @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
-
-**/
-EFI_STATUS
-PciIoAllocateBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
- )
-{
- if (Attributes &
- (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE |
- EFI_PCI_ATTRIBUTE_MEMORY_CACHED ))) {
- return EFI_UNSUPPORTED;
- }
-
- return DmaAllocateBuffer (MemoryType, Pages, HostAddress);
-}
-
-
-EFI_STATUS
-PciIoFreeBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
- )
-{
- return DmaFreeBuffer (Pages, HostAddress);
-}
-
-
-EFI_STATUS
-PciIoFlush (
- IN EFI_PCI_IO_PROTOCOL *This
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Retrieves this PCI controller's current PCI bus number, device number, and function number.
-
- @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[out] SegmentNumber The PCI controller's current PCI segment number.
- @param[out] BusNumber The PCI controller's current PCI bus number.
- @param[out] DeviceNumber The PCI controller's current PCI device number.
- @param[out] FunctionNumber The PCI controller’s current PCI function number.
-
- @retval EFI_SUCCESS The PCI controller location was returned.
- @retval EFI_INVALID_PARAMETER At least one out of the four output parameters is
- a NULL pointer.
-**/
-EFI_STATUS
-PciIoGetLocation (
- IN EFI_PCI_IO_PROTOCOL *This,
- OUT UINTN *SegmentNumber,
- OUT UINTN *BusNumber,
- OUT UINTN *DeviceNumber,
- OUT UINTN *FunctionNumber
- )
-{
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
-
- if ((SegmentNumber == NULL) || (BusNumber == NULL) ||
- (DeviceNumber == NULL) || (FunctionNumber == NULL) ) {
- return EFI_INVALID_PARAMETER;
- }
-
- *SegmentNumber = Private->Segment;
- *BusNumber = 0xff;
- *DeviceNumber = 0;
- *FunctionNumber = 0;
-
- return EFI_SUCCESS;
-}
-
-/**
- Performs an operation on the attributes that this PCI controller supports.
-
- The operations include getting the set of supported attributes, retrieving
- the current attributes, setting the current attributes, enabling attributes,
- and disabling attributes.
-
- @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] Operation The operation to perform on the attributes for this
- PCI controller.
- @param[in] Attributes The mask of attributes that are used for Set,
- Enable and Disable operations.
- @param[out] Result A pointer to the result mask of attributes that are
- returned for the Get and Supported operations. This
- is an optional parameter that may be NULL for the
- Set, Enable, and Disable operations.
-
- @retval EFI_SUCCESS The operation on the PCI controller's
- attributes was completed. If the operation
- was Get or Supported, then the attribute mask
- is returned in Result.
- @retval EFI_INVALID_PARAMETER Operation is greater than or equal to
- EfiPciIoAttributeOperationMaximum.
- @retval EFI_INVALID_PARAMETER Operation is Get and Result is NULL.
- @retval EFI_INVALID_PARAMETER Operation is Supported and Result is NULL.
-
-**/
-EFI_STATUS
-PciIoAttributes (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
- IN UINT64 Attributes,
- OUT UINT64 *Result OPTIONAL
- )
-{
- switch (Operation) {
- case EfiPciIoAttributeOperationGet:
- case EfiPciIoAttributeOperationSupported:
- if (Result == NULL) {
- return EFI_INVALID_PARAMETER;
- }
- //
- // We are not a real PCI device so just say things we kind of do
- //
- *Result = EFI_PCI_DEVICE_ENABLE;
- break;
-
- case EfiPciIoAttributeOperationSet:
- case EfiPciIoAttributeOperationEnable:
- case EfiPciIoAttributeOperationDisable:
- if (Attributes & (~EFI_PCI_DEVICE_ENABLE)) {
- return EFI_UNSUPPORTED;
- }
- // Since we are not a real PCI device no enable/set or disable operations exist.
- return EFI_SUCCESS;
-
- default:
- return EFI_INVALID_PARAMETER;
- };
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciIoGetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINT8 BarIndex,
- OUT UINT64 *Supports, OPTIONAL
- OUT VOID **Resources OPTIONAL
- )
-{
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-PciIoSetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINT64 Attributes,
- IN UINT8 BarIndex,
- IN OUT UINT64 *Offset,
- IN OUT UINT64 *Length
- )
-{
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
-}
-
-EFI_PCI_IO_PROTOCOL PciIoTemplate =
-{
- PciIoPollMem,
- PciIoPollIo,
- { PciIoMemRead, PciIoMemWrite },
- { PciIoIoRead, PciIoIoWrite },
- { PciIoPciRead, PciIoPciWrite },
- PciIoCopyMem,
- PciIoMap,
- PciIoUnmap,
- PciIoAllocateBuffer,
- PciIoFreeBuffer,
- PciIoFlush,
- PciIoGetLocation,
- PciIoAttributes,
- PciIoGetBarAttributes,
- PciIoSetBarAttributes,
- 0,
- 0
-};
-
-EFI_STATUS
-PciInstallDevice (
- IN UINTN DeviceId,
- IN PHYSICAL_ADDRESS MemoryStart,
- IN UINT64 MemorySize,
- IN UINTN ClassCode1,
- IN UINTN ClassCode2,
- IN UINTN ClassCode3
- )
-{
- EFI_STATUS Status;
- EFI_HANDLE Handle;
- EFI_PCI_IO_PRIVATE_DATA *Private;
-
- // Configure USB host
- ConfigureUSBHost ();
-
- // Create a private structure
- Private = AllocatePool (sizeof (EFI_PCI_IO_PRIVATE_DATA));
- if (Private == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- return Status;
- }
-
- Private->Signature = EFI_PCI_IO_PRIVATE_DATA_SIGNATURE; // Fill in signature
- Private->RootBridge.Signature = PCI_ROOT_BRIDGE_SIGNATURE; // Fake Root Bridge structure needs a signature too
- Private->RootBridge.MemoryStart = MemoryStart; // Get the USB capability register base
- Private->Segment = 0; // Default to segment zero
-
- // Calculate the total size of the USB controller (OHCI + EHCI).
- Private->RootBridge.MemorySize = MemorySize; //CapabilityLength + (HOST_CONTROLLER_OPERATION_REG_SIZE + ((4 * PhysicalPorts) - 1));
-
- // Create fake PCI config space: OHCI + EHCI
- Private->ConfigSpace = AllocateZeroPool (sizeof (PCI_TYPE00));
- if (Private->ConfigSpace == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- FreePool (Private);
- return Status;
- }
-
- //
- // Configure PCI config space: OHCI + EHCI
- //
- Private->ConfigSpace->Hdr.VendorId = 0xFFFF; // Invalid vendor Id as it is not an actual device.
- Private->ConfigSpace->Hdr.DeviceId = 0x0000; // Not relevant as the vendor id is not valid.
- Private->ConfigSpace->Hdr.ClassCode[0] = ClassCode1;
- Private->ConfigSpace->Hdr.ClassCode[1] = ClassCode2;
- Private->ConfigSpace->Hdr.ClassCode[2] = ClassCode3;
- Private->ConfigSpace->Device.Bar[0] = MemoryStart;
-
- Handle = NULL;
-
- // Unique device path.
- CopyMem (&Private->DevicePath, &PciIoDevicePathTemplate, sizeof (PciIoDevicePathTemplate));
- Private->DevicePath.AcpiDevicePath.UID = 1; // Use '1' to differentiate from PLDA root complex
- Private->DevicePath.PciDevicePath.Device = DeviceId;
-
- // Copy protocol structure
- CopyMem (&Private->PciIoProtocol, &PciIoTemplate, sizeof (PciIoTemplate));
-
- Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
- &gEfiPciIoProtocolGuid, &Private->PciIoProtocol,
- &gEfiDevicePathProtocolGuid, &Private->DevicePath,
- NULL);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "PciEmulationEntryPoint InstallMultipleProtocolInterfaces () failed.\n"));
- }
-
- return Status;
-}
-
-EFI_STATUS
-PciEmulationEntryPoint (
- VOID
- )
-{
- EFI_STATUS Status;
-
- Status = PciInstallDevice (0, FixedPcdGet32 (PcdSynopsysUsbOhciBaseAddress), SIZE_64KB, PCI_IF_OHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install OHCI device.\n"));
- }
-
- Status = PciInstallDevice (1, FixedPcdGet32 (PcdSynopsysUsbEhciBaseAddress), SIZE_64KB, PCI_IF_EHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install EHCI device.\n"));
- }
-
- return Status;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h deleted file mode 100644 index de2855d01d..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h +++ /dev/null @@ -1,284 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _PCI_ROOT_BRIDGE_H_
-#define _PCI_ROOT_BRIDGE_H_
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PciLib.h>
-#include <Library/UefiLib.h>
-#include <Library/DmaLib.h>
-
-#include <Protocol/EmbeddedExternalDevice.h>
-#include <Protocol/DevicePath.h>
-#include <Protocol/PciIo.h>
-#include <Protocol/PciRootBridgeIo.h>
-#include <Protocol/PciHostBridgeResourceAllocation.h>
-
-#include <IndustryStandard/Pci23.h>
-
-#include "ArmJunoDxeInternal.h"
-
-#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
-#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
-#define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL
-
-
-typedef struct {
- ACPI_HID_DEVICE_PATH AcpiDevicePath;
- EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
-} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
-
-
-#define ACPI_CONFIG_IO 0
-#define ACPI_CONFIG_MMIO 1
-#define ACPI_CONFIG_BUS 2
-
-typedef struct {
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Desc[3];
- EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;
-} ACPI_CONFIG_INFO;
-
-
-#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('P', 'c', 'i', 'F')
-
-typedef struct {
- UINT32 Signature;
- EFI_HANDLE Handle;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;
- EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath;
-
- UINT8 StartBus;
- UINT8 EndBus;
- UINT16 Type;
- UINT32 MemoryStart;
- UINT32 MemorySize;
- UINTN IoOffset;
- UINT32 IoStart;
- UINT32 IoSize;
- UINT64 PciAttributes;
-
- ACPI_CONFIG_INFO *Config;
-
-} PCI_ROOT_BRIDGE;
-
-
-#define INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) CR (a, PCI_ROOT_BRIDGE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
-
-
-typedef union {
- UINT8 volatile *Buffer;
- UINT8 volatile *Ui8;
- UINT16 volatile *Ui16;
- UINT32 volatile *Ui32;
- UINT64 volatile *Ui64;
- UINTN volatile Ui;
-} PTR;
-
-
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoPollMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoPollIo (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoMemRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoMemWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoIoRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 UserAddress,
- IN UINTN Count,
- IN OUT VOID *UserBuffer
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoIoWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 UserAddress,
- IN UINTN Count,
- IN OUT VOID *UserBuffer
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoCopyMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 DestAddress,
- IN UINT64 SrcAddress,
- IN UINTN Count
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoPciRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoPciWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoMap (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoUnmap (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN VOID *Mapping
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoAllocateBuffer (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoFreeBuffer (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN UINTN Pages,
- OUT VOID *HostAddress
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoFlush (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoGetAttributes (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- OUT UINT64 *Supported,
- OUT UINT64 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoSetAttributes (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN UINT64 Attributes,
- IN OUT UINT64 *ResourceBase,
- IN OUT UINT64 *ResourceLength
- );
-
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoConfiguration (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- OUT VOID **Resources
- );
-
-//
-// Private Function Prototypes
-//
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoMemRW (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINTN Count,
- IN BOOLEAN InStrideFlag,
- IN PTR In,
- IN BOOLEAN OutStrideFlag,
- OUT PTR Out
- );
-
-BOOLEAN
-PciIoMemAddressValid (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINT64 Address
- );
-
-EFI_STATUS
-EmulatePciIoForEhci (
- INTN MvPciIfMaxIf
- );
-
-#endif
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c deleted file mode 100644 index f1eaceff28..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c +++ /dev/null @@ -1,299 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "PciEmulation.h"
-
-BOOLEAN
-PciRootBridgeMemAddressValid (
- IN PCI_ROOT_BRIDGE *Private,
- IN UINT64 Address
- )
-{
- if ((Address >= Private->MemoryStart) && (Address < (Private->MemoryStart + Private->MemorySize))) {
- return TRUE;
- }
-
- return FALSE;
-}
-
-
-EFI_STATUS
-PciRootBridgeIoMemRW (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINTN Count,
- IN BOOLEAN InStrideFlag,
- IN PTR In,
- IN BOOLEAN OutStrideFlag,
- OUT PTR Out
- )
-{
- UINTN Stride;
- UINTN InStride;
- UINTN OutStride;
-
- Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);
- Stride = (UINTN)1 << Width;
- InStride = InStrideFlag ? Stride : 0;
- OutStride = OutStrideFlag ? Stride : 0;
-
- //
- // Loop for each iteration and move the data
- //
- switch (Width) {
- case EfiPciWidthUint8:
- for (;Count > 0; Count--, In.Buffer += InStride, Out.Buffer += OutStride) {
- *In.Ui8 = *Out.Ui8;
- }
- break;
- case EfiPciWidthUint16:
- for (;Count > 0; Count--, In.Buffer += InStride, Out.Buffer += OutStride) {
- *In.Ui16 = *Out.Ui16;
- }
- break;
- case EfiPciWidthUint32:
- for (;Count > 0; Count--, In.Buffer += InStride, Out.Buffer += OutStride) {
- *In.Ui32 = *Out.Ui32;
- }
- break;
- default:
- return EFI_INVALID_PARAMETER;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciRootBridgeIoPciRW (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN BOOLEAN Write,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 UserAddress,
- IN UINTN Count,
- IN OUT VOID *UserBuffer
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
- @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
- @param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
- @param Count The number of memory operations to perform.
- @param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
- @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
-**/
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoMemRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- PCI_ROOT_BRIDGE *Private;
- UINTN AlignMask;
- PTR In;
- PTR Out;
-
- if ( Buffer == NULL ) {
- return EFI_INVALID_PARAMETER;
- }
-
- Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
-
- if (!PciRootBridgeMemAddressValid (Private, Address)) {
- return EFI_INVALID_PARAMETER;
- }
-
- AlignMask = (1 << (Width & 0x03)) - 1;
- if (Address & AlignMask) {
- return EFI_INVALID_PARAMETER;
- }
-
- In.Buffer = Buffer;
- Out.Buffer = (VOID *)(UINTN) Address;
-
- switch (Width) {
- case EfiPciWidthUint8:
- case EfiPciWidthUint16:
- case EfiPciWidthUint32:
- case EfiPciWidthUint64:
- return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out);
-
- case EfiPciWidthFifoUint8:
- case EfiPciWidthFifoUint16:
- case EfiPciWidthFifoUint32:
- case EfiPciWidthFifoUint64:
- return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out);
-
- case EfiPciWidthFillUint8:
- case EfiPciWidthFillUint16:
- case EfiPciWidthFillUint32:
- case EfiPciWidthFillUint64:
- return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out);
-
- default:
- break;
- }
-
- return EFI_INVALID_PARAMETER;
-}
-
-/**
- Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
- @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
- @param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
- @param Count The number of memory operations to perform.
- @param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
- @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
-**/
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoMemWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- PCI_ROOT_BRIDGE *Private;
- UINTN AlignMask;
- PTR In;
- PTR Out;
-
- if ( Buffer == NULL ) {
- return EFI_INVALID_PARAMETER;
- }
-
- Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
-
- if (!PciRootBridgeMemAddressValid (Private, Address)) {
- return EFI_INVALID_PARAMETER;
- }
-
- AlignMask = (1 << (Width & 0x03)) - 1;
- if (Address & AlignMask) {
- return EFI_INVALID_PARAMETER;
- }
-
- In.Buffer = (VOID *)(UINTN) Address;
- Out.Buffer = Buffer;
-
- switch (Width) {
- case EfiPciWidthUint8:
- case EfiPciWidthUint16:
- case EfiPciWidthUint32:
- case EfiPciWidthUint64:
- return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out);
-
- case EfiPciWidthFifoUint8:
- case EfiPciWidthFifoUint16:
- case EfiPciWidthFifoUint32:
- case EfiPciWidthFifoUint64:
- return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out);
-
- case EfiPciWidthFillUint8:
- case EfiPciWidthFillUint16:
- case EfiPciWidthFillUint32:
- case EfiPciWidthFillUint64:
- return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out);
-
- default:
- break;
- }
-
- return EFI_INVALID_PARAMETER;
-}
-
-/**
- Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
- @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
- @param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
- @param Count The number of memory operations to perform.
- @param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
- @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
-**/
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoPciRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- return PciRootBridgeIoPciRW (This, FALSE, Width, Address, Count, Buffer);
-}
-
-/**
- Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
- @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
- @param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
- @param Count The number of memory operations to perform.
- @param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
- @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
-**/
-EFI_STATUS
-EFIAPI
-PciRootBridgeIoPciWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- return PciRootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer);
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridge.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridge.c deleted file mode 100644 index e1a6b749e4..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridge.c +++ /dev/null @@ -1,199 +0,0 @@ -/** @file
-* Pci Host Bridge support for the Xpress-RICH3 PCIe Root Complex
-*
-* Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "PciHostBridge.h"
-
-#include <Guid/EventGroup.h>
-
-/**
- * PCI Root Bridge Description
- */
-typedef struct {
- UINT32 AcpiUid;
- UINT64 MemAllocAttributes;
-} PCI_ROOT_BRIDGE_DESC;
-
-PCI_ROOT_BRIDGE_DESC PciRbDescriptions = {
- 0, // AcpiUid
- PCI_MEMORY_ALLOCATION_ATTRIBUTES // MemAllocAttributes
-};
-
-/**
- * Template for PCI Host Bridge Instance
- **/
-STATIC CONST PCI_HOST_BRIDGE_INSTANCE
-gPciHostBridgeInstanceTemplate = {
- PCI_HOST_BRIDGE_SIGNATURE, //Signature
- NULL, // Handle
- NULL, // ImageHandle
- NULL, // RootBridge
- TRUE, // CanRestarted
- NULL, // CpuIo
- NULL, // Metronome
- { // ResAlloc
- PciHbRaNotifyPhase, // ResAlloc.NotifyPhase
- PciHbRaGetNextRootBridge, // ResAlloc.GetNextRootBridge
- PciHbRaGetAllocAttributes, // ResAlloc.GetAllocAttributes
- PciHbRaStartBusEnumeration, // ResAlloc.StartBusEnumeration
- PciHbRaSetBusNumbers, // ResAlloc.SetBusNumbers
- PciHbRaSubmitResources, // ResAlloc.SubmitResources
- PciHbRaGetProposedResources, // ResAlloc.GetProposedResources
- PciHbRaPreprocessController // ResAlloc.PreprocessController
- }
-};
-PCI_HOST_BRIDGE_INSTANCE* gpPciHostBridgeInstance;
-
-EFI_STATUS
-HostBridgeConstructor (
- IN OUT PCI_HOST_BRIDGE_INSTANCE** Instance,
- IN EFI_HANDLE ImageHandle
- )
-{
- EFI_STATUS Status;
- PCI_HOST_BRIDGE_INSTANCE* HostBridge;
-
- PCI_TRACE ("HostBridgeConstructor()");
-
- if (Instance == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- HostBridge = AllocateCopyPool (sizeof (PCI_HOST_BRIDGE_INSTANCE), &gPciHostBridgeInstanceTemplate);
- if (HostBridge == NULL) {
- PCI_TRACE ("HostBridgeConstructor(): FAIL to allocate resources");
- return EFI_OUT_OF_RESOURCES;
- }
-
- // It will also create a device handle for the PCI Host Bridge (as HostBridge->Handle == NULL)
- Status = gBS->InstallMultipleProtocolInterfaces (
- &HostBridge->Handle,
- &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
- NULL
- );
- if (EFI_ERROR (Status)) {
- PCI_TRACE ("HostBridgeConstructor(): FAIL to install resource allocator");
- FreePool (HostBridge);
- return EFI_DEVICE_ERROR;
- } else {
- PCI_TRACE ("HostBridgeConstructor(): SUCCEED to install resource allocator");
- }
-
- Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **)(&(HostBridge->CpuIo)));
- ASSERT_EFI_ERROR (Status);
-
- Status = gBS->LocateProtocol (&gEfiMetronomeArchProtocolGuid, NULL, (VOID **)(&(HostBridge->Metronome)));
- ASSERT_EFI_ERROR (Status);
-
- HostBridge->ImageHandle = ImageHandle;
-
- *Instance = HostBridge;
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-HostBridgeDestructor (
- IN PCI_HOST_BRIDGE_INSTANCE* HostBridge
- )
-{
- EFI_STATUS Status;
-
- Status = gBS->UninstallMultipleProtocolInterfaces (
- HostBridge->Handle,
- &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
- NULL
- );
-
- if (HostBridge->RootBridge) {
- PciRbDestructor (HostBridge->RootBridge);
- }
-
- FreePool (HostBridge);
-
- return Status;
-}
-
-/**
- Entry point of this driver
-
- @param ImageHandle Handle of driver image
- @param SystemTable Point to EFI_SYSTEM_TABLE
-
- @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource
- @retval EFI_DEVICE_ERROR Can not install the protocol instance
- @retval EFI_SUCCESS Success to initialize the Pci host bridge.
-**/
-EFI_STATUS
-EFIAPI
-PciHostBridgeEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- PCI_TRACE ("PciHostBridgeEntryPoint()");
-
- // Creation of the PCI Host Bridge Instance
- Status = HostBridgeConstructor (&gpPciHostBridgeInstance, ImageHandle);
- if (EFI_ERROR (Status)) {
- PCI_TRACE ("PciHostBridgeEntryPoint(): ERROR: Fail to construct PCI Host Bridge.");
- return Status;
- }
-
- // Creation of the PCIe Root Bridge
- Status = PciRbConstructor (gpPciHostBridgeInstance, PciRbDescriptions.AcpiUid, PciRbDescriptions.MemAllocAttributes);
- if (EFI_ERROR (Status)) {
- PCI_TRACE ("PciHostBridgeEntryPoint(): ERROR: Fail to construct PCI Root Bridge.");
- return Status;
- }
- ASSERT (gpPciHostBridgeInstance->RootBridge->Signature == PCI_ROOT_BRIDGE_SIGNATURE);
-
- // PCI 32bit Memory Space
- Status = gDS->AddMemorySpace (
- EfiGcdMemoryTypeMemoryMappedIo,
- PCI_MEM32_BASE,
- PCI_MEM32_SIZE,
- 0
- );
-
- // PCI 64bit Memory Space
- Status = gDS->AddMemorySpace (
- EfiGcdMemoryTypeMemoryMappedIo,
- PCI_MEM64_BASE,
- PCI_MEM64_SIZE,
- 0
- );
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-EFIAPI
-PciHostBridgeUnload (
- IN EFI_HANDLE ImageHandle
- )
-{
- EFI_STATUS Status;
-
- // Free Reserved memory space in GCD
- gDS->RemoveMemorySpace (PCI_MEM32_BASE, PCI_MEM32_SIZE);
- gDS->RemoveMemorySpace (PCI_MEM64_BASE, PCI_MEM64_SIZE);
-
- // Free the allocated memory
- Status = HostBridgeDestructor (gpPciHostBridgeInstance);
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridge.h b/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridge.h deleted file mode 100644 index e53f4fa3a8..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridge.h +++ /dev/null @@ -1,324 +0,0 @@ -/** @file
-* Header containing the structure specific to the Xpress-RICH3 PCIe Root Complex
-*
-* Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __PCIHOSTBRIDGE_H
-#define __PCIHOSTBRIDGE_H
-
-#include <PiDxe.h>
-
-#include "XPressRich3.h"
-
-#include <IndustryStandard/Pci.h>
-#include <IndustryStandard/Acpi.h>
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#include <Protocol/PciHostBridgeResourceAllocation.h>
-#include <Protocol/PciRootBridgeIo.h>
-#include <Protocol/PciIo.h>
-#include <Protocol/DevicePath.h>
-#include <Protocol/CpuIo2.h>
-#include <Protocol/Metronome.h>
-
-#define PCI_TRACE(txt) DEBUG((EFI_D_VERBOSE, "ARM_PCI: " txt "\n"))
-
-#define PCIE_ROOTPORT_WRITE32(Add, Val) { UINT32 Value = (UINT32)(Val); CpuIo->Mem.Write (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieRootPortBaseAddress)+(Add)),1,&Value); }
-#define PCIE_ROOTPORT_READ32(Add, Val) { CpuIo->Mem.Read (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieRootPortBaseAddress)+(Add)),1,&Val); }
-
-#define PCIE_CONTROL_WRITE32(Add, Val) { UINT32 Value = (UINT32)(Val); CpuIo->Mem.Write (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieControlBaseAddress)+(Add)),1,&Value); }
-#define PCIE_CONTROL_READ32(Add, Val) { CpuIo->Mem.Read (CpuIo,EfiCpuIoWidthUint32,(UINT64)(PcdGet64 (PcdPcieControlBaseAddress)+(Add)),1,&Val); }
-
-/**
- * PCI Root Bridge Device Path (ACPI Device Node + End Node)
- */
-typedef struct {
- ACPI_HID_DEVICE_PATH Acpi;
- EFI_DEVICE_PATH_PROTOCOL End;
-} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
-
-typedef enum {
- ResTypeIo = 0,
- ResTypeMem32,
- ResTypePMem32,
- ResTypeMem64,
- ResTypePMem64,
- ResTypeMax
-} PCI_RESOURCE_TYPE;
-
-#define ACPI_SPECFLAG_PREFETCHABLE 0x06
-#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
-#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
-
-typedef struct {
- UINT64 Base;
- UINT64 Length;
- UINT64 Alignment;
-} PCI_RESOURCE_ALLOC;
-
-typedef struct _PCI_HOST_BRIDGE_INSTANCE PCI_HOST_BRIDGE_INSTANCE;
-
-/**
- * PCI Root Bridge Instance structure
- **/
-typedef struct {
- UINTN Signature;
- EFI_HANDLE Handle;
- PCI_HOST_BRIDGE_INSTANCE *HostBridge;
- //
- // Set Type of memory allocation (could be EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
- // and EFI_PCI_HOST_BRIDGE_MEM64_DECODE).
- //
- UINT64 MemAllocAttributes;
- PCI_RESOURCE_ALLOC ResAlloc[ResTypeMax];
- UINTN BusStart;
- UINTN BusLength;
- UINT64 Supports;
- UINT64 Attributes;
- EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;
-} PCI_ROOT_BRIDGE_INSTANCE;
-
-/**
- * PCI Host Bridge Instance structure
- **/
-struct _PCI_HOST_BRIDGE_INSTANCE {
- UINTN Signature;
- EFI_HANDLE Handle;
- EFI_HANDLE ImageHandle;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- //
- // The enumeration cannot be restarted after the process goes into the non initial
- // enumeration phase.
- //
- BOOLEAN CanRestarted;
- EFI_CPU_IO2_PROTOCOL *CpuIo;
- EFI_METRONOME_ARCH_PROTOCOL *Metronome;
- EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;
-};
-
-#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32 ('e', 'h', 's', 't')
-#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('e', '2', 'p', 'b')
-#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) CR (a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
-#define INSTANCE_FROM_ROOT_BRIDGE_IO_THIS(a) CR (a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
-
-/**
- * PCI Host Bridge Resource Allocator Functions
- **/
-EFI_STATUS PciHbRaNotifyPhase (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
- );
-
-EFI_STATUS PciHbRaGetNextRootBridge (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN OUT EFI_HANDLE *RootBridgeHandle
- );
-
-EFI_STATUS PciHbRaGetAllocAttributes (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT UINT64 *Attributes
- );
-
-EFI_STATUS PciHbRaStartBusEnumeration (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
- );
-
-EFI_STATUS PciHbRaSetBusNumbers (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
- );
-
-EFI_STATUS PciHbRaSubmitResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
- );
-
-EFI_STATUS PciHbRaGetProposedResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
- );
-
-EFI_STATUS PciHbRaPreprocessController (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
- );
-
-
-/**
- * PCI Root Bridge
- **/
-EFI_STATUS PciRbPollMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- );
-
-EFI_STATUS PciRbPollIo (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- );
-
-EFI_STATUS PciRbMemRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS PciRbMemWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS PciRbIoRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS PciRbIoWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS PciRbPciRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS PciRbPciWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- );
-
-EFI_STATUS PciRbCopyMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 DestAddress,
- IN UINT64 SrcAddress,
- IN UINTN Count
- );
-
-EFI_STATUS PciRbMap (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
- );
-
-EFI_STATUS PciRbUnMap (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN VOID *Mapping
- );
-
-EFI_STATUS PciRbAllocateBuffer (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- IN OUT VOID **HostAddress,
- IN UINT64 Attributes
- );
-
-EFI_STATUS PciRbFreeBuffer (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
- );
-
-EFI_STATUS PciRbFlush (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
- );
-
-EFI_STATUS PciRbSetAttributes (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN UINT64 Attributes,
- IN OUT UINT64 *ResourceBase,
- IN OUT UINT64 *ResourceLength
- );
-
-EFI_STATUS PciRbGetAttributes (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- OUT UINT64 *Supports,
- OUT UINT64 *Attributes
- );
-
-EFI_STATUS PciRbConfiguration (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- OUT VOID **Resources
- );
-
-/**
- * PCI Root Bridge Functions
- **/
-EFI_STATUS
-PciRbConstructor (
- IN PCI_HOST_BRIDGE_INSTANCE *HostBridge,
- IN UINT32 PciAcpiUid,
- IN UINT64 MemAllocAttributes
- );
-
-EFI_STATUS
-PciRbDestructor (
- IN PCI_ROOT_BRIDGE_INSTANCE* RootBridge
- );
-
-EFI_STATUS
-HWPciRbInit (
- IN EFI_CPU_IO2_PROTOCOL *CpuIo
- );
-
-#endif
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf b/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf deleted file mode 100644 index 9f526910c4..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf +++ /dev/null @@ -1,76 +0,0 @@ -#/** @file
-# INF file for the Xpress-RICH3 PCIe Root Complex
-#
-# Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = PciHostBridge
- FILE_GUID = C62F4B20-681E-11DF-8F0D-0002A5D5C51B
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = PciHostBridgeEntryPoint
- UNLOAD_IMAGE = PciHostBridgeUnload
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPkg/ArmPkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec
-
-[LibraryClasses]
- UefiDriverEntryPoint
- UefiBootServicesTableLib
- MemoryAllocationLib
- DxeServicesTableLib
- CacheMaintenanceLib
- DmaLib
-
-[Sources]
- PciHostBridge.c
- PciHostBridgeResourceAllocation.c
- PciRootBridge.c
- XPressRich3.c
-
-[Protocols]
- gEfiPciHostBridgeResourceAllocationProtocolGuid # Produced
- gEfiPciRootBridgeIoProtocolGuid # Produced
- gEfiDevicePathProtocolGuid # Produced
- gEfiCpuIo2ProtocolGuid # Consumed
- gEfiMetronomeArchProtocolGuid # Consumed
-
-[FeaturePcd]
- gArmJunoTokenSpaceGuid.PcdPciMaxPayloadFixup
-
-[Pcd.common]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmPlatformTokenSpaceGuid.PcdPciBusMin
- gArmPlatformTokenSpaceGuid.PcdPciBusMax
- gArmPlatformTokenSpaceGuid.PcdPciIoBase
- gArmPlatformTokenSpaceGuid.PcdPciIoSize
- gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
- gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
- gArmPlatformTokenSpaceGuid.PcdPciMmio64Base
- gArmPlatformTokenSpaceGuid.PcdPciMmio64Size
-
- gArmJunoTokenSpaceGuid.PcdPcieControlBaseAddress
- gArmJunoTokenSpaceGuid.PcdPcieRootPortBaseAddress
- gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
- gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceSize
-
-[Depex]
- gEfiCpuIo2ProtocolGuid AND gEfiMetronomeArchProtocolGuid
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeResourceAllocation.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeResourceAllocation.c deleted file mode 100644 index de60db7184..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeResourceAllocation.c +++ /dev/null @@ -1,642 +0,0 @@ -/** @file
-* Implementation of the Pci Host Bridge Resource Allocation for the Xpress-RICH3 PCIe Root Complex
-*
-* Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "PciHostBridge.h"
-
-EFI_STATUS
-PciHbRaNotifyPhase (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
- )
-{
- PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS BaseAddress;
- UINT64 AddrLen;
- UINTN BitsOfAlignment;
-
- HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
-
- PCI_TRACE ("PciHbRaNotifyPhase()");
-
- // Check RootBridge Signature
- ASSERT (HostBridgeInstance->RootBridge->Signature == PCI_ROOT_BRIDGE_SIGNATURE);
-
- // The enumeration cannot be restarted after the process has been further than the first phase
- if (Phase == EfiPciHostBridgeBeginEnumeration) {
- if (!HostBridgeInstance->CanRestarted) {
- return EFI_NOT_READY;
- }
- } else {
- HostBridgeInstance->CanRestarted = FALSE;
- }
-
- switch (Phase) {
- case EfiPciHostBridgeBeginEnumeration:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeBeginEnumeration)");
- // Resets the host bridge PCI apertures and internal data structures
- Status = HWPciRbInit (HostBridgeInstance->CpuIo);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- break;
-
- case EfiPciHostBridgeBeginBusAllocation:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeBeginBusAllocation)");
- // The bus allocation phase is about to begin
- break;
-
- case EfiPciHostBridgeEndBusAllocation:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeEndBusAllocation)");
- // The bus allocation and bus programming phase is complete. All the PCI-to-PCI bridges have been given and written back
- // a bus number range into their configuration
- break;
-
- case EfiPciHostBridgeBeginResourceAllocation:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeBeginResourceAllocation)");
- // The resource allocation phase is about to begin.
- break;
-
- case EfiPciHostBridgeAllocateResources:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeAllocateResources)");
- // Allocates resources per previously submitted requests for all the PCI root bridges. The resources have been submitted to
- // PciHbRaSubmitResources() before.
-
- RootBridgeInstance = HostBridgeInstance->RootBridge;
- if (RootBridgeInstance->ResAlloc[ResTypeIo].Length != 0) {
- BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAlloc[ResTypeIo].Alignment) + 1; // Get the number of '1' in Alignment
- AddrLen = RootBridgeInstance->ResAlloc[ResTypeIo].Length;
-
- Status = gDS->AllocateIoSpace (
- EfiGcdAllocateAnySearchBottomUp,
- EfiGcdIoTypeIo,
- BitsOfAlignment,
- AddrLen,
- &BaseAddress,
- HostBridgeInstance->ImageHandle,
- NULL
- );
- // If error then ResAlloc[n].Base ==0
- if (!EFI_ERROR (Status)) {
- RootBridgeInstance->ResAlloc[ResTypeIo].Base = (UINTN)BaseAddress;
- }
- }
-
- if (RootBridgeInstance->ResAlloc[ResTypeMem32].Length != 0) {
- BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAlloc[ResTypeMem32].Alignment) + 1; // Get the number of '1' in Alignment
- AddrLen = RootBridgeInstance->ResAlloc[ResTypeMem32].Length;
-
- // Top of the 32bit PCI Memory space
- BaseAddress = FixedPcdGet64 (PcdPciMmio32Base) + FixedPcdGet64 (PcdPciMmio32Size);
-
- Status = gDS->AllocateMemorySpace (
- EfiGcdAllocateMaxAddressSearchTopDown,
- EfiGcdMemoryTypeMemoryMappedIo,
- BitsOfAlignment,
- AddrLen,
- &BaseAddress,
- HostBridgeInstance->ImageHandle,
- NULL
- );
-
- // Ensure the allocation is in the 32bit PCI memory space
- if (!EFI_ERROR (Status) && (BaseAddress >= FixedPcdGet64 (PcdPciMmio32Base))) {
- RootBridgeInstance->ResAlloc[ResTypeMem32].Base = (UINTN)BaseAddress;
- }
- }
- if (RootBridgeInstance->ResAlloc[ResTypePMem32].Length != 0) {
- BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAlloc[ResTypePMem32].Alignment) + 1; // Get the number of '1' in Alignment
- AddrLen = RootBridgeInstance->ResAlloc[ResTypePMem32].Length;
-
- // Top of the 32bit PCI Memory space
- BaseAddress = FixedPcdGet64 (PcdPciMmio32Base) + FixedPcdGet64 (PcdPciMmio32Size);
-
- Status = gDS->AllocateMemorySpace (
- EfiGcdAllocateMaxAddressSearchTopDown,
- EfiGcdMemoryTypeMemoryMappedIo,
- BitsOfAlignment,
- AddrLen,
- &BaseAddress,
- HostBridgeInstance->ImageHandle,
- NULL
- );
-
- // Ensure the allocation is in the 32bit PCI memory space
- if (!EFI_ERROR (Status) && (BaseAddress >= FixedPcdGet64 (PcdPciMmio32Base))) {
- RootBridgeInstance->ResAlloc[ResTypePMem32].Base = (UINTN)BaseAddress;
- }
- }
- if (RootBridgeInstance->ResAlloc[ResTypeMem64].Length != 0) {
- BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAlloc[ResTypeMem64].Alignment) + 1; // Get the number of '1' in Alignment
- AddrLen = RootBridgeInstance->ResAlloc[ResTypeMem64].Length;
-
- // Top of the 64bit PCI Memory space
- BaseAddress = FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size);
-
- Status = gDS->AllocateMemorySpace (
- EfiGcdAllocateMaxAddressSearchTopDown,
- EfiGcdMemoryTypeMemoryMappedIo,
- BitsOfAlignment,
- AddrLen,
- &BaseAddress,
- HostBridgeInstance->ImageHandle,
- NULL
- );
-
- // Ensure the allocation is in the 64bit PCI memory space
- if (!EFI_ERROR (Status) && (BaseAddress >= FixedPcdGet64 (PcdPciMmio64Base))) {
- RootBridgeInstance->ResAlloc[ResTypeMem64].Base = (UINTN)BaseAddress;
- }
- }
- if (RootBridgeInstance->ResAlloc[ResTypePMem64].Length != 0) {
- BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAlloc[ResTypePMem64].Alignment) + 1; //Get the number of '1' in Alignment
- AddrLen = RootBridgeInstance->ResAlloc[ResTypePMem64].Length;
-
- // Top of the 64bit PCI Memory space
- BaseAddress = FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size);
-
- Status = gDS->AllocateMemorySpace (
- EfiGcdAllocateMaxAddressSearchTopDown,
- EfiGcdMemoryTypeMemoryMappedIo,
- BitsOfAlignment,
- AddrLen,
- &BaseAddress,
- HostBridgeInstance->ImageHandle,
- NULL
- );
-
- // Ensure the allocation is in the 64bit PCI memory space
- if (!EFI_ERROR (Status) && (BaseAddress >= FixedPcdGet64 (PcdPciMmio64Base))) {
- RootBridgeInstance->ResAlloc[ResTypePMem64].Base = (UINTN)BaseAddress;
- }
- }
-
- break;
-
- case EfiPciHostBridgeSetResources:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeSetResources)");
- // Programs the host bridge hardware to decode previously allocated resources (proposed resources)
- // for all the PCI root bridges. The PCI bus driver will now program the resources
- break;
-
- case EfiPciHostBridgeFreeResources:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeFreeResources)");
- // Deallocates resources that were previously allocated for all the PCI root bridges and resets the
- // I/O and memory apertures to their initial state.*/
- break;
-
- case EfiPciHostBridgeEndResourceAllocation:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeEndResourceAllocation)");
- break;
-
- case EfiPciHostBridgeEndEnumeration:
- PCI_TRACE ("PciHbRaNotifyPhase(EfiPciHostBridgeEndEnumeration)");
- break;
-
- default:
- DEBUG ((EFI_D_INFO, "PciHbRaNotifyPhase(Phase:%d)\n", Phase));
- ASSERT (0);
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- * PciHbRaGetNextRootBridge() returns the next root bridge attached to the 'This' PCI Host Bridge.
- * As we have only got one PCI Root Bridge in this PCI interface, we return either this root bridge
- * if it the first time we call this function (*RootBridgeHandle == NULL) or we return EFI_NOT_FOUND
- **/
-EFI_STATUS
-PciHbRaGetNextRootBridge (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN OUT EFI_HANDLE *RootBridgeHandle
- )
-{
- PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
-
- PCI_TRACE ("PciHbRaGetNextRootBridge()");
-
- HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
- ASSERT (HostBridgeInstance->RootBridge != NULL);
-
- //Check RootBridge Signature
- ASSERT (HostBridgeInstance->RootBridge->Signature == PCI_ROOT_BRIDGE_SIGNATURE);
-
- if (*RootBridgeHandle == NULL) {
- *RootBridgeHandle = HostBridgeInstance->RootBridge->Handle;
- return EFI_SUCCESS;
- } else if (*RootBridgeHandle == HostBridgeInstance->RootBridge->Handle) {
- return EFI_NOT_FOUND;
- } else {
- return EFI_INVALID_PARAMETER;
- }
-}
-
-/** PciHbRaGetAllocAttributes() returns the resource allocation attributes supported by this PCI Root Bridge.
- * A PCI Root bridge could support these types :
- * - EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM : does not support separate windows for nonprefetchable and prefetchable memory.
- * - EFI_PCI_HOST_BRIDGE_MEM64_DECODE : supports 64-bit memory windows
- **/
-EFI_STATUS
-PciHbRaGetAllocAttributes (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT UINT64 *Attributes
- )
-{
- PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
-
- PCI_TRACE ("PciHbRaGetAllocAttributes()");
-
- HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
-
- // Check if the RootBridgeHandle is the one managed by this PCI Host Bridge
- ASSERT (HostBridgeInstance->RootBridge != NULL);
- if (HostBridgeInstance->RootBridge->Handle != RootBridgeHandle) {
- return EFI_INVALID_PARAMETER;
- }
-
- *Attributes = HostBridgeInstance->RootBridge->MemAllocAttributes;
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciHbRaStartBusEnumeration (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
- )
-{
- VOID *Buffer;
- UINT8 *Ptr;
- PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
-
- // Fill an ACPI descriptor table with the Bus Number Range. This information will be used by the PCI Bus driver
- // to set bus numbers to PCI-to-PCI bridge.
- PCI_TRACE ("PciHbRaStartBusEnumeration()");
-
- HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
-
- Buffer = AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
- if (Buffer == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- Ptr = (UINT8 *)Buffer;
-
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR; // QWORD Address space Descriptor
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->Len = 0x2B; // Length of this descriptor in bytes not including the first two fields
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS; // Resource Type Bus Number Range
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->GenFlag = 0;
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->SpecificFlag = 0;
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrSpaceGranularity = 0;
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin = HostBridgeInstance->RootBridge->BusStart; // Bus Start
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMax = 0; // Bus Max
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrTranslationOffset = 0;
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen = FixedPcdGet32 (PcdPciBusMax) - FixedPcdGet32 (PcdPciBusMin) + 1;
-
- Ptr = Ptr + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Ptr)->Desc = ACPI_END_TAG_DESCRIPTOR;
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Ptr)->Checksum = 0x0;
-
- *Configuration = Buffer;
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciHbRaSetBusNumbers (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
- )
-{
- PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
- UINT8 *Ptr;
- UINTN BusStart;
- UINTN BusEnd;
- UINTN BusLen;
-
- PCI_TRACE ("PciHbRaSetBusNumbers()");
-
- Ptr = Configuration;
- if (*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
- return EFI_INVALID_PARAMETER;
- }
-
- // Check if the passed ACPI descriptor table define a Bus Number Range
- if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != ACPI_ADDRESS_SPACE_TYPE_BUS) {
- return EFI_INVALID_PARAMETER;
- }
-
- // Check if the Configuration only passed one ACPI Descriptor (+ End Descriptor)
- if (*((UINT8*)(Ptr + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR))) != ACPI_END_TAG_DESCRIPTOR) {
- return EFI_INVALID_PARAMETER;
- }
-
- HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
- ASSERT (HostBridgeInstance->RootBridge != NULL);
- if (HostBridgeInstance->RootBridge->Handle != RootBridgeHandle) {
- return EFI_INVALID_PARAMETER;
- }
-
- BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
- BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
- BusEnd = BusStart + BusLen - 1;
-
- ASSERT (BusStart <= BusEnd); // We should at least have PCI_BUS_ROOT and PCI_SWITCH_BUS
- ASSERT ((BusStart >= HostBridgeInstance->RootBridge->BusStart) && (BusLen <= HostBridgeInstance->RootBridge->BusLength));
-
- HostBridgeInstance->RootBridge->BusStart = BusStart;
- HostBridgeInstance->RootBridge->BusLength = BusLen;
-
- return EFI_SUCCESS;
-}
-
-/**
- * This function is used to submit all the I/O and memory resources that are required by the specified
- * PCI root bridge.
- **/
-EFI_STATUS
-PciHbRaSubmitResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
- )
-{
- PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- UINT8 *Ptr;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- PCI_RESOURCE_TYPE ResType;
-
- PCI_TRACE ("PciHbRaSubmitResources()");
-
- HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
-
- if (Configuration == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- // Check if the ACPI Descriptor tables is conformed
- Ptr = (UINT8 *)Configuration;
- while (*Ptr == ACPI_ADDRESS_SPACE_DESCRIPTOR) { // QWORD Address Space descriptor
- Ptr += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
- }
- if (*Ptr != ACPI_END_TAG_DESCRIPTOR) { // End tag
- return EFI_INVALID_PARAMETER;
- }
-
- // Check the RootBridgeHandle
- RootBridgeInstance = HostBridgeInstance->RootBridge;
- ASSERT (RootBridgeInstance != NULL);
- if (RootBridgeHandle != HostBridgeInstance->RootBridge->Handle) {
- return EFI_INVALID_PARAMETER;
- }
-
- Ptr = (UINT8 *)Configuration;
- while ( *Ptr == ACPI_ADDRESS_SPACE_DESCRIPTOR) { // While the entry is an ACPI Descriptor Table
- Desc = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr;
-
- // Check if the description is valid
- if (Desc->AddrLen > 0xffffffff) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((Desc->AddrRangeMax >= 0xffffffff) || (Desc->AddrRangeMax != (GetPowerOfTwo64 (Desc->AddrRangeMax + 1) - 1))) {
- return EFI_INVALID_PARAMETER;
- }
-
- switch (Desc->ResType) {
- case ACPI_ADDRESS_SPACE_TYPE_MEM:
- // Check invalid Address Space Granularity
- if ((Desc->AddrSpaceGranularity != 32) && (Desc->AddrSpaceGranularity != 64)) {
- return EFI_INVALID_PARAMETER;
- }
-
- // check the memory resource request is supported by PCI root bridge
- if (RootBridgeInstance->MemAllocAttributes == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM && Desc->SpecificFlag == 0x06) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Desc->AddrSpaceGranularity == 32) {
- if (Desc->SpecificFlag == ACPI_SPECFLAG_PREFETCHABLE) {
- ResType = ResTypePMem32;
- } else {
- ResType = ResTypeMem32;
- }
- } else {
- if (Desc->SpecificFlag == ACPI_SPECFLAG_PREFETCHABLE) {
- ResType = ResTypePMem64;
- } else {
- ResType = ResTypeMem64;
- }
- }
- RootBridgeInstance->ResAlloc[ResType].Length = Desc->AddrLen;
- RootBridgeInstance->ResAlloc[ResType].Alignment = Desc->AddrRangeMax;
- RootBridgeInstance->ResAlloc[ResType].Base = Desc->AddrRangeMin;
- break;
- case ACPI_ADDRESS_SPACE_TYPE_IO:
- RootBridgeInstance->ResAlloc[ResTypeIo].Length = Desc->AddrLen;
- RootBridgeInstance->ResAlloc[ResTypeIo].Alignment = Desc->AddrRangeMax;
- RootBridgeInstance->ResAlloc[ResTypeIo].Base = 0;
- break;
- default:
- ASSERT (0); // Could be the case Desc->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS
- break;
- }
- Ptr += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
- }
-
- return EFI_SUCCESS;
-}
-
-/** Returns the proposed resource settings for the specified PCI root bridge. The resources have been submitted by
- * PciHbRaSubmitResources() before
- **/
-EFI_STATUS
-PciHbRaGetProposedResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
- )
-{
- PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- UINT32 i;
- UINT32 ResAllocCount;
- VOID *Buffer;
- UINT8 *Ptr;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
-
- PCI_TRACE ("PciHbRaGetProposedResources()");
-
- HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
-
- // Check the RootBridgeHandle
- RootBridgeInstance = HostBridgeInstance->RootBridge;
- ASSERT (RootBridgeInstance != NULL);
- if (RootBridgeHandle != HostBridgeInstance->RootBridge->Handle) {
- return EFI_INVALID_PARAMETER;
- }
-
- // Count the number of Resource Allocated for this Root Bridge
- ResAllocCount = 0;
- for (i = 0; i < ResTypeMax; i++) {
- if (RootBridgeInstance->ResAlloc[i].Length != 0) ResAllocCount++;
- }
-
- if (ResAllocCount == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- Buffer = AllocateZeroPool (ResAllocCount * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
- if (Buffer == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- Ptr = Buffer;
- for (i = 0; i < ResTypeMax; i++) {
- if (RootBridgeInstance->ResAlloc[i].Length != 0) { // Base != 0 if the resource has been allocated
- Desc = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr;
-
- Desc->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Desc->Len = 0x2B;
- Desc->GenFlag = 0;
- Desc->AddrRangeMax = 0;
-
- switch (i) {
- case ResTypeIo:
- Desc->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
- Desc->SpecificFlag = 0;
- Desc->AddrSpaceGranularity = 0;
- break;
- case ResTypeMem32:
- Desc->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Desc->SpecificFlag = 0;
- Desc->AddrSpaceGranularity = 32;
- break;
- case ResTypePMem32:
- Desc->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Desc->SpecificFlag = ACPI_SPECFLAG_PREFETCHABLE;
- Desc->AddrSpaceGranularity = 32;
- break;
- case ResTypeMem64:
- Desc->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Desc->SpecificFlag = 0;
- Desc->AddrSpaceGranularity = 64;
- break;
- case ResTypePMem64:
- Desc->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Desc->SpecificFlag = ACPI_SPECFLAG_PREFETCHABLE;
- Desc->AddrSpaceGranularity = 64;
- break;
- }
- Desc->AddrRangeMin = RootBridgeInstance->ResAlloc[i].Base;
- Desc->AddrTranslationOffset = (RootBridgeInstance->ResAlloc[i].Base != 0) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
- Desc->AddrLen = RootBridgeInstance->ResAlloc[i].Length;
- Ptr += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
- }
- }
-
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Ptr)->Desc = ACPI_END_TAG_DESCRIPTOR;
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Ptr)->Checksum = 0x0;
-
- *Configuration = Buffer;
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciHbRaPreprocessController (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
- )
-{
- PCI_HOST_BRIDGE_INSTANCE* HostBridge;
- PCI_ROOT_BRIDGE_INSTANCE* RootBridge;
- UINT32 CapabilityPtr;
- UINT32 CapabilityEntry;
- UINT16 CapabilityID;
- UINT32 DeviceCapability;
-
- PCI_TRACE ("PciHbRaPreprocessController()");
-
- if (FeaturePcdGet (PcdPciMaxPayloadFixup)) {
- // Do Max payload fixup for every devices
- if (Phase == EfiPciBeforeResourceCollection) {
- // Get RootBridge Instance from Host Bridge Instance
- HostBridge = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
- RootBridge = HostBridge->RootBridge;
-
- // Get the first PCI Capability
- CapabilityPtr = PCI_CAPBILITY_POINTER_OFFSET;
- RootBridge->Io.Pci.Read (
- &RootBridge->Io,
- EfiPciWidthUint8,
- EFI_PCI_ADDRESS (PciAddress.Bus, PciAddress.Device, PciAddress.Function, CapabilityPtr),
- 1,
- &CapabilityPtr
- );
- CapabilityPtr &= 0x1FF;
-
- // Get Pci Express Capability
- while (CapabilityPtr != 0) {
- RootBridge->Io.Pci.Read (
- &RootBridge->Io,
- EfiPciWidthUint16,
- EFI_PCI_ADDRESS (PciAddress.Bus, PciAddress.Device, PciAddress.Function, CapabilityPtr),
- 1,
- &CapabilityEntry
- );
-
- CapabilityID = (UINT8)CapabilityEntry;
-
- // Is PCIe capability ?
- if (CapabilityID == EFI_PCI_CAPABILITY_ID_PCIEXP) {
- // Get PCIe Device Capabilities
- RootBridge->Io.Pci.Read (
- &RootBridge->Io,
- EfiPciWidthUint32,
- EFI_PCI_ADDRESS (PciAddress.Bus, PciAddress.Device, PciAddress.Function, CapabilityPtr + 0x8),
- 1,
- &DeviceCapability
- );
-
- // Force the Max Payload to 128 Bytes (128 Bytes Max Payload Size = 0)
- DeviceCapability &= ~ ((UINT32)(0x7 << 5 ));
- // Max Read Request Size to 128 Bytes (128 Bytes Max Read Request Size = 0)
- DeviceCapability &= ~ ((UINT32)(0x7 << 12));
- // Enable all error reporting
- DeviceCapability |= 0xF;
-
- RootBridge->Io.Pci.Write (
- &RootBridge->Io,
- EfiPciWidthUint32,
- EFI_PCI_ADDRESS (PciAddress.Bus, PciAddress.Device, PciAddress.Function, CapabilityPtr + 0x8),
- 1,
- &DeviceCapability
- );
-
- return EFI_SUCCESS;
- }
- CapabilityPtr = (CapabilityEntry >> 8) & 0xFF;
- }
- }
- }
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciRootBridge.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciRootBridge.c deleted file mode 100644 index 10a4575c16..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciRootBridge.c +++ /dev/null @@ -1,745 +0,0 @@ -/** @file
-* Implementation of the PCI Root Bridge Protocol for XPress-RICH3 PCIe Root Complex
-*
-* Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "PciHostBridge.h"
-
-#include <Library/DevicePathLib.h>
-#include <Library/DmaLib.h>
-
-#define CPUIO_FROM_ROOT_BRIDGE_INSTANCE(Instance) (Instance->HostBridge->CpuIo)
-#define METRONOME_FROM_ROOT_BRIDGE_INSTANCE(Instance) (Instance->HostBridge->Metronome)
-
-/**
- * PCI Root Bridge Instance Templates
- */
-STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH gDevicePathTemplate = {
- {
- { ACPI_DEVICE_PATH,
- ACPI_DP,
- { (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
- (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) }
- },
- EISA_PNP_ID (0x0A03),
- 0
- },
- {
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- { END_DEVICE_PATH_LENGTH, 0 }
- }
-};
-
-STATIC CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL gIoTemplate = {
- 0,
- PciRbPollMem,
- PciRbPollIo,
- {
- PciRbMemRead,
- PciRbMemWrite
- },
- {
- PciRbIoRead,
- PciRbIoWrite
- },
- {
- PciRbPciRead,
- PciRbPciWrite
- },
- PciRbCopyMem,
- PciRbMap,
- PciRbUnMap,
- PciRbAllocateBuffer,
- PciRbFreeBuffer,
- PciRbFlush,
- PciRbGetAttributes,
- PciRbSetAttributes,
- PciRbConfiguration,
- 0
- };
-
-typedef struct {
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR SpaceDesp[ResTypeMax+1];
- EFI_ACPI_END_TAG_DESCRIPTOR EndDesp;
-} RESOURCE_CONFIGURATION;
-
-
-RESOURCE_CONFIGURATION Configuration = {
- {{ACPI_ADDRESS_SPACE_DESCRIPTOR, 0x2B, ACPI_ADDRESS_SPACE_TYPE_IO , 0, 0, 0, 0, 0, 0, 0},
- {ACPI_ADDRESS_SPACE_DESCRIPTOR, 0x2B, ACPI_ADDRESS_SPACE_TYPE_MEM, 0, 0, 32, 0, 0, 0, 0},
- {ACPI_ADDRESS_SPACE_DESCRIPTOR, 0x2B, ACPI_ADDRESS_SPACE_TYPE_MEM, 0, 6, 32, 0, 0, 0, 0},
- {ACPI_ADDRESS_SPACE_DESCRIPTOR, 0x2B, ACPI_ADDRESS_SPACE_TYPE_MEM, 0, 0, 64, 0, 0, 0, 0},
- {ACPI_ADDRESS_SPACE_DESCRIPTOR, 0x2B, ACPI_ADDRESS_SPACE_TYPE_MEM, 0, 6, 64, 0, 0, 0, 0},
- {ACPI_ADDRESS_SPACE_DESCRIPTOR, 0x2B, ACPI_ADDRESS_SPACE_TYPE_BUS, 0, 0, 0, 0, 255, 0, 255}},
- {ACPI_END_TAG_DESCRIPTOR, 0}
-};
-
-
-EFI_STATUS
-PciRbPollMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- )
-{
- EFI_STATUS Status;
- UINT64 NumberOfTicks;
- UINT32 Remainder;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- EFI_METRONOME_ARCH_PROTOCOL *Metronome;
-
- PCI_TRACE ("PciRbPollMem()");
-
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
- Metronome = METRONOME_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
-
- if (Result == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width > EfiPciWidthUint64) {
- return EFI_INVALID_PARAMETER;
- }
-
- // No matter what, always do a single poll.
- Status = This->Mem.Read (This, Width, Address, 1, Result);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- if ((*Result & Mask) == Value) {
- return EFI_SUCCESS;
- }
-
- if (Delay == 0) {
- return EFI_SUCCESS;
- }
-
- NumberOfTicks = DivU64x32Remainder (Delay, (UINT32) Metronome->TickPeriod, &Remainder);
- if (Remainder != 0) {
- NumberOfTicks += 1;
- }
- NumberOfTicks += 1;
-
- while (NumberOfTicks) {
- Metronome->WaitForTick (Metronome, 1);
-
- Status = This->Mem.Read (This, Width, Address, 1, Result);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((*Result & Mask) == Value) {
- return EFI_SUCCESS;
- }
-
- NumberOfTicks -= 1;
- }
-
- return EFI_TIMEOUT;
-}
-
-EFI_STATUS
-PciRbPollIo (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
- )
-{
- EFI_STATUS Status;
- UINT64 NumberOfTicks;
- UINT32 Remainder;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- EFI_METRONOME_ARCH_PROTOCOL *Metronome;
-
- PCI_TRACE ("PciRbPollIo()");
-
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
- Metronome = METRONOME_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
-
- if (Result == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width > EfiPciWidthUint64) {
- return EFI_INVALID_PARAMETER;
- }
-
- // No matter what, always do a single poll.
- Status = This->Io.Read (This, Width, Address, 1, Result);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- if ((*Result & Mask) == Value) {
- return EFI_SUCCESS;
- }
-
- if (Delay == 0) {
- return EFI_SUCCESS;
- }
-
- NumberOfTicks = DivU64x32Remainder (Delay, (UINT32) Metronome->TickPeriod, &Remainder);
- if (Remainder != 0) {
- NumberOfTicks += 1;
- }
- NumberOfTicks += 1;
-
- while (NumberOfTicks) {
- Metronome->WaitForTick (Metronome, 1);
-
- Status = This->Io.Read (This, Width, Address, 1, Result);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((*Result & Mask) == Value) {
- return EFI_SUCCESS;
- }
-
- NumberOfTicks -= 1;
- }
-
- return EFI_TIMEOUT;
-}
-
-EFI_STATUS
-PciRbMemRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- EFI_CPU_IO2_PROTOCOL *CpuIo;
-
- PCI_TRACE ("PciRbMemRead()");
-
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
- CpuIo = CPUIO_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
-
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width >= EfiPciWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (((Address < PCI_MEM32_BASE) || (Address > (PCI_MEM32_BASE + PCI_MEM32_SIZE))) &&
- ((Address < PCI_MEM64_BASE) || (Address > (PCI_MEM64_BASE + PCI_MEM64_SIZE)))) {
- return EFI_INVALID_PARAMETER;
- }
-
- return CpuIo->Mem.Read (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH)Width, Address, Count, Buffer);
-}
-
-EFI_STATUS
-PciRbMemWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- EFI_CPU_IO2_PROTOCOL *CpuIo;
-
- PCI_TRACE ("PciRbMemWrite()");
-
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
- CpuIo = CPUIO_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
-
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width >= EfiPciWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (((Address < PCI_MEM32_BASE) || (Address > (PCI_MEM32_BASE + PCI_MEM32_SIZE))) &&
- ((Address < PCI_MEM64_BASE) || (Address > (PCI_MEM64_BASE + PCI_MEM64_SIZE)))) {
- return EFI_INVALID_PARAMETER;
- }
-
- return CpuIo->Mem.Write (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH)Width, Address, Count, Buffer);
-}
-
-EFI_STATUS
-PciRbIoRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- PCI_TRACE ("PciRbIoRead()");
-
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width >= EfiPciWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- // IO currently unsupported
- return EFI_INVALID_PARAMETER;
-}
-
-EFI_STATUS
-PciRbIoWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- PCI_TRACE ("PciRbIoWrite()");
-
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width >= EfiPciWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- // IO currently unsupported
- return EFI_INVALID_PARAMETER;
-}
-
-EFI_STATUS
-PciRbPciRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 EfiAddress,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- UINT32 Offset;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- EFI_CPU_IO2_PROTOCOL *CpuIo;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *EfiPciAddress;
- UINT64 Address;
-
- EfiPciAddress = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&EfiAddress;
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
- CpuIo = CPUIO_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
-
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width >= EfiPciWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (EfiPciAddress->ExtendedRegister) {
- Offset = EfiPciAddress->ExtendedRegister;
- } else {
- Offset = EfiPciAddress->Register;
- }
-
- // The UEFI PCI enumerator scans for devices at all possible addresses,
- // and ignores some PCI rules - this results in some hardware being
- // detected multiple times. We work around this by faking absent
- // devices
- if ((EfiPciAddress->Bus == 0) && ((EfiPciAddress->Device != 0) || (EfiPciAddress->Function != 0))) {
- *((UINT32 *)Buffer) = 0xffffffff;
- return EFI_SUCCESS;
- }
- if ((EfiPciAddress->Bus == 1) && ((EfiPciAddress->Device != 0) || (EfiPciAddress->Function != 0))) {
- *((UINT32 *)Buffer) = 0xffffffff;
- return EFI_SUCCESS;
- }
-
- // Work around incorrect class ID in the root bridge
- if ((EfiPciAddress->Bus == 0) && (EfiPciAddress->Device == 0) && (EfiPciAddress->Function == 0) && (Offset == 8)) {
- *((UINT32 *)Buffer) = 0x06040001;
- return EFI_SUCCESS;
- }
-
- Address = PCI_ECAM_BASE + ((EfiPciAddress->Bus << 20) |
- (EfiPciAddress->Device << 15) |
- (EfiPciAddress->Function << 12) | Offset);
-
- if ((Address < PCI_ECAM_BASE) || (Address > PCI_ECAM_BASE + PCI_ECAM_SIZE)) {
- return EFI_INVALID_PARAMETER;
- }
-
- return CpuIo->Mem.Read (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH)Width, Address, Count, Buffer);
-}
-
-EFI_STATUS
-PciRbPciWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 EfiAddress,
- IN UINTN Count,
- IN OUT VOID *Buffer
- )
-{
- UINT32 Offset;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
- EFI_CPU_IO2_PROTOCOL *CpuIo;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *EfiPciAddress;
- UINT64 Address;
-
- EfiPciAddress = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&EfiAddress;
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
- CpuIo = CPUIO_FROM_ROOT_BRIDGE_INSTANCE (RootBridgeInstance);
-
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Width >= EfiPciWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (EfiPciAddress->ExtendedRegister)
- Offset = EfiPciAddress->ExtendedRegister;
- else
- Offset = EfiPciAddress->Register;
-
- Address = PCI_ECAM_BASE + ((EfiPciAddress->Bus << 20) |
- (EfiPciAddress->Device << 15) |
- (EfiPciAddress->Function << 12) | Offset);
-
- if (Address < PCI_ECAM_BASE || Address > PCI_ECAM_BASE + PCI_ECAM_SIZE) {
- return EFI_INVALID_PARAMETER;
- }
-
- return CpuIo->Mem.Write (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH)Width, Address, Count, Buffer);
-}
-
-EFI_STATUS
-PciRbCopyMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 DestAddress,
- IN UINT64 SrcAddress,
- IN UINTN Count
- )
-{
- EFI_STATUS Status;
- BOOLEAN Direction;
- UINTN Stride;
- UINTN Index;
- UINT64 Result;
-
- PCI_TRACE ("PciRbCopyMem()");
-
- if (Width > EfiPciWidthUint64) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (DestAddress == SrcAddress) {
- return EFI_SUCCESS;
- }
-
- Stride = (UINTN)(1 << Width);
-
- Direction = TRUE;
- if ((DestAddress > SrcAddress) && (DestAddress < (SrcAddress + Count * Stride))) {
- Direction = FALSE;
- SrcAddress = SrcAddress + (Count-1) * Stride;
- DestAddress = DestAddress + (Count-1) * Stride;
- }
-
- for (Index = 0; Index < Count; Index++) {
- Status = PciRbMemRead (
- This,
- Width,
- SrcAddress,
- 1,
- &Result
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
- Status = PciRbMemWrite (
- This,
- Width,
- DestAddress,
- 1,
- &Result
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
- if (Direction) {
- SrcAddress += Stride;
- DestAddress += Stride;
- } else {
- SrcAddress -= Stride;
- DestAddress -= Stride;
- }
- }
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciRbMap (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
- )
-{
- DMA_MAP_OPERATION DmaOperation;
-
- PCI_TRACE ("PciRbMap()");
-
- if (Operation == EfiPciOperationBusMasterRead) {
- DmaOperation = MapOperationBusMasterRead;
- } else if (Operation == EfiPciOperationBusMasterWrite) {
- DmaOperation = MapOperationBusMasterWrite;
- } else if (Operation == EfiPciOperationBusMasterCommonBuffer) {
- DmaOperation = MapOperationBusMasterCommonBuffer;
- } else {
- return EFI_INVALID_PARAMETER;
- }
- return DmaMap (DmaOperation, HostAddress, NumberOfBytes, DeviceAddress, Mapping);
-}
-
-EFI_STATUS
-PciRbUnMap (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN VOID *Mapping
- )
-{
- PCI_TRACE ("PciRbUnMap()");
- return DmaUnmap (Mapping);
-}
-
-EFI_STATUS
-PciRbAllocateBuffer (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- IN OUT VOID **HostAddress,
- IN UINT64 Attributes
- )
-{
- PCI_TRACE ("PciRbAllocateBuffer()");
-
- if (Attributes & EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER) {
- return EFI_UNSUPPORTED;
- }
-
- return DmaAllocateBuffer (MemoryType, Pages, HostAddress);
-}
-
-EFI_STATUS
-PciRbFreeBuffer (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
- )
-{
- PCI_TRACE ("PciRbFreeBuffer()");
- return DmaFreeBuffer (Pages, HostAddress);
-}
-
-EFI_STATUS
-PciRbFlush (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
- )
-{
- PCI_TRACE ("PciRbFlush()");
-
- //TODO: Not supported yet
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciRbSetAttributes (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN UINT64 Attributes,
- IN OUT UINT64 *ResourceBase,
- IN OUT UINT64 *ResourceLength
- )
-{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
-
- PCI_TRACE ("PciRbSetAttributes()");
-
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
-
- if (Attributes) {
- if ((Attributes & (~(RootBridgeInstance->Supports))) != 0) {
- return EFI_UNSUPPORTED;
- }
- }
-
- //TODO: Cannot allowed to change attributes
- if (Attributes & ~RootBridgeInstance->Attributes) {
- return EFI_UNSUPPORTED;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciRbGetAttributes (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- OUT UINT64 *Supported,
- OUT UINT64 *Attributes
- )
-{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
-
- PCI_TRACE ("PciRbGetAttributes()");
-
- RootBridgeInstance = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
-
- if (Attributes == NULL && Supported == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- // Set the return value for Supported and Attributes
- if (Supported) {
- *Supported = RootBridgeInstance->Supports;
- }
-
- if (Attributes) {
- *Attributes = RootBridgeInstance->Attributes;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciRbConfiguration (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- OUT VOID **Resources
- )
-{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- UINTN Index;
-
- PCI_TRACE ("PciRbConfiguration()");
-
- RootBridge = INSTANCE_FROM_ROOT_BRIDGE_IO_THIS (This);
-
- for (Index = 0; Index < ResTypeMax; Index++) {
- //if (ResAlloc[Index].Length != 0) => Resource allocated
- if (RootBridge->ResAlloc[Index].Length != 0) {
- Configuration.SpaceDesp[Index].AddrRangeMin = RootBridge->ResAlloc[Index].Base;
- Configuration.SpaceDesp[Index].AddrRangeMax = RootBridge->ResAlloc[Index].Base + RootBridge->ResAlloc[Index].Length - 1;
- Configuration.SpaceDesp[Index].AddrLen = RootBridge->ResAlloc[Index].Length;
- }
- }
-
- // Set up Configuration for the bus
- Configuration.SpaceDesp[Index].AddrRangeMin = RootBridge->BusStart;
- Configuration.SpaceDesp[Index].AddrLen = RootBridge->BusLength;
-
- *Resources = &Configuration;
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciRbConstructor (
- IN PCI_HOST_BRIDGE_INSTANCE *HostBridge,
- IN UINT32 PciAcpiUid,
- IN UINT64 MemAllocAttributes
- )
-{
- PCI_ROOT_BRIDGE_INSTANCE* RootBridge;
- EFI_STATUS Status;
-
- PCI_TRACE ("PciRbConstructor()");
-
- // Allocate Memory for the Instance from a Template
- RootBridge = AllocateZeroPool (sizeof (PCI_ROOT_BRIDGE_INSTANCE));
- if (RootBridge == NULL) {
- PCI_TRACE ("PciRbConstructor(): ERROR: Out of Resources");
- return EFI_OUT_OF_RESOURCES;
- }
- RootBridge->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
- CopyMem (&(RootBridge->DevicePath), &gDevicePathTemplate, sizeof (EFI_PCI_ROOT_BRIDGE_DEVICE_PATH));
- CopyMem (&(RootBridge->Io), &gIoTemplate, sizeof (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL));
-
- // Set Parent Handle
- RootBridge->Io.ParentHandle = HostBridge->Handle;
-
- // Attach the Root Bridge to the PCI Host Bridge Instance
- RootBridge->HostBridge = HostBridge;
-
- // Set Device Path for this Root Bridge
- RootBridge->DevicePath.Acpi.UID = PciAcpiUid;
-
- RootBridge->BusStart = FixedPcdGet32 (PcdPciBusMin);
- RootBridge->BusLength = FixedPcdGet32 (PcdPciBusMax) - FixedPcdGet32 (PcdPciBusMin) + 1;
-
- // PCI Attributes
- RootBridge->Supports = 0;
- RootBridge->Attributes = 0;
-
- // Install Protocol Instances. It will also generate a device handle for the PCI Root Bridge
- Status = gBS->InstallMultipleProtocolInterfaces (
- &RootBridge->Handle,
- &gEfiDevicePathProtocolGuid, &RootBridge->DevicePath,
- &gEfiPciRootBridgeIoProtocolGuid, &RootBridge->Io,
- NULL
- );
- ASSERT (RootBridge->Signature == PCI_ROOT_BRIDGE_SIGNATURE);
- if (EFI_ERROR (Status)) {
- PCI_TRACE ("PciRbConstructor(): ERROR: Fail to install Protocol Interfaces");
- FreePool (RootBridge);
- return EFI_DEVICE_ERROR;
- }
-
- HostBridge->RootBridge = RootBridge;
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PciRbDestructor (
- IN PCI_ROOT_BRIDGE_INSTANCE* RootBridge
- )
-{
- EFI_STATUS Status;
-
- Status = gBS->UninstallMultipleProtocolInterfaces (
- RootBridge->Handle,
- &gEfiDevicePathProtocolGuid, &RootBridge->DevicePath,
- &gEfiPciRootBridgeIoProtocolGuid, &RootBridge->Io,
- NULL
- );
-
- FreePool (RootBridge);
-
- return Status;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.c deleted file mode 100644 index 06de6d5d9a..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.c +++ /dev/null @@ -1,167 +0,0 @@ -/** @file
-* Initialize the XPress-RICH3 PCIe Root complex
-*
-* Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "PciHostBridge.h"
-
-#include <Protocol/Cpu.h>
-
-#include "ArmPlatform.h"
-
-EFI_CPU_ARCH_PROTOCOL *mCpu;
-
-#define PCI_BRIDGE_REVISION_ID 1
-#define CLASS_CODE_REGISTER(Class, SubClass, ProgIf) ((Class << 16) | (SubClass << 8) | ProgIf)
-#define PLDA_BRIDGE_CCR CLASS_CODE_REGISTER(PCI_CLASS_BRIDGE, \
- PCI_CLASS_BRIDGE_P2P, \
- PCI_IF_BRIDGE_P2P)
-
-STATIC
-VOID
-SetTranslationAddressEntry (
- IN EFI_CPU_IO2_PROTOCOL *CpuIo,
- IN UINTN Entry,
- IN UINT64 SourceAddress,
- IN UINT64 TranslatedAddress,
- IN UINT64 TranslationSize,
- IN UINT64 TranslationParameter
- )
-{
- UINTN Log2Size = HighBitSet64 (TranslationSize);
-
- // Ensure the size is a power of two. Restriction form the AXI Translation logic
- // Othwerwise we increase the translation size
- if (TranslationSize != (1ULL << Log2Size)) {
- DEBUG ((EFI_D_WARN, "PCI: The size 0x%lX of the region 0x%lx has been increased to "
- "be a power of two for the AXI translation table.\n",
- TranslationSize, SourceAddress));
- Log2Size++;
- }
-
- PCIE_ROOTPORT_WRITE32 (Entry + PCI_ATR_SRC_ADDR_LOW_SIZE,
- (UINT32)SourceAddress | ((Log2Size - 1) << 1) | 0x1);
- PCIE_ROOTPORT_WRITE32 (Entry + PCI_ATR_SRC_ADDR_HI, SourceAddress >> 32);
-
- PCIE_ROOTPORT_WRITE32 (Entry + PCI_ATR_TRSL_ADDR_LOW, (UINT32)TranslatedAddress);
- PCIE_ROOTPORT_WRITE32 (Entry + PCI_ATR_TRSL_ADDR_HI, TranslatedAddress >> 32);
-
- PCIE_ROOTPORT_WRITE32 (Entry + PCI_ATR_TRSL_PARAM, TranslationParameter);
-}
-
-EFI_STATUS
-HWPciRbInit (
- IN EFI_CPU_IO2_PROTOCOL *CpuIo
- )
-{
- UINT32 Value;
- UINT32 Index;
- UINTN TranslationTable;
-
- PCI_TRACE ("VExpressPciRbInit()");
-
- PCI_TRACE ("PCIe Setting up Address Translation");
-
- PCIE_ROOTPORT_WRITE32 (PCIE_BAR_WIN, PCIE_BAR_WIN_SUPPORT_IO | PCIE_BAR_WIN_SUPPORT_MEM | PCIE_BAR_WIN_SUPPORT_MEM64);
-
- // Setup the PCI Configuration Registers
- // Offset 0a: SubClass 04 PCI-PCI Bridge
- // Offset 0b: BaseClass 06 Bridge Device
- // The Class Code register is a 24 bit and can be configured by setting up the PCIE_PCI_IDS
- // Refer [1] Chapter 13
- PCIE_ROOTPORT_WRITE32 (PCIE_PCI_IDS + PCIE_PCI_IDS_CLASSCODE_OFFSET, ((PLDA_BRIDGE_CCR << 8) | PCI_BRIDGE_REVISION_ID));
-
- //
- // PCIE Window 0 -> AXI4 Slave 0 Address Translations
- //
- TranslationTable = VEXPRESS_ATR_PCIE_WIN0;
-
- // MSI Support
- SetTranslationAddressEntry (CpuIo, TranslationTable, ARM_JUNO_GIV2M_MSI_BASE, ARM_JUNO_GIV2M_MSI_BASE,
- ARM_JUNO_GIV2M_MSI_SZ, PCI_ATR_TRSLID_AXIDEVICE);
- TranslationTable += PCI_ATR_ENTRY_SIZE;
-
- // System Memory Support
- SetTranslationAddressEntry (CpuIo, TranslationTable, PcdGet64 (PcdSystemMemoryBase), PcdGet64 (PcdSystemMemoryBase),
- PcdGet64 (PcdSystemMemorySize), PCI_ATR_TRSLID_AXIMEMORY);
- TranslationTable += PCI_ATR_ENTRY_SIZE;
- SetTranslationAddressEntry (CpuIo, TranslationTable, ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE, ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE,
- ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ, PCI_ATR_TRSLID_AXIMEMORY);
-
- //
- // PCIE Window 0 -> AXI4 Slave 0 Address Translations
- //
- TranslationTable = VEXPRESS_ATR_AXI4_SLV1;
-
- // PCI ECAM Support
- SetTranslationAddressEntry (CpuIo, TranslationTable, PCI_ECAM_BASE, PCI_ECAM_BASE, PCI_ECAM_SIZE, PCI_ATR_TRSLID_PCIE_CONF);
- TranslationTable += PCI_ATR_ENTRY_SIZE;
-
- // PCI IO Support
- SetTranslationAddressEntry (CpuIo, TranslationTable, PCI_IO_BASE, PCI_IO_BASE, PCI_IO_SIZE, PCI_ATR_TRSLID_PCIE_IO);
- TranslationTable += PCI_ATR_ENTRY_SIZE;
-
- // PCI MEM32 Support
- SetTranslationAddressEntry (CpuIo, TranslationTable, PCI_MEM32_BASE, PCI_MEM32_BASE, PCI_MEM32_SIZE, PCI_ATR_TRSLID_PCIE_MEMORY);
- TranslationTable += PCI_ATR_ENTRY_SIZE;
-
- // PCI MEM64 Support
- SetTranslationAddressEntry (CpuIo, TranslationTable, PCI_MEM64_BASE, PCI_MEM64_BASE, PCI_MEM64_SIZE, PCI_ATR_TRSLID_PCIE_MEMORY);
-
- // Add credits
- PCIE_ROOTPORT_WRITE32 (PCIE_VC_CRED, 0x00f0b818);
- PCIE_ROOTPORT_WRITE32 (PCIE_VC_CRED + 4, 0x1);
-
- // Allow ECRC
- PCIE_ROOTPORT_WRITE32 (PCIE_PEX_SPC2, 0x6006);
-
- // Reset controller
- PCIE_CONTROL_WRITE32 (PCIE_CONTROL_RST_CTL, PCIE_CONTROL_RST_CTL_RCPHY_REL);
-
- // Wait for reset
- for (Index = 0; Index < 1000; Index++) {
- gBS->Stall (1000);
- PCIE_CONTROL_READ32 (PCIE_CONTROL_RST_STS, Value);
- if ((Value & PCIE_CONTROL_RST_STS_RCPHYPLL_OUT) == PCIE_CONTROL_RST_STS_RCPHYPLL_OUT) {
- break;
- }
- }
-
- // Check for reset
- if (!(Value & PCIE_CONTROL_RST_STS_RCPHYPLL_OUT)) {
- DEBUG ((EFI_D_ERROR, "PCIe failed to come out of reset: %x.\n", Value));
- return EFI_NOT_READY;
- }
-
- gBS->Stall (1000);
- PCI_TRACE ("Checking link Status...");
-
- // Wait for Link Up
- for (Index = 0; Index < 1000; Index++) {
- gBS->Stall (1000);
- PCIE_ROOTPORT_READ32 (VEXPRESS_BASIC_STATUS, Value);
- if (Value & LINK_UP) {
- break;
- }
- }
-
- // Check for link up
- if (!(Value & LINK_UP)) {
- DEBUG ((EFI_D_ERROR, "PCIe link not up: %x.\n", Value));
- return EFI_NOT_READY;
- }
-
- PCIE_ROOTPORT_WRITE32 (PCIE_IMASK_LOCAL, PCIE_INT_MSI | PCIE_INT_INTx);
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.h b/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.h deleted file mode 100644 index a0c11a7056..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.h +++ /dev/null @@ -1,111 +0,0 @@ -/** @file
-* Header containing the Xpress-RICH3 PCIe Root Complex specific values
-*
-* Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __XPRESS_RICH3_H__
-#define __XPRESS_RICH3_H__
-
-#include <Protocol/CpuIo2.h>
-#include <Library/PcdLib.h>
-
-#define PCI_ECAM_BASE FixedPcdGet64 (PcdPciConfigurationSpaceBaseAddress)
-#define PCI_ECAM_SIZE FixedPcdGet64 (PcdPciConfigurationSpaceSize)
-#define PCI_IO_BASE FixedPcdGet64 (PcdPciIoBase)
-#define PCI_IO_SIZE FixedPcdGet64 (PcdPciIoSize)
-#define PCI_MEM32_BASE FixedPcdGet64 (PcdPciMmio32Base)
-#define PCI_MEM32_SIZE FixedPcdGet64 (PcdPciMmio32Size)
-#define PCI_MEM64_BASE FixedPcdGet64 (PcdPciMmio64Base)
-#define PCI_MEM64_SIZE FixedPcdGet64 (PcdPciMmio64Size)
-
-/*
- * Bridge Internal Registers
- */
-
-// PCIe Available Credit Settings
-#define PCIE_VC_CRED 0x090
-// PCIe PCI Standard Configuration Identification Settings registers
-#define PCIE_PCI_IDS 0x098
-#define PCIE_PCI_IDS_CLASSCODE_OFFSET 0x4
-// PCIe Specific 2 Capabilities Settings
-#define PCIE_PEX_SPC2 0x0d8
-// PCIe Windows Settings register
-#define PCIE_BAR_WIN 0x0FC
-// Local Processor Interrupt Mask
-#define PCIE_IMASK_LOCAL 0x180
-
-#define PCIE_BAR_WIN_SUPPORT_IO BIT0
-#define PCIE_BAR_WIN_SUPPORT_IO32 BIT1
-#define PCIE_BAR_WIN_SUPPORT_MEM BIT2
-#define PCIE_BAR_WIN_SUPPORT_MEM64 BIT3
-
-#define PCIE_INT_MSI BIT28
-#define PCIE_INT_A BIT24
-#define PCIE_INT_B BIT25
-#define PCIE_INT_C BIT26
-#define PCIE_INT_D BIT27
-#define PCIE_INT_INTx (PCIE_INT_A | PCIE_INT_B |\
- PCIE_INT_C | PCIE_INT_D)
-
-/*
- * PCIe Control Registers
- */
-#define PCIE_CONTROL_RST_CTL 0x1004
-#define PCIE_CONTROL_RST_STS 0x1008
-
-/*
- * PCI Express Address Translation registers
- * All are offsets from PcdPcieControlBaseAddress
- */
-#define VEXPRESS_ATR_PCIE_WIN0 0x600
-#define VEXPRESS_ATR_AXI4_SLV0 0x800
-#define VEXPRESS_ATR_AXI4_SLV1 0x820
-
-#define PCI_ATR_ENTRY_SIZE 0x20
-#define PCI_ATR_SRC_ADDR_LOW_SIZE 0
-#define PCI_ATR_SRC_ADDR_HI 0x4
-#define PCI_ATR_TRSL_ADDR_LOW 0x8
-#define PCI_ATR_TRSL_ADDR_HI 0xc
-#define PCI_ATR_TRSL_PARAM 0x10
-
-#define PCI_ATR_TRSLID_AXIDEVICE 0x420004
-#define PCI_ATR_TRSLID_AXIMEMORY 0x4e0004
-#define PCI_ATR_TRSLID_PCIE_CONF 0x000001
-#define PCI_ATR_TRSLID_PCIE_IO 0x020000
-#define PCI_ATR_TRSLID_PCIE_MEMORY 0x000000
-
-#define PCIE_CONTROL_RST_CTL_RC_REL (1 << 1)
-#define PCIE_CONTROL_RST_CTL_PHY_REL (1 << 0)
-#define PCIE_CONTROL_RST_CTL_RCPHY_REL (PCIE_CONTROL_RST_CTL_RC_REL | PCIE_CONTROL_RST_CTL_PHY_REL)
-
-#define PCIE_CONTROL_RST_STS_RC_ST (1 << 2)
-#define PCIE_CONTROL_RST_STS_PHY_ST (1 << 1)
-#define PCIE_CONTROL_RST_STS_PLL_ST (1 << 0)
-#define PCIE_CONTROL_RST_STS_RCPHYPLL_OUT (PCIE_CONTROL_RST_STS_RC_ST | PCIE_CONTROL_RST_STS_PHY_ST | PCIE_CONTROL_RST_STS_PLL_ST)
-
-#define VEXPRESS_BASIC_STATUS 0x18
-#define LINK_UP 0xff
-
-/*
- * Initialize Versatile Express PCIe Host Bridge
- */
-EFI_STATUS
-VExpressPciRbInit (
- IN EFI_CPU_IO2_PROTOCOL *CpuIo
- );
-
-// Does not support neither EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
-// nor EFI_PCI_HOST_BRIDGE_MEM64_DECODE
-#define PCI_MEMORY_ALLOCATION_ATTRIBUTES 0
-
-#endif
diff --git a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h deleted file mode 100644 index 9928c5ae7a..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h +++ /dev/null @@ -1,94 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_JUNO_H__
-#define __ARM_JUNO_H__
-
-#include <VExpressMotherBoard.h>
-
-/***********************************************************************************
-// Platform Memory Map
-************************************************************************************/
-
-// Motherboard Peripheral and On-chip peripheral
-#define ARM_VE_BOARD_PERIPH_BASE 0x1C010000
-
-// NOR Flash 0
-#define ARM_VE_SMB_NOR0_BASE 0x08000000
-#define ARM_VE_SMB_NOR0_SZ SIZE_64MB
-
-// Off-Chip peripherals (USB, Ethernet, VRAM)
-#define ARM_VE_SMB_PERIPH_BASE 0x18000000
-#define ARM_VE_SMB_PERIPH_SZ (SIZE_64MB + SIZE_2MB)
-
-// On-Chip non-secure ROM
-#define ARM_JUNO_NON_SECURE_ROM_BASE 0x1F000000
-#define ARM_JUNO_NON_SECURE_ROM_SZ SIZE_16MB
-
-// On-Chip Peripherals
-#define ARM_JUNO_PERIPHERALS_BASE 0x20000000
-#define ARM_JUNO_PERIPHERALS_SZ 0x0E000000
-
-#define ARM_JUNO_GIV2M_MSI_BASE 0x2c1c0000
-#define ARM_JUNO_GIV2M_MSI_SZ SIZE_256KB
-
-// On-Chip non-secure SRAM
-#define ARM_JUNO_NON_SECURE_SRAM_BASE 0x2E000000
-#define ARM_JUNO_NON_SECURE_SRAM_SZ SIZE_16MB
-
-// SOC peripherals (HDLCD, UART, I2C, I2S, USB, SMC-PL354, etc)
-#define ARM_JUNO_SOC_PERIPHERALS_BASE 0x7FF50000
-#define ARM_JUNO_SOC_PERIPHERALS_SZ (SIZE_64KB * 9)
-
-// 6GB of DRAM from the 64bit address space
-#define ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE 0x0880000000
-#define ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ (SIZE_2GB + SIZE_4GB)
-
-//
-// ACPI table information used to initialize tables.
-//
-#define EFI_ACPI_ARM_OEM_ID 'A','R','M','L','T','D' // OEMID 6 bytes long
-#define EFI_ACPI_ARM_OEM_TABLE_ID SIGNATURE_64('A','R','M','-','J','U','N','O') // OEM table id 8 bytes long
-#define EFI_ACPI_ARM_OEM_REVISION 0x20140727
-#define EFI_ACPI_ARM_CREATOR_ID SIGNATURE_32('A','R','M',' ')
-#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
-
-// A macro to initialise the common header part of EFI ACPI tables as defined by
-// EFI_ACPI_DESCRIPTION_HEADER structure.
-#define ARM_ACPI_HEADER(Signature, Type, Revision) { \
- Signature, /* UINT32 Signature */ \
- sizeof (Type), /* UINT32 Length */ \
- Revision, /* UINT8 Revision */ \
- 0, /* UINT8 Checksum */ \
- { EFI_ACPI_ARM_OEM_ID }, /* UINT8 OemId[6] */ \
- EFI_ACPI_ARM_OEM_TABLE_ID, /* UINT64 OemTableId */ \
- EFI_ACPI_ARM_OEM_REVISION, /* UINT32 OemRevision */ \
- EFI_ACPI_ARM_CREATOR_ID, /* UINT32 CreatorId */ \
- EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \
- }
-
-#define JUNO_WATCHDOG_COUNT 2
-
-// Define if the exported ACPI Tables are based on ACPI 5.0 spec or latest
-//#define ARM_JUNO_ACPI_5_0
-
-//
-// Address of the system registers that contain the MAC address
-// assigned to the PCI Gigabyte Ethernet device.
-//
-
-#define ARM_JUNO_SYS_PCIGBE_L (ARM_VE_BOARD_PERIPH_BASE + 0x74)
-#define ARM_JUNO_SYS_PCIGBE_H (ARM_VE_BOARD_PERIPH_BASE + 0x78)
-
-#endif
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S deleted file mode 100644 index 73b249ca5f..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S +++ /dev/null @@ -1,75 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <AsmMacroIoLibV8.h>
-#include <Library/ArmLib.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-
-PrimaryCoreMpid: .word 0x0
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-// With this function: CorePos = (ClusterId * 2) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
- and x1, x0, #ARM_CORE_MASK
- and x0, x0, #ARM_CLUSTER_MASK
- add x0, x1, x0, LSR #7
- ret
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- ldr x0, =PrimaryCoreMpid
- ldrh w0, [x0]
- ret
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
- ldrh w1, [x1]
- and x0, x0, x1
-
- ldr x1, =PrimaryCoreMpid
- ldrh w1, [x1]
-
- cmp w0, w1
- mov x0, #1
- mov x1, #0
- csel x0, x0, x1, eq
- ret
-
-ASM_PFX(ArmPlatformPeiBootAction):
- // The trusted firmware passes the primary CPU MPID through x0 register.
- // Save it in a variable.
- ldr x1, =PrimaryCoreMpid
- str w0, [x1]
- ret
-
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S deleted file mode 100644 index 2efb5451b8..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S +++ /dev/null @@ -1,105 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <AsmMacroIoLibV8.h>
-#include <Library/ArmLib.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-
-PrimaryCoreMpid: .word 0x0
-
-//
-// Return the core position from the value of its MpId register
-//
-// This function returns the core position from the position 0 in the processor.
-// This function might be called from assembler before any stack is set.
-//
-// @return Return the core position
-//
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-// With this function: CorePos = (ClusterId * 2) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
-
-//
-// Return the MpId of the primary core
-//
-// This function returns the MpId of the primary core.
-// This function might be called from assembler before any stack is set.
-//
-// @return Return the MpId of the primary core
-//
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- ldr r0, =PrimaryCoreMpid
- ldr r0, [r0]
- bx lr
-
-//
-// Return a non-zero value if the callee is the primary core
-//
-// This function returns a non-zero value if the callee is the primary core.
-// The primary core is the core responsible to initialize the hardware and run UEFI.
-// This function might be called from assembler before any stack is set.
-//
-// @return Return a non-zero value if the callee is the primary core.
-//
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
- and r0, r0, r1
-
- ldr r1, =PrimaryCoreMpid
- ldr r1, [r1]
-
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
-
-//
-// First platform specific function to be called in the PEI phase
-//
-// This function is actually the first function called by the PrePi
-// or PrePeiCore modules. It allows to retrieve arguments passed to
-// the UEFI firmware through the CPU registers.
-//
-ASM_PFX(ArmPlatformPeiBootAction):
- // The trusted firmware passes the primary CPU MPID through r0 register.
- // Save it in a variable.
- ldr r1, =PrimaryCoreMpid
- str r0, [r1]
- bx lr
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJuno.c b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJuno.c deleted file mode 100644 index 3be26d3ed0..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJuno.c +++ /dev/null @@ -1,163 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mJunoInfoTable[] = {
- {
- // Cluster 0, Core 0
- 0x0, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 1
- 0x0, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 0
- 0x1, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 1
- 0x1, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 2
- 0x1, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 3
- 0x1, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- }
-};
-
-/**
- Return the current Boot Mode
-
- This function returns the boot reason on the platform
-
- @return Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
- VOID
- )
-{
- return BOOT_WITH_FULL_CONFIGURATION;
-}
-
-/**
- Initialize controllers that must setup in the normal world
-
- This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
- in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
- IN UINTN MpId
- )
-{
- return RETURN_SUCCESS;
-}
-
-/**
- Initialize the system (or sometimes called permanent) memory
-
- This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
- VOID
- )
-{
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
- OUT UINTN *CoreCount,
- OUT ARM_CORE_INFO **ArmCoreTable
- )
-{
- // Only support one cluster
- *CoreCount = sizeof(mJunoInfoTable) / sizeof(ARM_CORE_INFO);
- *ArmCoreTable = mJunoInfoTable;
- return EFI_SUCCESS;
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &mArmMpCoreInfoPpiGuid,
- &mMpCoreInfoPpi
- }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
- OUT UINTN *PpiListSize,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
- )
-{
- *PpiListSize = sizeof(gPlatformPpiTable);
- *PpiList = gPlatformPpiTable;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoLib.inf b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoLib.inf deleted file mode 100644 index 092b606b24..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoLib.inf +++ /dev/null @@ -1,64 +0,0 @@ -#
-# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmJunoLib
- FILE_GUID = 87c525cd-e1a2-469e-994c-c28cd0c7bd0d
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- HobLib
- MemoryAllocationLib
- SerialPortLib
-
-[Sources.common]
- ArmJuno.c
- ArmJunoMem.c
-
-[Sources.AARCH64]
- AArch64/ArmJunoHelper.S
-
-[Sources.ARM]
- Arm/ArmJunoHelper.S | GCC
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmTokenSpaceGuid.PcdFvBaseAddress
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
-
- gArmJunoTokenSpaceGuid.PcdPcieControlBaseAddress
- gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
- gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceSize
-
-[Pcd]
- gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
- gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
- gArmPlatformTokenSpaceGuid.PcdPciMmio64Base
- gArmPlatformTokenSpaceGuid.PcdPciMmio64Size
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoMem.c b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoMem.c deleted file mode 100644 index 41731c1ebd..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoMem.c +++ /dev/null @@ -1,174 +0,0 @@ -/** @file
-*
-* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-#include <ArmPlatform.h>
-
-// The total number of descriptors, including the final "end-of-table" descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-/**
- Return the Virtual Memory Map of your platform
-
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
-
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
- Virtual Memory mapping. This array must be ended by a zero-filled
- entry
-
-**/
-VOID
-ArmPlatformGetVirtualMemoryMap (
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
- )
-{
- ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
- UINTN Index = 0;
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
-
- ASSERT (VirtualMemoryMap != NULL);
-
- //
- // Declared the additional 6GB of memory
- //
- ResourceAttributes =
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED;
-
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
- ResourceAttributes,
- ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE,
- ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ);
-
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
- if (VirtualMemoryTable == NULL) {
- return;
- }
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
- // SMB CS0 - NOR0 Flash
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].Length = SIZE_256KB * 255;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
- // Environment Variables region
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);
- VirtualMemoryTable[Index].Length = SIZE_64KB * 4;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS2 & CS3 - Off-chip (motherboard) peripherals
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // Juno OnChip non-secure ROM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_NON_SECURE_ROM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_NON_SECURE_ROM_BASE;
- VirtualMemoryTable[Index].Length = ARM_JUNO_NON_SECURE_ROM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // Juno OnChip peripherals
- VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_PERIPHERALS_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_PERIPHERALS_BASE;
- VirtualMemoryTable[Index].Length = ARM_JUNO_PERIPHERALS_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // Juno OnChip non-secure SRAM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_NON_SECURE_SRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_NON_SECURE_SRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_JUNO_NON_SECURE_SRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // PCI Root Complex
- VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPcieControlBaseAddress);
- VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPcieControlBaseAddress);
- VirtualMemoryTable[Index].Length = SIZE_128KB;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- //
- // PCI Configuration Space
- //
- VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);
- VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);
- VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciConfigurationSpaceSize);
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- //
- // PCI Memory Space
- //
- VirtualMemoryTable[++Index].PhysicalBase = PcdGet32 (PcdPciMmio32Base);
- VirtualMemoryTable[Index].VirtualBase = PcdGet32 (PcdPciMmio32Base);
- VirtualMemoryTable[Index].Length = PcdGet32 (PcdPciMmio32Size);
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- //
- // 64-bit PCI Memory Space
- //
- VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciMmio64Base);
- VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciMmio64Base);
- VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciMmio64Size);
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // Juno SOC peripherals
- VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_SOC_PERIPHERALS_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_SOC_PERIPHERALS_BASE;
- VirtualMemoryTable[Index].Length = ARM_JUNO_SOC_PERIPHERALS_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // DDR - 2GB
- VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
- VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);
- VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // DDR - 6GB
- VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE;
- VirtualMemoryTable[Index].Length = ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // End of Table
- VirtualMemoryTable[++Index].PhysicalBase = 0;
- VirtualMemoryTable[Index].VirtualBase = 0;
- VirtualMemoryTable[Index].Length = 0;
- VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
-
- *VirtualMemoryMap = VirtualMemoryTable;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJuno.c b/ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJuno.c deleted file mode 100644 index b31b9635b7..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJuno.c +++ /dev/null @@ -1,68 +0,0 @@ -/** @file
-
- Copyright (c) 2011-2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- **/
-
-#include <PiDxe.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/NorFlashPlatformLib.h>
-#include <ArmPlatform.h>
-
-NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
- {
- ARM_VE_SMB_NOR0_BASE,
- ARM_VE_SMB_NOR0_BASE,
- SIZE_256KB * 255,
- SIZE_256KB,
- {0xE7223039, 0x5836, 0x41E1, { 0xB5, 0x42, 0xD7, 0xEC, 0x73, 0x6C, 0x5E, 0x59} }
- },
- {
- ARM_VE_SMB_NOR0_BASE,
- ARM_VE_SMB_NOR0_BASE + SIZE_256KB * 255,
- SIZE_64KB * 4,
- SIZE_64KB,
- {0x02118005, 0x9DA7, 0x443A, { 0x92, 0xD5, 0x78, 0x1F, 0x02, 0x2A, 0xED, 0xBB } }
- },
-};
-
-EFI_STATUS
-NorFlashPlatformInitialization (
- VOID
- )
-{
- // Everything seems ok so far, so now we need to disable the platform-specific
- // flash write protection for Versatile Express
- if ((MmioRead32 (ARM_VE_SYS_FLASH) & 0x1) == 0) {
- // Writing to NOR FLASH is disabled, so enable it
- MmioWrite32 (ARM_VE_SYS_FLASH, 1);
- DEBUG((DEBUG_BLKIO, "NorFlashPlatformInitialization: informational - Had to enable HSYS_FLASH flag.\n" ));
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-NorFlashPlatformGetDevices (
- OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,
- OUT UINT32 *Count
- )
-{
- if ((NorFlashDevices == NULL) || (Count == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- *NorFlashDevices = mNorFlashDevices;
- *Count = sizeof (mNorFlashDevices) / sizeof (NOR_FLASH_DESCRIPTION);
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf b/ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf deleted file mode 100644 index 6b13635088..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf +++ /dev/null @@ -1,32 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = NorFlashJunoLib
- FILE_GUID = 3eb6cbc4-ce95-11e2-b1bd-00241d0c1ba8
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = NorFlashPlatformLib
-
-[Sources.common]
- NorFlashJuno.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- IoLib
diff --git a/ArmPlatformPkg/ArmJunoPkg/Makefile b/ArmPlatformPkg/ArmJunoPkg/Makefile deleted file mode 100644 index d8d1f8465a..0000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Makefile +++ /dev/null @@ -1,87 +0,0 @@ -# -# Copyright (c) 2013-2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -# Define the following variable to specify an alternative toolchain to the one located in your PATH: -# - RVCT_TOOLS_PATH: for RVCT and RVCTLINUX toolchains - -EDK2_TOOLCHAIN ?= GCC49 -GCC49_AARCH64_PREFIX ?= aarch64-none-elf- -EDK2_ARCH ?= AARCH64 -EDK2_BUILD ?= DEBUG -EDK2_DSC = ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc -DEST_BIN_ROOT ?= - -ifeq ($(EDK2_DSC),"") - $(error The Makefile macro 'EDK2_DSC' must be defined with an EDK2 DSC file.) -endif - -ifeq ("$(OS)","Windows_NT") -export WORKSPACE?=$(PWD) -export EDK_TOOLS_PATH ?= $(WORKSPACE)\BaseTools -else -export WORKSPACE?=$(PWD) -endif - -# Define the destination of the Firmware Image Package (FIP) if not defined -ifndef JUNO_FIP - ifdef DEST_BIN_ROOT - JUNO_FIP=$(DEST_BIN_ROOT)/fip.bin - else - JUNO_FIP=fip.bin - endif -endif - -SHELL := /bin/bash -SILENT ?= @ -ECHO ?= echo -MAKE ?= make -i -k -RM ?= rm -f -CP ?= cp - -.PHONY: all clean - -EDK2_CONF = Conf/BuildEnv.sh Conf/build_rule.txt Conf/target.txt Conf/tools_def.txt - -all: $(EDK2_CONF) -ifeq ("$(OS)","Windows_NT") - build -a $(EDK2_ARCH) -p $(EDK2_DSC) -t $(EDK2_TOOLCHAIN) -b $(EDK2_BUILD) $(EDK2_MACROS) -else - . ./edksetup.sh; GCC49_AARCH64_PREFIX=$(GCC49_AARCH64_PREFIX) build -a $(EDK2_ARCH) -p $(EDK2_DSC) -t $(EDK2_TOOLCHAIN) -b $(EDK2_BUILD) $(EDK2_MACROS) -endif -ifeq ("$(OS)","Windows_NT") - $(SILENT)$(ECHO) "Warning: The UEFI Firmware must be added to the Firmware Image Package (FIP)." -else - $(SILENT)which fip_create ; \ - if [ $$? -ne 0 ]; then \ - $(ECHO) "Warning: 'fip_create' tool is not in the PATH. The UEFI binary will not be added in the Firmware Image Package (FIP)."; \ - else \ - fip_create --bl33 $(WORKSPACE)/Build/ArmJuno/$(EDK2_BUILD)_$(EDK2_TOOLCHAIN)/FV/BL33_AP_UEFI.fd --dump $(JUNO_FIP); \ - fi -endif - -$(EDK2_CONF): -ifeq ("$(OS)","Windows_NT") - copy $(EDK_TOOLS_PATH)\Conf\build_rule.template Conf\build_rule.txt - copy $(EDK_TOOLS_PATH)\Conf\FrameworkDatabase.template Conf\FrameworkDatabase.txt - copy $(EDK_TOOLS_PATH)\Conf\target.template Conf\target.txt - copy $(EDK_TOOLS_PATH)\Conf\tools_def.template Conf\tools_def.txt -else - . ./edksetup.sh; $(MAKE) -C BaseTools -endif - -clean: -ifeq ("$(OS)","Windows_NT") - build -a $(EDK2_ARCH) -p $(EDK2_DSC) -t $(EDK2_TOOLCHAIN) -b $(EDK2_BUILD) $(EDK2_MACROS) cleanall -else - . ./edksetup.sh; build -a $(EDK2_ARCH) -p $(EDK2_DSC) -t $(EDK2_TOOLCHAIN) -b $(EDK2_BUILD) $(EDK2_MACROS) cleanall; \ - rm -Rf $(EDK2_CONF) Conf/.cache -endif |