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| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:05:20 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:05:20 +0000 |
| commit | 2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7 (patch) | |
| tree | fcc7592f5e22d5f0cc56be5339176545d885be52 /ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc | |
| parent | f156d5b49d3f1c3dd1a9dc3c9b6d94b02c056ad1 (diff) | |
| download | edk2-platforms-2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7.tar.xz | |
ArmPlatformPkg: Changed memory model for the stacks
In the previous version, every cores had the same stack size.
To avoid to waste memory with secondary core stacks, the primary core stack
size is now different from the secondary cores stack size.
These are the Stack PCDs and their default values:
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc')
| -rw-r--r-- | ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc index 12f2cbb11c..808793cb2a 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc +++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc @@ -344,16 +344,11 @@ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
# Stack for CPU Cores in Secure Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000 # Top of SEC Stack for Secure World
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0x2000 # Size of SEC Stack for Secure World
-
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000
# Stack for CPU Cores in Secure Monitor Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x4A000000 # Top of SEC Stack for Monitor World
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x2000 # Size of SEC Stack for Monitor World
-
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x4A000000
# Stack for CPU Cores in Non Secure Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000 # Top of SEC Stack for Normal World
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x20000 # Size of SEC Stack for Normal World
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x48000000
# System Memory (256MB)
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x70000000
|