ARM Packages: Fixed line endings

This large code change only modifies the line endings to be CRLF to be
compliant with the EDK2 coding convention document.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 146 insertions, 146 deletions

diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c
index a5fb26a327..77d48acce1 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c
@@ -1,146 +1,146 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL341Dmc.h>
-#include <Drivers/SP804Timer.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mRealViewEbMpCoreInfoTable[] = {
-  {
-    // Cluster 0, Core 0
-    0x0, 0x0,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 1
-    0x0, 0x1,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  }
-};
-
-/**
-  Return the current Boot Mode
-
-  This function returns the boot reason on the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
-  VOID
-  )
-{
-  return BOOT_WITH_FULL_CONFIGURATION;
-}
-
-/**
-  Initialize controllers that must setup in the normal world
-
-  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
-  in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // Disable memory remapping and return to normal mapping
-  MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
-
-  // Configure periodic timer (TIMER0) for 1MHz operation
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
-  // Configure 1MHz clock
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
-  // configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
-  // Configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Initialize the system (or sometimes called permanent) memory
-
-  This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
-  VOID
-  )
-{
-  // We do not need to initialize the System Memory on RTSM
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
-  OUT UINTN                   *CoreCount,
-  OUT ARM_CORE_INFO           **ArmCoreTable
-  )
-{
-  if ((MmioRead32 (ARM_EB_SYS_PROCID0_REG) & ARM_EB_SYS_PROC_ID_MASK) == ARM_EB_SYS_PROC_ID_CORTEX_A9) {
-    *CoreCount    = sizeof(mRealViewEbMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
-    *ArmCoreTable = mRealViewEbMpCoreInfoTable;
-    return EFI_SUCCESS;
-  } else {
-    return EFI_UNSUPPORTED;
-  }
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
-  {
-    EFI_PEI_PPI_DESCRIPTOR_PPI,
-    &mArmMpCoreInfoPpiGuid,
-    &mMpCoreInfoPpi
-  }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
-  OUT UINTN                   *PpiListSize,
-  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
-  )
-{
-  *PpiListSize = sizeof(gPlatformPpiTable);
-  *PpiList = gPlatformPpiTable;
-}
-
+/** @file

+*

+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.

+*  

+*  This program and the accompanying materials                          

+*  are licensed and made available under the terms and conditions of the BSD License         

+*  which accompanies this distribution.  The full text of the license may be found at        

+*  http://opensource.org/licenses/bsd-license.php                                            

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+*

+**/

+

+#include <Library/IoLib.h>

+#include <Library/ArmLib.h>

+#include <Library/ArmPlatformLib.h>

+#include <Library/DebugLib.h>

+#include <Library/PcdLib.h>

+

+#include <Drivers/PL341Dmc.h>

+#include <Drivers/SP804Timer.h>

+

+#include <Ppi/ArmMpCoreInfo.h>

+

+#include <ArmPlatform.h>

+

+ARM_CORE_INFO mRealViewEbMpCoreInfoTable[] = {

+  {

+    // Cluster 0, Core 0

+    0x0, 0x0,

+

+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value

+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,

+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,

+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,

+    (UINT64)0xFFFFFFFF

+  },

+  {

+    // Cluster 0, Core 1

+    0x0, 0x1,

+

+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value

+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,

+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,

+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,

+    (UINT64)0xFFFFFFFF

+  }

+};

+

+/**

+  Return the current Boot Mode

+

+  This function returns the boot reason on the platform

+

+**/

+EFI_BOOT_MODE

+ArmPlatformGetBootMode (

+  VOID

+  )

+{

+  return BOOT_WITH_FULL_CONFIGURATION;

+}

+

+/**

+  Initialize controllers that must setup in the normal world

+

+  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei

+  in the PEI phase.

+

+**/

+RETURN_STATUS

+ArmPlatformInitialize (

+  IN  UINTN                     MpId

+  )

+{

+  if (!IS_PRIMARY_CORE(MpId)) {

+    return RETURN_SUCCESS;

+  }

+

+  // Disable memory remapping and return to normal mapping

+  MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE

+

+  // Configure periodic timer (TIMER0) for 1MHz operation

+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);

+  // Configure 1MHz clock

+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);

+  // configure SP810 to use 1MHz clock and disable

+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);

+  // Configure SP810 to use 1MHz clock and disable

+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);

+

+  return RETURN_SUCCESS;

+}

+

+/**

+  Initialize the system (or sometimes called permanent) memory

+

+  This memory is generally represented by the DRAM.

+

+**/

+VOID

+ArmPlatformInitializeSystemMemory (

+  VOID

+  )

+{

+  // We do not need to initialize the System Memory on RTSM

+}

+

+EFI_STATUS

+PrePeiCoreGetMpCoreInfo (

+  OUT UINTN                   *CoreCount,

+  OUT ARM_CORE_INFO           **ArmCoreTable

+  )

+{

+  if ((MmioRead32 (ARM_EB_SYS_PROCID0_REG) & ARM_EB_SYS_PROC_ID_MASK) == ARM_EB_SYS_PROC_ID_CORTEX_A9) {

+    *CoreCount    = sizeof(mRealViewEbMpCoreInfoTable) / sizeof(ARM_CORE_INFO);

+    *ArmCoreTable = mRealViewEbMpCoreInfoTable;

+    return EFI_SUCCESS;

+  } else {

+    return EFI_UNSUPPORTED;

+  }

+}

+

+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore

+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;

+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };

+

+EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {

+  {

+    EFI_PEI_PPI_DESCRIPTOR_PPI,

+    &mArmMpCoreInfoPpiGuid,

+    &mMpCoreInfoPpi

+  }

+};

+

+VOID

+ArmPlatformGetPlatformPpiList (

+  OUT UINTN                   *PpiListSize,

+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList

+  )

+{

+  *PpiListSize = sizeof(gPlatformPpiTable);

+  *PpiList = gPlatformPpiTable;

+}

+