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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-06-11 11:14:06 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-06-11 11:14:06 +0000
commit9bc6ef0231fc7581b42c12b1948a68fd3039e51c (patch)
tree6a12ae3da6afe30e5b1d6d6440f7c4fc4985047b /ArmPlatformPkg/ArmRealViewEbPkg
parent7d0f2f23d2e47341dc78096644ef57db0542b076 (diff)
downloadedk2-platforms-9bc6ef0231fc7581b42c12b1948a68fd3039e51c.tar.xz
ArmPlatformPkg/ArmRealViewEb: Add support for PL111 Lcd controller
- Add the LcdGraphicsOutputDxe driver to DSC and FDF file. - Implement LcdPlatformLib for the platform. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11787 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmRealViewEbPkg')
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc2
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc2
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf2
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf2
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h86
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c209
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf63
7 files changed, 326 insertions, 40 deletions
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
index 7d13dbf088..dbe00dffce 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
@@ -114,6 +114,7 @@
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
NorFlashPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/NorFlashArmRealViewEbLib/NorFlashArmRealViewEbLib.inf
+ LcdPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf
[LibraryClasses.common.SEC]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
@@ -448,6 +449,7 @@
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+ ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
ArmPlatformPkg/ArmRealViewEbPkg/FvbDxe/FvbDxe.inf
ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
index 1e9c82f2d4..faa79aaf5b 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
@@ -115,6 +115,7 @@
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
NorFlashPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/NorFlashArmRealViewEbLib/NorFlashArmRealViewEbLib.inf
+ LcdPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf
[LibraryClasses.common.SEC]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLibSec.inf
@@ -459,6 +460,7 @@
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+ ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
ArmPlatformPkg/ArmRealViewEbPkg/FvbDxe/FvbDxe.inf
ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
index c34a4a5363..6053c80657 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
@@ -125,6 +125,8 @@ READ_LOCK_STATUS = TRUE
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+ INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
index c9c108e2e9..c59d8b49f5 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
@@ -125,6 +125,8 @@ READ_LOCK_STATUS = TRUE
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+ INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h
index 17f198373d..18f8a66502 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h
@@ -21,79 +21,85 @@
*******************************************/
// Can be NOR, DOC, DRAM, SRAM
-#define ARM_EB_REMAP_BASE 0x00000000
-#define ARM_EB_REMAP_SZ 0x04000000
+#define ARM_EB_REMAP_BASE 0x00000000
+#define ARM_EB_REMAP_SZ 0x04000000
// Motherboard Peripheral and On-chip peripheral
-#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE 0x10000000
-#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ 0x00100000
-#define ARM_EB_BOARD_PERIPH_BASE 0x10000000
-//#define ARM_EB_CHIP_PERIPH_BASE 0x10020000
+#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE 0x10000000
+#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ 0x00100000
+#define ARM_EB_BOARD_PERIPH_BASE 0x10000000
+//#define ARM_EB_CHIP_PERIPH_BASE 0x10020000
// SMC
-#define ARM_EB_SMC_BASE 0x40000000
-#define ARM_EB_SMC_SZ 0x20000000
+#define ARM_EB_SMC_BASE 0x40000000
+#define ARM_EB_SMC_SZ 0x20000000
// NOR Flash 1
-#define ARM_EB_SMB_NOR_BASE 0x40000000
-#define ARM_EB_SMB_NOR_SZ 0x04000000 /* 64 MB */
+#define ARM_EB_SMB_NOR_BASE 0x40000000
+#define ARM_EB_SMB_NOR_SZ 0x04000000 /* 64 MB */
// DOC Flash
-#define ARM_EB_SMB_DOC_BASE 0x44000000
-#define ARM_EB_SMB_DOC_SZ 0x04000000 /* 64 MB */
+#define ARM_EB_SMB_DOC_BASE 0x44000000
+#define ARM_EB_SMB_DOC_SZ 0x04000000 /* 64 MB */
// SRAM
-#define ARM_EB_SMB_SRAM_BASE 0x48000000
-#define ARM_EB_SMB_SRAM_SZ 0x02000000 /* 32 MB */
+#define ARM_EB_SMB_SRAM_BASE 0x48000000
+#define ARM_EB_SMB_SRAM_SZ 0x02000000 /* 32 MB */
// USB, Ethernet, VRAM
-#define ARM_EB_SMB_PERIPH_BASE 0x4E000000
-//#define ARM_EB_SMB_PERIPH_VRAM 0x4C000000
-#define ARM_EB_SMB_PERIPH_SZ 0x02000000 /* 32 MB */
+#define ARM_EB_SMB_PERIPH_BASE 0x4E000000
+//#define ARM_EB_SMB_PERIPH_VRAM 0x4C000000
+#define ARM_EB_SMB_PERIPH_SZ 0x02000000 /* 32 MB */
// DRAM
-#define ARM_EB_DRAM_BASE 0x70000000
-#define ARM_EB_DRAM_SZ 0x10000000
+#define ARM_EB_DRAM_BASE 0x70000000
+#define ARM_EB_DRAM_SZ 0x10000000
// Logic Tile
-#define ARM_EB_LOGIC_TILE_BASE 0xC0000000
-#define ARM_EB_LOGIC_TILE_SZ 0x40000000
+#define ARM_EB_LOGIC_TILE_BASE 0xC0000000
+#define ARM_EB_LOGIC_TILE_SZ 0x40000000
/*******************************************
// Motherboard peripherals
*******************************************/
// Define MotherBoard SYS flags offsets (from ARM_EB_BOARD_PERIPH_BASE)
-#define ARM_EB_SYS_FLAGS_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
-#define ARM_EB_SYS_FLAGS_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
-#define ARM_EB_SYS_FLAGS_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00034)
-#define ARM_EB_SYS_FLAGS_NV_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
-#define ARM_EB_SYS_FLAGS_NV_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
-#define ARM_EB_SYS_FLAGS_NV_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x0003C)
-#define ARM_EB_SYS_PROCID0_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00084)
-#define ARM_EB_SYS_PROCID1_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00088)
-#define ARM_EB_SYS_CFGDATA_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A0)
-#define ARM_EB_SYS_CFGCTRL_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A4)
-#define ARM_EB_SYS_CFGSTAT_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A8)
+#define ARM_EB_SYS_OSC4_REG (ARM_EB_BOARD_PERIPH_BASE + 0x0001C)
+#define ARM_EB_SYS_LOCK_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00020)
+#define ARM_EB_SYS_100HZ_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00024)
+#define ARM_EB_SYS_FLAGS_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
+#define ARM_EB_SYS_FLAGS_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
+#define ARM_EB_SYS_FLAGS_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00034)
+#define ARM_EB_SYS_FLAGS_NV_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
+#define ARM_EB_SYS_FLAGS_NV_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
+#define ARM_EB_SYS_FLAGS_NV_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x0003C)
+#define ARM_EB_SYS_CLCD_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00050)
+#define ARM_EB_SYS_PROCID0_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00084)
+#define ARM_EB_SYS_PROCID1_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00088)
+#define ARM_EB_SYS_CFGDATA_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A0)
+#define ARM_EB_SYS_CFGCTRL_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A4)
+#define ARM_EB_SYS_CFGSTAT_REG (ARM_EB_BOARD_PERIPH_BASE + 0x000A8)
// SP810 Controller
-#define SP810_CTRL_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x01000)
+#define SP810_CTRL_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x01000)
// SYSTRCL Register
-#define ARM_EB_SYSCTRL 0x10001000
+#define ARM_EB_SYSCTRL 0x10001000
// Uart0
-#define PL011_CONSOLE_UART_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x09000)
-#define PL011_CONSOLE_UART_SPEED 115200
+#define PL011_CONSOLE_UART_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x09000)
// SP804 Timer Bases
-#define SP804_TIMER0_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x11000)
-#define SP804_TIMER1_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x11020)
-#define SP804_TIMER2_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12000)
-#define SP804_TIMER3_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12020)
+#define SP804_TIMER0_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x11000)
+#define SP804_TIMER1_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x11020)
+#define SP804_TIMER2_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12000)
+#define SP804_TIMER3_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12020)
// Dynamic Memory Controller Base
#define ARM_EB_DMC_BASE 0x10018000
// Static Memory Controller Base
#define ARM_EB_SMC_CTRL_BASE 0x10080000
+#define PL111_CLCD_BASE 0x10020000
+//Note: Moving the framebuffer into the 0x70000000-0x80000000 region does not seem to work
+#define PL111_CLCD_VRAM_BASE 0x00100000
/*// System Configuration Controller register Base addresses
//#define ARM_EB_SYS_CFG_CTRL_BASE 0x100E2000
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c
new file mode 100644
index 0000000000..c4140150f8
--- /dev/null
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c
@@ -0,0 +1,209 @@
+/** @file
+
+ Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+
+#include <Library/LcdPlatformLib.h>
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+
+#include <Drivers/PL111Lcd.h>
+
+#include <ArmPlatform.h>
+
+typedef struct {
+ UINT32 Mode;
+ UINT32 HorizontalResolution;
+ UINT32 VerticalResolution;
+ LCD_BPP Bpp;
+ UINT32 ClcdClk;
+
+ UINT32 HSync;
+ UINT32 HBackPorch;
+ UINT32 HFrontPorch;
+ UINT32 VSync;
+ UINT32 VBackPorch;
+ UINT32 VFrontPorch;
+} CLCD_RESOLUTION;
+
+
+CLCD_RESOLUTION mResolutions[] = {
+ { // Mode 0 : VGA : 640 x 480 x 24 bpp
+ VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 0x2C77,
+ VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
+ VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
+ },
+ { // Mode 1 : SVGA : 800 x 600 x 24 bpp
+ SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 0x2CAC,
+ SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
+ SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
+ }
+};
+
+
+EFI_STATUS
+LcdPlatformInitializeDisplay (
+ VOID
+ )
+{
+ MmioWrite32(ARM_EB_SYS_CLCD_REG, 1);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+LcdPlatformGetVram (
+ OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
+ OUT UINTN* VramSize
+ )
+{
+ *VramBaseAddress = PL111_CLCD_VRAM_BASE;
+ *VramSize = SIZE_8MB; //FIXME: Can this size change ?
+ return EFI_SUCCESS;
+}
+
+UINT32
+LcdPlatformGetMaxMode (
+ VOID
+ )
+{
+ return (sizeof(mResolutions) / sizeof(CLCD_RESOLUTION));
+}
+
+EFI_STATUS
+LcdPlatformSetMode (
+ IN UINT32 ModeNumber
+ )
+{
+ if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ MmioWrite32(ARM_EB_SYS_LOCK_REG,0x0000A05F);
+ MmioWrite32(ARM_EB_SYS_OSC4_REG,mResolutions[ModeNumber].ClcdClk);
+ MmioWrite32(ARM_EB_SYS_LOCK_REG,0x0);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+LcdPlatformQueryMode (
+ IN UINT32 ModeNumber,
+ OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
+ )
+{
+ EFI_STATUS Status;
+
+ if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EFI_UNSUPPORTED;
+
+ Info->Version = 0;
+ Info->HorizontalResolution = mResolutions[ModeNumber].HorizontalResolution;
+ Info->VerticalResolution = mResolutions[ModeNumber].VerticalResolution;
+ Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution;
+
+ switch (mResolutions[ModeNumber].Bpp) {
+ case LCD_BITS_PER_PIXEL_24:
+ Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
+ Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
+ Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
+ Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
+ Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
+ Status = EFI_SUCCESS;
+ break;
+
+ case LCD_BITS_PER_PIXEL_16_555:
+ Info->PixelFormat = PixelBitMask;
+ Info->PixelInformation.RedMask = LCD_16BPP_555_RED_MASK;
+ Info->PixelInformation.GreenMask = LCD_16BPP_555_GREEN_MASK;
+ Info->PixelInformation.BlueMask = LCD_16BPP_555_BLUE_MASK;
+ Info->PixelInformation.ReservedMask = LCD_16BPP_555_RESERVED_MASK;
+ Status = EFI_SUCCESS;
+ break;
+
+ case LCD_BITS_PER_PIXEL_16_565:
+ Info->PixelFormat = PixelBitMask;
+ Info->PixelInformation.RedMask = LCD_16BPP_565_RED_MASK;
+ Info->PixelInformation.GreenMask = LCD_16BPP_565_GREEN_MASK;
+ Info->PixelInformation.BlueMask = LCD_16BPP_565_BLUE_MASK;
+ Info->PixelInformation.ReservedMask = LCD_16BPP_565_RESERVED_MASK;
+ Status = EFI_SUCCESS;
+ break;
+
+ case LCD_BITS_PER_PIXEL_12_444:
+ Info->PixelFormat = PixelBitMask;
+ Info->PixelInformation.RedMask = LCD_12BPP_444_RED_MASK;
+ Info->PixelInformation.GreenMask = LCD_12BPP_444_GREEN_MASK;
+ Info->PixelInformation.BlueMask = LCD_12BPP_444_BLUE_MASK;
+ Info->PixelInformation.ReservedMask = LCD_12BPP_444_RESERVED_MASK;
+ Status = EFI_SUCCESS;
+ break;
+
+ case LCD_BITS_PER_PIXEL_8:
+ case LCD_BITS_PER_PIXEL_4:
+ case LCD_BITS_PER_PIXEL_2:
+ case LCD_BITS_PER_PIXEL_1:
+ default:
+ // These are not supported
+ break;
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+LcdPlatformGetTimings (
+ IN UINT32 ModeNumber,
+ OUT UINT32* HRes,
+ OUT UINT32* HSync,
+ OUT UINT32* HBackPorch,
+ OUT UINT32* HFrontPorch,
+ OUT UINT32* VRes,
+ OUT UINT32* VSync,
+ OUT UINT32* VBackPorch,
+ OUT UINT32* VFrontPorch
+ )
+{
+ if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *HRes = mResolutions[ModeNumber].HorizontalResolution;
+ *HSync = mResolutions[ModeNumber].HSync;
+ *HBackPorch = mResolutions[ModeNumber].HBackPorch;
+ *HFrontPorch = mResolutions[ModeNumber].HFrontPorch;
+ *VRes = mResolutions[ModeNumber].VerticalResolution;
+ *VSync = mResolutions[ModeNumber].VSync;
+ *VBackPorch = mResolutions[ModeNumber].VBackPorch;
+ *VFrontPorch = mResolutions[ModeNumber].VFrontPorch;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+LcdPlatformGetBpp (
+ IN UINT32 ModeNumber,
+ OUT LCD_BPP * Bpp
+ )
+{
+ if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *Bpp = mResolutions[ModeNumber].Bpp;
+
+ return EFI_SUCCESS;
+}
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf
new file mode 100644
index 0000000000..f2a441994f
--- /dev/null
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf
@@ -0,0 +1,63 @@
+#/** @file
+#
+# Component discription file for ArmVeGraphicsDxe module
+#
+# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PL111LcdArmRealViewEbLib
+ FILE_GUID = 51396ee0-4973-11e0-868a-0002a5d5c51b
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PL111LcdPlatformLib
+
+[Sources.common]
+ PL111LcdArmRealViewEb.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ IoLib
+
+[Guids]
+
+[Protocols]
+
+[FixedPcd.common]
+
+ #
+ # The following modes are supported by PL111
+ #
+ # 0 : 640 x 480 x 24 bpp
+ # 1 : 800 x 600 x 24 bpp
+ # 2 : 1024 x 768 x 24 bpp
+ # 3 : 640 x 480 x 16 bpp (565 RGB Mode)
+ # 4 : 800 x 600 x 16 bpp (565 RGB Mode)
+ # 5 : 1024 x 768 x 16 bpp (565 RGB Mode)
+ # 6 : 640 x 480 x 15 bpp (555 RGB Mode)
+ # 7 : 800 x 600 x 15 bpp (555 RGB Mode)
+ # 8 : 1024 x 768 x 15 bpp (555 RGB Mode)
+ # 9 : 1024 x 768 x 15 bpp (555 RGB Mode) - Linux driver settings
+ # 10 : 640 x 480 x 12 bpp (444 RGB Mode)
+ # 11 : 800 x 600 x 12 bpp (444 RGB Mode)
+ # 12 : 1024 x 768 x 12 bpp (444 RGB Mode)
+ #
+
+[Pcd.common]
+
+[Depex]
+ # gEfiCpuArchProtocolGuid