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author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 19:49:35 +0000 |
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committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 19:49:35 +0000 |
commit | f437141a9cf4ce1052566a3b2bf656383f488d4a (patch) | |
tree | 279ed373f5ad0c65714dd96012e43da428143bb4 /ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c | |
parent | e9f7c58f25749c9a58e6d225e4103eaced867f9d (diff) | |
download | edk2-platforms-f437141a9cf4ce1052566a3b2bf656383f488d4a.tar.xz |
ArmPlatformPkg: Renamed and Invoked earlier ArmPlatformNormalInitialize()
- ArmPlatformNormalInitialize() has been renamed into ArmPlatformInitialize()
- Make the function be called at the early stage of the PEI phase as some
platforms require their interconnects or clocks to be initialize before any
access to Timers or UARTs.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13245 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c')
-rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c index b314f51b01..b7e7b37000 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c @@ -131,11 +131,15 @@ ArmPlatformGetBootMode ( in the PEI phase. **/ -VOID -ArmPlatformNormalInitialize ( - VOID +RETURN_STATUS +ArmPlatformInitialize ( + IN UINTN MpId ) { + if (!IS_PRIMARY_CORE(MpId)) { + return RETURN_SUCCESS; + } + // Configure periodic timer (TIMER0) for 1MHz operation MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK); // Configure 1MHz clock @@ -144,6 +148,8 @@ ArmPlatformNormalInitialize ( MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK); // Configure SP810 to use 1MHz clock and disable MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK); + + return RETURN_SUCCESS; } /** |