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| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-03-26 11:03:36 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-03-26 11:03:36 +0000 |
| commit | 5e7731443c6c9214bb012e70f267c3af0aa33258 (patch) | |
| tree | c79e7ff7206a2379c9c66bf3b73f73c753e64632 /ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM | |
| parent | 18029bb9112f7af8c9aedcf0dacbdd5267eb258c (diff) | |
| download | edk2-platforms-5e7731443c6c9214bb012e70f267c3af0aa33258.tar.xz | |
ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs
The GICD_IGROUPR0 is banked for each connected processor. It means the
Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be
configured for every processor.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM')
| -rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c index deba689360..c65c28c1fa 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c @@ -31,7 +31,7 @@ **/ VOID ArmPlatformTrustzoneInit ( - VOID + IN UINTN MpId ) { // No TZPC or TZASC on RTSM to initialize |