ArmPlatformPkg: Introduced 'ArmPlatformSecLib'

The function only used in Secure Firmware used to be mixed with
the Non-Secure/Normal functions in ArmPlatformLib.
When the Secure Firmware was not required for some platforms (eg:
BeagleBoard), these functions were empty functions.
This new interface has been created to clean the ArmPlatformLib
interface between the SEC and PEI phases.

Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13260 6f19259b-4bc3-4df7-8a09-765794883524

6 files changed, 379 insertions, 0 deletions

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
new file mode 100644
index 0000000000..e2f9191714
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
@@ -0,0 +1,50 @@
+#/* @file
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#*/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = RTSMArmVExpressSecLib
+  FILE_GUID                      = 1fdaabb0-ab7d-480c-91ff-428dc1546f3a
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformSecLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  IoLib
+  ArmLib
+  SerialPortLib
+
+[Sources.common]
+  RTSMSec.c
+  RTSMBoot.asm     | RVCT
+  RTSMBoot.S       | GCC
+  RTSMHelper.asm   | RVCT
+  RTSMHelper.S     | GCC
+
+[FeaturePcd]
+  gEmbeddedTokenSpaceGuid.PcdCacheEnable
+  gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
+  gArmPlatformTokenSpaceGuid.PcdStandalone
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdFvBaseAddress
+
+  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+  gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.S
new file mode 100644
index 0000000000..371adcb8f9
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.S
@@ -0,0 +1,50 @@
+//

+//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.

+//

+//  This program and the accompanying materials

+//  are licensed and made available under the terms and conditions of the BSD License

+//  which accompanies this distribution.  The full text of the license may be found at

+//  http://opensource.org/licenses/bsd-license.php

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+//

+//

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/ArmPlatformLib.h>

+#include <AutoGen.h>

+#include <ArmPlatform.h>

+

+.text

+.align 3

+

+GCC_ASM_EXPORT(ArmPlatformSecBootAction)

+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)

+

+/**

+  Call at the beginning of the platform boot up

+

+  This function allows the firmware platform to do extra actions at the early

+  stage of the platform power up.

+

+  Note: This function must be implemented in assembler as there is no stack set up yet

+

+**/

+ASM_PFX(ArmPlatformSecBootAction):

+  bx  lr

+

+/**

+  Initialize the memory where the initial stacks will reside

+

+  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

+  In some platform, this region is already initialized and the implementation of this function can

+  do nothing. This memory can also represent the Secure RAM.

+  This function is called before the satck has been set up. Its implementation must ensure the stack

+  pointer is not used (probably required to use assembly language)

+

+**/

+ASM_PFX(ArmPlatformSecBootMemoryInit):

+  // The SMC does not need to be initialized for RTSM

+  bx    lr

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm
new file mode 100644
index 0000000000..f62a1998ed
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm
@@ -0,0 +1,52 @@
+//

+//  Copyright (c) 2011, ARM Limited. All rights reserved.

+//

+//  This program and the accompanying materials

+//  are licensed and made available under the terms and conditions of the BSD License

+//  which accompanies this distribution.  The full text of the license may be found at

+//  http://opensource.org/licenses/bsd-license.php

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+//

+//

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/ArmPlatformLib.h>

+#include <AutoGen.h>

+#include <ArmPlatform.h>

+

+  INCLUDE AsmMacroIoLib.inc

+

+  EXPORT  ArmPlatformSecBootAction

+  EXPORT  ArmPlatformSecBootMemoryInit

+

+  PRESERVE8

+  AREA    RTSMVExpressBootMode, CODE, READONLY

+

+/**

+  Call at the beginning of the platform boot up

+

+  This function allows the firmware platform to do extra actions at the early

+  stage of the platform power up.

+

+  Note: This function must be implemented in assembler as there is no stack set up yet

+

+**/

+ArmPlatformSecBootAction

+  bx  lr

+

+/**

+  Initialize the memory where the initial stacks will reside

+

+  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

+  In some platform, this region is already initialized and the implementation of this function can

+  do nothing. This memory can also represent the Secure RAM.

+  This function is called before the satck has been set up. Its implementation must ensure the stack

+  pointer is not used (probably required to use assembly language)

+

+**/

+ArmPlatformSecBootMemoryInit

+  // The SMC does not need to be initialized for RTSM

+  bx    lr

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMHelper.S
new file mode 100644
index 0000000000..f47a5312ff
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMHelper.S
@@ -0,0 +1,71 @@
+#

+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.

+#  

+#  This program and the accompanying materials                          

+#  are licensed and made available under the terms and conditions of the BSD License         

+#  which accompanies this distribution.  The full text of the license may be found at        

+#  http:#opensource.org/licenses/bsd-license.php                                            

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+#

+#

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/PcdLib.h>

+#include <AutoGen.h>

+#.include AsmMacroIoLib.inc

+

+#include <Chipset/ArmCortexA9.h>

+

+.text

+.align 2

+

+GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)

+

+# IN None

+# OUT r0 = SCU Base Address

+ASM_PFX(ArmGetScuBaseAddress):

+  # Read Configuration Base Address Register. ArmCBar cannot be called to get

+  # the Configuration BAR as a stack is not necessary setup. The SCU is at the

+  # offset 0x0000 from the Private Memory Region.

+  mrc   p15, 4, r0, c15, c0, 0

+  bx  lr

+

+# IN None

+# OUT r0 = number of cores present in the system

+ASM_PFX(ArmGetCpuCountPerCluster):

+  stmfd SP!, {r1-r2}

+

+  # Read CP15 MIDR

+  mrc   p15, 0, r1, c0, c0, 0

+

+  # Check if the CPU is A15

+  mov   r1, r1, LSR #4

+  LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)

+  and   r1, r1, r0

+

+  LoadConstantToReg (ARM_CPU_TYPE_A15, r0)

+  cmp   r1, r0

+  beq   _Read_cp15_reg

+

+_CPU_is_not_A15:

+  mov   r2, lr                           @ Save link register

+  bl    ArmGetScuBaseAddress             @ Read SCU Base Address

+  mov   lr, r2                           @ Restore link register val

+  ldr   r0, [r0, #A9_SCU_CONFIG_OFFSET]     @ Read SCU Config reg to get CPU count

+  b     _Return

+

+_Read_cp15_reg:

+  mrc   p15, 1, r0, c9, c0, 2            @ Read C9 register of CP15 to get CPU count

+  lsr   r0, #24

+

+_Return:

+  and   r0, r0, #3

+  # Add '1' to the number of CPU on the Cluster

+  add   r0, r0, #1

+  ldmfd SP!, {r1-r2}

+  bx lr

+

+ASM_FUNCTION_REMOVE_IF_UNREFERENCED 

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMHelper.asm
new file mode 100644
index 0000000000..402db58278
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMHelper.asm
@@ -0,0 +1,73 @@
+//

+//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.

+//  

+//  This program and the accompanying materials                          

+//  are licensed and made available under the terms and conditions of the BSD License         

+//  which accompanies this distribution.  The full text of the license may be found at        

+//  http://opensource.org/licenses/bsd-license.php                                            

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+//

+//

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/PcdLib.h>

+

+#include <Chipset/ArmCortexA9.h>

+

+#include <AutoGen.h>

+

+  INCLUDE AsmMacroIoLib.inc

+

+  EXPORT    ArmGetCpuCountPerCluster

+    

+  AREA RTSMHelper, CODE, READONLY

+

+// IN None

+// OUT r0 = SCU Base Address

+ArmGetScuBaseAddress

+  // Read Configuration Base Address Register. ArmCBar cannot be called to get

+  // the Configuration BAR as a stack is not necessary setup. The SCU is at the

+  // offset 0x0000 from the Private Memory Region.

+  mrc   p15, 4, r0, c15, c0, 0

+  bx  lr

+

+// IN None

+// OUT r0 = number of cores present in the system

+ArmGetCpuCountPerCluster

+  stmfd SP!, {r1-r2}

+

+  // Read CP15 MIDR

+  mrc   p15, 0, r1, c0, c0, 0

+

+  // Check if the CPU is A15

+  mov   r1, r1, LSR #4

+  mov   r0, #ARM_CPU_TYPE_MASK

+  and   r1, r1, r0

+

+  mov   r0, #ARM_CPU_TYPE_A15

+  cmp   r1, r0

+  beq   _Read_cp15_reg

+

+_CPU_is_not_A15

+  mov   r2, lr                              ; Save link register

+  bl    ArmGetScuBaseAddress                ; Read SCU Base Address

+  mov   lr, r2                              ; Restore link register val

+  ldr   r0, [r0, #A9_SCU_CONFIG_OFFSET]     ; Read SCU Config reg to get CPU count

+  b     _Return

+

+_Read_cp15_reg

+  mrc   p15, 1, r0, c9, c0, 2            ; Read C9 register of CP15 to get CPU count

+  lsr   r0, #24

+

+

+_Return

+  and   r0, r0, #3

+  // Add '1' to the number of CPU on the Cluster

+  add   r0, r0, #1

+  ldmfd SP!, {r1-r2}

+  bx lr

+

+  END

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
new file mode 100644
index 0000000000..4ae6301603
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
@@ -0,0 +1,83 @@
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/PL310L2Cache.h>
+#include <Drivers/SP804Timer.h>
+
+#include <ArmPlatform.h>
+
+/**
+  Initialize the Secure peripherals and memory regions
+
+  If Trustzone is supported by your platform then this function makes the required initialization
+  of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+  IN  UINTN                     MpId
+  )
+{
+  // No TZPC or TZASC on RTSM to initialize
+}
+
+/**
+  Initialize controllers that must setup at the early stage
+
+  Some peripherals must be initialized in Secure World.
+  For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  // If it is not the primary core then there is nothing to do
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // Configure periodic timer (TIMER0) for 1MHz operation
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+  // Configure 1MHz clock
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+  // Configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+  // Configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Call before jumping to Normal World
+
+  This function allows the firmware platform to do extra actions before
+  jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+  IN  UINTN         MpId,
+  OUT UINTN*        JumpAddress
+  )
+{
+  *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}