Add ArmPlatformPkg from ARM Ltd. patch.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11291 6f19259b-4bc3-4df7-8a09-765794883524

8 files changed, 728 insertions, 0 deletions

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
new file mode 100644
index 0000000000..7f68992fdc
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
@@ -0,0 +1,49 @@
+#/* @file
+#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#*/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = CTA9x4ArmVExpressLib
+  FILE_GUID                      = b16c63a0-f417-11df-b3af-0002a5d5c51b
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  IoLib
+  ArmLib
+  ArmTrustZoneLib
+  MemoryAllocationLib
+  PL341DmcLib
+  PL301AxiLib
+
+[Sources.common]
+  CTA9x4.c
+  CTA9x4Mem.c
+
+[Protocols]
+
+[FeaturePcd]
+  gEmbeddedTokenSpaceGuid.PcdCacheEnable
+  gArmPlatformTokenSpaceGuid.PcdStandalone
+
+[FixedPcd]
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
new file mode 100644
index 0000000000..5a05479736
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
@@ -0,0 +1,50 @@
+#/* @file

+#  Copyright (c) 2011, ARM Limited. All rights reserved.

+#  

+#  This program and the accompanying materials                          

+#  are licensed and made available under the terms and conditions of the BSD License         

+#  which accompanies this distribution.  The full text of the license may be found at        

+#  http://opensource.org/licenses/bsd-license.php                                            

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+#

+#*/

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = CTA9x4ArmVExpressLib

+  FILE_GUID                      = b16c63a0-f417-11df-b3af-0002a5d5c51b

+  MODULE_TYPE                    = BASE

+  VERSION_STRING                 = 1.0

+  LIBRARY_CLASS                  = ArmPlatformLib

+

+[Packages]

+  MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

+  EmbeddedPkg/EmbeddedPkg.dec

+  ArmPkg/ArmPkg.dec

+  ArmPlatformPkg/ArmPlatformPkg.dec

+

+[LibraryClasses]

+  IoLib

+  ArmLib

+  ArmTrustZoneLib

+  PL354SmcSecLib

+  PL341DmcLib

+  PL301AxiLib

+

+[Sources.common]

+  CTA9x4.c

+  CTA9x4Helper.asm   | RVCT

+  CTA9x4Helper.S     | GCC

+

+[Protocols]

+

+[FeaturePcd]

+  gEmbeddedTokenSpaceGuid.PcdCacheEnable

+  gArmPlatformTokenSpaceGuid.PcdStandalone

+

+[FixedPcd]

+  gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress

+  gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
new file mode 100644
index 0000000000..497e0da066
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
@@ -0,0 +1,157 @@
+/** @file
+*
+*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmTrustZoneLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Drivers/PL341Dmc.h>
+
+// DDR2 timings
+struct pl341_dmc_config ddr_timings = {
+    .base		= ARM_VE_DMC_BASE,
+    .has_qos		= 1,
+    .refresh_prd	= 0x3D0,
+    .cas_latency	= 0x8,
+    .write_latency	= 0x3,
+    .t_mrd		= 0x2,
+    .t_ras		= 0xA,
+    .t_rc		= 0xE,
+    .t_rcd		= 0x104,
+    .t_rfc		= 0x2f32,
+    .t_rp		= 0x14,
+    .t_rrd		= 0x2,
+    .t_wr		= 0x4,
+    .t_wtr		= 0x2,
+    .t_xp		= 0x2,
+    .t_xsr		= 0xC8,
+    .t_esr		= 0x14,
+    .memory_cfg		= DMC_MEMORY_CONFIG_ACTIVE_CHIP_1 | DMC_MEMORY_CONFIG_BURST_4 |
+                          DMC_MEMORY_CONFIG_ROW_ADDRESS_15 | DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10,
+    .memory_cfg2	= DMC_MEMORY_CFG2_DQM_INIT | DMC_MEMORY_CFG2_CKE_INIT |
+						  DMC_MEMORY_CFG2_BANK_BITS_3 | DMC_MEMORY_CFG2_MEM_WIDTH_32,
+    .memory_cfg3	= 0x00000001,
+    .chip_cfg0		= 0x00010000,
+    .t_faw		= 0x00000A0D,
+};
+
+/**
+  Return if Trustzone is supported by your platform
+
+  A non-zero value must be returned if you want to support a Secure World on your platform.
+  ArmVExpressTrustzoneInit() will later set up the secure regions.
+  This function can return 0 even if Trustzone is supported by your processor. In this case,
+  the platform will continue to run in Secure World.
+
+  @return   A non-zero value if Trustzone supported.
+
+**/
+UINTN ArmPlatformTrustzoneSupported(VOID) {
+    return (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK);
+}
+
+/**
+  Initialize the Secure peripherals and memory regions
+
+  If Trustzone is supported by your platform then this function makes the required initialization
+  of the secure peripherals and memory regions.
+
+**/
+VOID ArmPlatformTrustzoneInit(VOID) {
+    //
+    // Setup TZ Protection Controller
+    //
+    
+    // Set Non Secure access for all devices
+    TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
+    TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
+    TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF);
+
+    // Remove Non secure access to secure devices
+    TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0,
+         ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC);
+
+    TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2,
+         ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK);
+
+
+    //
+    // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
+    //
+
+    // NOR Flash 0 non secure (BootMon)
+    TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_NOR0_BASE,0,
+        TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+    // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
+#if EDK2_ARMVE_SECURE_SYSTEM
+    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
+        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+#else
+    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_NOR1_BASE,0,
+        TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+#endif
+
+    // Base of SRAM. Only half of SRAM in Non Secure world
+    // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
+#if EDK2_ARMVE_SECURE_SYSTEM
+    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_SRAM_BASE,0,
+        TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
+#else
+    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_SRAM_BASE,0,
+        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+#endif
+
+    // Memory Mapped Peripherals. All in non secure world
+    TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_PERIPH_BASE,0,
+        TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+    // MotherBoard Peripherals and On-chip peripherals.
+    TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0,
+        TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW);
+}
+
+/**
+  Remap the memory at 0x0
+
+  Some platform requires or gives the ability to remap the memory at the address 0x0.
+  This function can do nothing if this feature is not relevant to your platform.
+
+**/
+VOID ArmPlatformBootRemapping(VOID) {
+    UINT32 val32  = MmioRead32(ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1
+    // we remap the DRAM to 0x0
+    MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (val32 & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);
+}
+
+/**
+  Initialize the system (or sometimes called permanent) memory
+
+  This memory is generally represented by the DRAM.
+
+**/
+VOID ArmPlatformInitializeSystemMemory(VOID) {
+    PL341DmcInit(&ddr_timings);
+    PL301AxiInit(ARM_VE_FAXI_BASE);
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
new file mode 100644
index 0000000000..f18d0569fd
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
@@ -0,0 +1,74 @@
+#------------------------------------------------------------------------------ 

+#

+# ARM VE Entry point. Reset vector in FV header will brach to

+# _ModuleEntryPoint. 

+#

+# We use crazy macros, like LoadConstantToReg, since Xcode assembler 

+# does not support = assembly syntax for ldr.

+#

+#  Copyright (c) 2011, ARM Limited. All rights reserved.

+#  

+#  This program and the accompanying materials                          

+#  are licensed and made available under the terms and conditions of the BSD License         

+#  which accompanies this distribution.  The full text of the license may be found at        

+#  http://opensource.org/licenses/bsd-license.php                                            

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+#

+#------------------------------------------------------------------------------

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/PcdLib.h>

+#include <Library/ArmPlatformLib.h>

+#include <AutoGen.h>

+

+#Start of Code section

+.text

+.align 3

+

+GCC_ASM_EXPORT(ArmPlatformIsMemoryInitialized)

+GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)

+.extern ASM_PFX(InitializeSMC)

+

+/**

+  Called at the early stage of the Boot phase to know if the memory has already been initialized

+

+  Running the code from the reset vector does not mean we start from cold boot. In some case, we

+  can go through this code with the memory already initialized.

+  Because this function is called at the early stage, the implementation must not use the stack.

+  Its implementation must probably done in assembly to ensure this requirement.

+

+  @return   Return the condition value into the 'Z' flag

+

+**/

+ASM_PFX(ArmPlatformIsMemoryInitialized):

+  // Check if the memory has been already mapped, if so skipped the memory initialization

+  LoadConstantToReg (ARM_VE_SYS_CFGRW1_REG ,r0)

+  ldr   r0, [r0, #0]

+  

+  // 0x40000000 = Value of Physical Configuration Switch SW[0]

+  and   r0, r0, #0x40000000

+  tst   r0, #0x40000000

+  bx	lr

+

+/**

+  Initialize the memory where the initial stacks will reside

+

+  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

+  In some platform, this region is already initialized and the implementation of this function can

+  do nothing. This memory can also represent the Secure RAM.

+  This function is called before the satck has been set up. Its implementation must ensure the stack

+  pointer is not used (probably required to use assembly language)

+

+**/

+ASM_PFX(ArmPlatformInitializeBootMemory):

+  mov   r5, lr

+  // Initialize PL354 SMC

+  LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)

+  LoadConstantToReg (ARM_VE_SMB_PERIPH_VRAM, r2)

+  blx   ASM_PFX(InitializeSMC)

+  bx	r5

+

+.end

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
new file mode 100644
index 0000000000..673052f14e
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
@@ -0,0 +1,68 @@
+//

+//  Copyright (c) 2011, ARM Limited. All rights reserved.

+//  

+//  This program and the accompanying materials                          

+//  are licensed and made available under the terms and conditions of the BSD License         

+//  which accompanies this distribution.  The full text of the license may be found at        

+//  http://opensource.org/licenses/bsd-license.php                                            

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+//

+//

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/PcdLib.h>

+#include <ArmPlatform.h>

+#include <AutoGen.h>

+

+  INCLUDE AsmMacroIoLib.inc

+  

+  EXPORT  ArmPlatformIsMemoryInitialized

+  EXPORT  ArmPlatformInitializeBootMemory

+  IMPORT  InitializeSMC

+  

+  PRESERVE8

+  AREA    CTA9x4Helper, CODE, READONLY

+

+/**

+  Called at the early stage of the Boot phase to know if the memory has already been initialized

+

+  Running the code from the reset vector does not mean we start from cold boot. In some case, we

+  can go through this code with the memory already initialized.

+  Because this function is called at the early stage, the implementation must not use the stack.

+  Its implementation must probably done in assembly to ensure this requirement.

+

+  @return   Return the condition value into the 'Z' flag

+

+**/

+ArmPlatformIsMemoryInitialized

+  // Check if the memory has been already mapped, if so skipped the memory initialization

+  LoadConstantToReg (ARM_VE_SYS_CFGRW1_REG ,r0)

+  ldr   r0, [r0, #0]

+  

+  // 0x40000000 = Value of Physical Configuration Switch SW[0]

+  and   r0, r0, #0x40000000

+  tst   r0, #0x40000000

+  bx	lr

+    

+/**

+  Initialize the memory where the initial stacks will reside

+

+  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

+  In some platform, this region is already initialized and the implementation of this function can

+  do nothing. This memory can also represent the Secure RAM.

+  This function is called before the satck has been set up. Its implementation must ensure the stack

+  pointer is not used (probably required to use assembly language)

+

+**/

+ArmPlatformInitializeBootMemory

+  mov   r5, lr

+  // Initialize PL354 SMC

+  LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)

+  LoadConstantToReg (ARM_VE_SMB_PERIPH_VRAM, r2)

+  blx   InitializeSMC

+  bx	r5

+  

+  END

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c
new file mode 100644
index 0000000000..27eb362baf
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c
@@ -0,0 +1,212 @@
+/** @file

+*

+*  Copyright (c) 2011, ARM Limited. All rights reserved.

+*  

+*  This program and the accompanying materials                          

+*  are licensed and made available under the terms and conditions of the BSD License         

+*  which accompanies this distribution.  The full text of the license may be found at        

+*  http://opensource.org/licenses/bsd-license.php                                            

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+*

+**/

+

+#include <Library/ArmPlatformLib.h>

+#include <Library/DebugLib.h>

+#include <Library/PcdLib.h>

+#include <Library/IoLib.h>

+#include <Library/MemoryAllocationLib.h>

+

+// DDR attributes

+#define DDR_ATTRIBUTES_CACHED           ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK

+#define DDR_ATTRIBUTES_UNCACHED         ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED

+#define DDR_ATTRIBUTES_SECURE_CACHED    ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK

+#define DDR_ATTRIBUTES_SECURE_UNCACHED  ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED

+

+/**

+  Return the information about the memory region in permanent memory used by PEI

+

+  One of the PEI Module must install the permament memory used by PEI. This function returns the

+  information about this region for your platform to this PEIM module.

+

+  @param[out]   PeiMemoryBase       Base of the memory region used by PEI core and modules

+  @param[out]   PeiMemorySize       Size of the memory region used by PEI core and modules

+

+**/

+VOID ArmPlatformGetPeiMemory (

+    OUT UINTN*                                   PeiMemoryBase,

+    OUT UINTN*                                   PeiMemorySize

+    ) {

+    ASSERT((PeiMemoryBase != NULL) && (PeiMemorySize != NULL));

+    

+    *PeiMemoryBase = ARM_VE_DRAM_BASE + ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;

+    *PeiMemorySize = ARM_VE_EFI_MEMORY_REGION_SZ;

+}

+

+/**

+  Return the Virtual Memory Map of your platform

+

+  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.

+

+  @param[out]   VirtualMemoryMap    Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-

+                                    Virtual Memory mapping. This array must be ended by a zero-filled

+                                    entry

+

+**/

+VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) {

+    UINT32                        val32;

+    UINT32                        CacheAttributes;

+    BOOLEAN                       bTrustzoneSupport;

+    UINTN                         Index = 0;

+    ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;

+

+    ASSERT(VirtualMemoryMap != NULL);

+

+    VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 9);

+    if (VirtualMemoryTable == NULL) {

+        return;

+    }

+

+    // Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World.

+    // As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case

+    val32 = MmioRead32(ARM_VE_SYS_CFGRW1_REG);

+    if (ARM_VE_CFGRW1_TZASC_EN_BIT_MASK & val32) {

+        bTrustzoneSupport = TRUE;

+    } else {

+        bTrustzoneSupport = FALSE;

+    }

+

+    if (FeaturePcdGet(PcdCacheEnable) == TRUE) {

+        CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);

+    } else {

+        CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);

+    }

+

+    // ReMap (Either NOR Flash or DRAM)

+    VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;

+    VirtualMemoryTable[Index].VirtualBase  = ARM_VE_REMAP_BASE;

+    VirtualMemoryTable[Index].Length       = ARM_VE_REMAP_SZ;

+    VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;

+

+    // DDR

+    VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;

+    VirtualMemoryTable[Index].VirtualBase  = ARM_VE_DRAM_BASE;

+    VirtualMemoryTable[Index].Length       = ARM_VE_DRAM_SZ;

+    VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;

+

+    // SMC CS7

+    VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;

+    VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;

+    VirtualMemoryTable[Index].Length       = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;

+    VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);

+

+    // SMB CS0-CS1 - NOR Flash 1 & 2

+    VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;

+    VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_NOR0_BASE;

+    VirtualMemoryTable[Index].Length       = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;

+    VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);

+

+    // SMB CS2 - SRAM

+    VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;

+    VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_SRAM_BASE;

+    VirtualMemoryTable[Index].Length       = ARM_VE_SMB_SRAM_SZ;

+    VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;

+

+    // SMB CS3-CS6 - Motherboard Peripherals

+    VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;

+    VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_PERIPH_BASE;

+    VirtualMemoryTable[Index].Length       = ARM_VE_SMB_PERIPH_SZ;

+    VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);

+

+    // If a Logic Tile is connected to The ARM Versatile Express Motherboard

+    if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {

+        VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;

+        VirtualMemoryTable[Index].VirtualBase  = ARM_VE_EXT_AXI_BASE;

+        VirtualMemoryTable[Index].Length       = ARM_VE_EXT_AXI_SZ;

+        VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);

+    }

+

+    // End of Table

+    VirtualMemoryTable[++Index].PhysicalBase = 0;

+    VirtualMemoryTable[Index].VirtualBase  = 0;

+    VirtualMemoryTable[Index].Length       = 0;

+    VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)0;

+

+    *VirtualMemoryMap = VirtualMemoryTable;

+}

+

+/**

+  Return the EFI Memory Map of your platform

+

+  This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource

+  Descriptor HOBs used by DXE core.

+

+  @param[out]   EfiMemoryMap        Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an

+                                    EFI Memory region. This array must be ended by a zero-filled entry

+

+**/

+VOID ArmPlatformGetEfiMemoryMap (

+    OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap

+) {

+    EFI_RESOURCE_ATTRIBUTE_TYPE     Attributes;

+    UINT64                          MemoryBase;

+    UINTN                           Index = 0;

+    ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR  *EfiMemoryTable;

+

+    ASSERT(EfiMemoryMap != NULL);

+

+    EfiMemoryTable = (ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR) * 6);

+

+    Attributes =

+    (

+      EFI_RESOURCE_ATTRIBUTE_PRESENT |

+      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |

+      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |

+      EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |

+      EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |

+      EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |

+      EFI_RESOURCE_ATTRIBUTE_TESTED

+    );

+    MemoryBase = ARM_VE_DRAM_BASE;

+  

+    // Memory Reserved for fixed address allocations (such as Exception Vector Table)

+    EfiMemoryTable[Index].ResourceAttribute = Attributes;

+    EfiMemoryTable[Index].PhysicalStart = MemoryBase;

+    EfiMemoryTable[Index].NumberOfBytes = ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;

+    

+    MemoryBase += ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;

+

+    // Memory declared to PEI as permanent memory for PEI and DXE

+    EfiMemoryTable[++Index].ResourceAttribute = Attributes;

+    EfiMemoryTable[Index].PhysicalStart = MemoryBase;

+    EfiMemoryTable[Index].NumberOfBytes = ARM_VE_EFI_MEMORY_REGION_SZ;

+

+    MemoryBase += ARM_VE_EFI_MEMORY_REGION_SZ;

+

+    // We must reserve the memory used by the Firmware Volume copied in DRAM at 0x80000000

+    if (FeaturePcdGet(PcdStandalone) == FALSE) {

+        // Chunk between the EFI Memory region and the firmware

+        EfiMemoryTable[++Index].ResourceAttribute = Attributes;

+        EfiMemoryTable[Index].PhysicalStart = MemoryBase;

+        EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase;

+

+        // Chunk reserved by the firmware in DRAM

+        EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);

+        EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress);

+        EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize);

+

+        MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize);

+    }

+      

+    // We allocate all the remain memory as untested system memory

+    EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED);

+    EfiMemoryTable[Index].PhysicalStart = MemoryBase;

+    EfiMemoryTable[Index].NumberOfBytes = ARM_VE_DRAM_SZ - (MemoryBase-ARM_VE_DRAM_BASE);

+

+    EfiMemoryTable[++Index].ResourceAttribute = 0;

+    EfiMemoryTable[Index].PhysicalStart = 0;

+    EfiMemoryTable[Index].NumberOfBytes = 0;

+

+    *EfiMemoryMap = EfiMemoryTable;

+}

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c
new file mode 100644
index 0000000000..88d075aed7
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -0,0 +1,84 @@
+/** @file
+  Template library implementation to support ResetSystem Runtime call.
+  
+  Fill in the templates with what ever makes you system reset.
+
+
+  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+  
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/EfiResetSystemLib.h>
+
+#include <ArmPlatform.h>
+
+/**
+  Resets the entire platform.
+
+  @param  ResetType             The type of reset to perform.
+  @param  ResetStatus           The status code for the reset.
+  @param  DataSize              The size, in bytes, of WatchdogData.
+  @param  ResetData             For a ResetType of EfiResetCold, EfiResetWarm, or
+                                EfiResetShutdown the data buffer starts with a Null-terminated
+                                Unicode string, optionally followed by additional binary data.
+
+**/
+EFI_STATUS
+EFIAPI
+LibResetSystem (
+  IN EFI_RESET_TYPE   ResetType,
+  IN EFI_STATUS       ResetStatus,
+  IN UINTN            DataSize,
+  IN CHAR16           *ResetData OPTIONAL
+  )
+{
+  if (ResetData != NULL) {
+    DEBUG ((EFI_D_ERROR, "%s", ResetData));
+  }
+
+  switch (ResetType) {
+  case EfiResetWarm:
+    // Map a warm reset into a cold reset
+  case EfiResetCold:
+  case EfiResetShutdown:
+  default:
+    CpuDeadLoop ();
+    break;
+  }
+
+  // If the reset didn't work, return an error.
+  ASSERT (FALSE);
+  return EFI_DEVICE_ERROR;
+}
+
+/**
+  Initialize any infrastructure required for LibResetSystem () to function.
+
+  @param  ImageHandle   The firmware allocated handle for the EFI image.
+  @param  SystemTable   A pointer to the EFI System Table.
+  
+  @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+LibInitializeResetSystem (
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
+  )
+{
+  return EFI_SUCCESS;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf
new file mode 100644
index 0000000000..23d47150b9
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -0,0 +1,34 @@
+#/** @file
+# Reset System lib to make it easy to port new platforms
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmVeResetSystemLib
+  FILE_GUID                      = 36885202-0854-4373-bfd2-95d229b44d44 
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = EfiResetSystemLib
+
+[Sources.common]
+  ResetSystemLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  BaseLib