diff options
| author | Guo Mang <mang.guo@intel.com> | 2017-08-02 09:54:47 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-09-05 19:45:08 +0800 |
| commit | 6c128c65b5ec0e5b8b5a0ccb165f3afd29e485f8 (patch) | |
| tree | 444372d92a0ae8991fe4d15eb3937df43690dfda /ArmPlatformPkg/ArmVExpressPkg/Library | |
| parent | b207c6434d7a5a4502975d322312e07017e8a8cb (diff) | |
| download | edk2-platforms-6c128c65b5ec0e5b8b5a0ccb165f3afd29e485f8.tar.xz | |
Remove core packages since we can get them from edk2 repository
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg/Library')
49 files changed, 0 insertions, 5066 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf deleted file mode 100644 index 10ae6c7f60..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf +++ /dev/null @@ -1,50 +0,0 @@ -#/* @file
-#
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CTA15A7ArmVExpressLib
- FILE_GUID = b98a6cb7-d472-4128-ad62-a7347f85ce13
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- MemoryAllocationLib
- SerialPortLib
-
-[Sources.common]
- CTA15-A7.c
- CTA15-A7Mem.c
- CTA15-A7Helper.asm | RVCT
- CTA15-A7Helper.S | GCC
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
-
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmTokenSpaceGuid.PcdFvBaseAddress
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c deleted file mode 100644 index 8b3287b8ef..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c +++ /dev/null @@ -1,197 +0,0 @@ -/** @file
-*
-* Copyright (c) 2012, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
- {
- // Cluster 0, Core 0
- 0x0, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR0,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR0,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR0,
- (UINT64)0
- },
- {
- // Cluster 0, Core 1
- 0x0, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR1,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR1,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR1,
- (UINT64)0
- },
-#ifndef ARM_BIGLITTLE_TC2
- {
- // Cluster 0, Core 2
- 0x0, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR2,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR2,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR2,
- (UINT64)0
- },
- {
- // Cluster 0, Core 3
- 0x0, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR3,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR3,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR3,
- (UINT64)0
- },
-#endif
- {
- // Cluster 1, Core 0
- 0x1, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR0,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR0,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR0,
- (UINT64)0
- },
- {
- // Cluster 1, Core 1
- 0x1, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR1,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR1,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR1,
- (UINT64)0
- },
- {
- // Cluster 1, Core 2
- 0x1, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR2,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR2,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR2,
- (UINT64)0
- }
-#ifndef ARM_BIGLITTLE_TC2
- ,{
- // Cluster 1, Core 3
- 0x1, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR3,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR3,
- (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR3,
- (UINT64)0
- }
-#endif
-};
-
-/**
- Return the current Boot Mode
-
- This function returns the boot reason on the platform
-
- @return Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
- VOID
- )
-{
- if (MmioRead32(ARM_CTA15A7_SCC_SYSINFO) & ARM_CTA15A7_SCC_SYSINFO_UEFI_RESTORE_DEFAULT_NORFLASH) {
- return BOOT_WITH_DEFAULT_SETTINGS;
- } else {
- return BOOT_WITH_FULL_CONFIGURATION;
- }
-}
-
-/**
- Initialize controllers that must setup in the normal world
-
- This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
- in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
- IN UINTN MpId
- )
-{
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- return RETURN_SUCCESS;
- }
-
- // Nothing to do here
-
- return RETURN_SUCCESS;
-}
-
-/**
- Initialize the system (or sometimes called permanent) memory
-
- This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
- VOID
- )
-{
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
- OUT UINTN *CoreCount,
- OUT ARM_CORE_INFO **ArmCoreTable
- )
-{
- // Only support one cluster
- *CoreCount = sizeof(mVersatileExpressCTA15A7InfoTable) / sizeof(ARM_CORE_INFO);
- *ArmCoreTable = mVersatileExpressCTA15A7InfoTable;
- return EFI_SUCCESS;
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &mArmMpCoreInfoPpiGuid,
- &mMpCoreInfoPpi
- }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
- OUT UINTN *PpiListSize,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
- )
-{
- *PpiListSize = sizeof(gPlatformPpiTable);
- *PpiList = gPlatformPpiTable;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S deleted file mode 100644 index 20bfe52610..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S +++ /dev/null @@ -1,89 +0,0 @@ -//
-// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Library/ArmLib.h>
-
-#include <ArmPlatform.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-
-ASM_PFX(ArmPlatformPeiBootAction):
- bx lr
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformGetCorePosition):
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
- // with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
- ldr r1, [r1]
- lsr r1, #24
-
- // Shift the SCC value to get the cluster ID at the offset #8
- lsl r2, r1, #4
- and r2, r2, #0xF00
-
- // Keep only the cpu ID from the original SCC
- and r1, r1, #0x0F
- // Add the Cluster ID to the Cpu ID
- orr r1, r1, r2
-
- // Keep the Cluster ID and Core ID from the MPID
- LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
- and r0, r0, r2
-
- // Compare mpid and boot cpu from ARM_SCC_CFGREG48
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
- // with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
- ldr r0, [r0]
- lsr r0, #24
-
- // Shift the SCC value to get the cluster ID at the offset #8
- lsl r1, r0, #4
- and r1, r1, #0xF00
-
- // Keep only the cpu ID from the original SCC
- and r0, r0, #0x0F
- // Add the Cluster ID to the Cpu ID
- orr r0, r0, r1
- bx lr
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm deleted file mode 100644 index f377cf2e72..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm +++ /dev/null @@ -1,97 +0,0 @@ -//
-// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Library/ArmLib.h>
-
-#include <ArmPlatform.h>
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT ArmPlatformPeiBootAction
- EXPORT ArmPlatformGetCorePosition
- EXPORT ArmPlatformIsPrimaryCore
- EXPORT ArmPlatformGetPrimaryCoreMpId
-
- PRESERVE8
- AREA CTA15A7Helper, CODE, READONLY
-
-ArmPlatformPeiBootAction FUNCTION
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ArmPlatformGetCorePosition FUNCTION
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ArmPlatformIsPrimaryCore FUNCTION
- // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
- // with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
- ldr r1, [r1]
- lsr r1, #24
-
- // Shift the SCC value to get the cluster ID at the offset #8
- lsl r2, r1, #4
- and r2, r2, #0xF00
-
- // Keep only the cpu ID from the original SCC
- and r1, r1, #0x0F
- // Add the Cluster ID to the Cpu ID
- orr r1, r1, r2
-
- // Keep the Cluster ID and Core ID from the MPID
- LoadConstantToReg (ARM_CLUSTER_MASK :OR: ARM_CORE_MASK, r2)
- and r0, r0, r2
-
- // Compare mpid and boot cpu from ARM_SCC_CFGREG48
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ArmPlatformGetPrimaryCoreMpId FUNCTION
- // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
- // with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
- ldr r0, [r0]
- lsr r0, #24
-
- // Shift the SCC value to get the cluster ID at the offset #8
- lsl r1, r0, #4
- and r1, r1, #0xF00
-
- // Keep only the cpu ID from the original SCC
- and r0, r0, #0x0F
- // Add the Cluster ID to the Cpu ID
- orr r0, r0, r1
- bx lr
- ENDFUNC
-
- END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c deleted file mode 100644 index 4403cbacb8..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c +++ /dev/null @@ -1,182 +0,0 @@ -/** @file
-*
-* Copyright (c) 2012, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-
-#include <ArmPlatform.h>
-
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 14
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-/**
- Return the Virtual Memory Map of your platform
-
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
-
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
- Virtual Memory mapping. This array must be ended by a zero-filled
- entry
-
-**/
-VOID
-ArmPlatformGetVirtualMemoryMap (
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
- )
-{
- ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
- UINTN Index = 0;
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
-
- ASSERT (VirtualMemoryMap != NULL);
-
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
- if (VirtualMemoryTable == NULL) {
- return;
- }
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
-#ifdef ARM_BIGLITTLE_TC2
- // Secure NOR0 Flash
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_SEC_NOR0_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SEC_NOR0_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SEC_NOR0_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
- // Secure RAM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SEC_RAM0_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SEC_RAM0_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SEC_RAM0_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-#endif
-
- // SMB CS0 - NOR0 Flash
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].Length = SIZE_256KB * 255;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
- // Environment Variables region
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);
- VirtualMemoryTable[Index].Length = SIZE_64KB * 4;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS1 or CS4 - NOR1 Flash
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR1_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR1_BASE;
- VirtualMemoryTable[Index].Length = SIZE_256KB * 255;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
- // Environment Variables region
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR1_BASE + (SIZE_256KB * 255);
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR1_BASE + (SIZE_256KB * 255);
- VirtualMemoryTable[Index].Length = SIZE_64KB * 4;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS3 or CS1 - PSRAM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // Motherboard peripherals
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
-#ifdef ARM_BIGLITTLE_TC2
- // Non-secure ROM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_TC2_NON_SECURE_ROM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_TC2_NON_SECURE_ROM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_TC2_NON_SECURE_ROM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-#endif
-
- // OnChip peripherals
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ONCHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_ONCHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_ONCHIP_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SCC Region
- VirtualMemoryTable[++Index].PhysicalBase = ARM_CTA15A7_SCC_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_CTA15A7_SCC_BASE;
- VirtualMemoryTable[Index].Length = SIZE_64KB;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
-#ifdef ARM_BIGLITTLE_TC2
- // TC2 OnChip non-secure SRAM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_TC2_NON_SECURE_SRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_TC2_NON_SECURE_SRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_TC2_NON_SECURE_SRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-#endif
-
-#ifndef ARM_BIGLITTLE_TC2
- // Workaround for SRAM bug in RTSM
- if (PcdGet64 (PcdSystemMemoryBase) != 0x80000000) {
- VirtualMemoryTable[++Index].PhysicalBase = 0x80000000;
- VirtualMemoryTable[Index].VirtualBase = 0x80000000;
- VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemoryBase) - 0x80000000;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
- }
-#endif
-
- // DDR
- VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
- VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);
- VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // Detect if it is a 1GB or 2GB Test Chip
- // [16:19]: 0=1GB TC2, 1=2GB TC2
- if (MmioRead32(ARM_VE_SYS_PROCID0_REG) & (0xF << 16)) {
- DEBUG((EFI_D_ERROR,"Info: 2GB Test Chip 2 detected.\n"));
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
- EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED,
- PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize),
- SIZE_1GB
- );
-
- // Map the additional 1GB into the MMU
- VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);
- VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);
- VirtualMemoryTable[Index].Length = SIZE_1GB;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
- }
-
- // End of Table
- VirtualMemoryTable[++Index].PhysicalBase = 0;
- VirtualMemoryTable[Index].VirtualBase = 0;
- VirtualMemoryTable[Index].Length = 0;
- VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
-
- *VirtualMemoryMap = VirtualMemoryTable;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf deleted file mode 100644 index d3c84de16d..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf +++ /dev/null @@ -1,54 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CTA9x4ArmVExpressLib
- FILE_GUID = b16c63a0-f417-11df-b3af-0002a5d5c51b
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- ArmTrustZoneLib
- MemoryAllocationLib
- PL341DmcLib
- PL301AxiLib
-
-[Sources.common]
- CTA9x4Helper.asm | RVCT
- CTA9x4Helper.S | GCC
- CTA9x4.c
- CTA9x4Mem.c
- CTA9x4Helper.S | GCC
- CTA9x4Helper.asm | RVCT
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf deleted file mode 100644 index 20fc0b7d11..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf +++ /dev/null @@ -1,51 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CTA9x4ArmVExpressLibSec
- FILE_GUID = 8d25ef2c-2015-416e-b8aa-2369fecd4bda
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- ArmTrustZoneLib
- PL341DmcLib
- PL301AxiLib
- SerialPortLib
-
-[Sources.common]
- CTA9x4.c
- CTA9x4Helper.S | GCC
- CTA9x4Helper.asm | RVCT
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c deleted file mode 100644 index 0af13893f7..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c +++ /dev/null @@ -1,200 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL341Dmc.h>
-#include <Drivers/PL301Axi.h>
-#include <Drivers/SP804Timer.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = {
- {
- // Cluster 0, Core 0
- 0x0, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 1
- 0x0, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 2
- 0x0, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 3
- 0x0, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- }
-};
-
-// DDR2 timings
-PL341_DMC_CONFIG DDRTimings = {
- .MaxChip = 1,
- .IsUserCfg = TRUE,
- .User0Cfg = 0x7C924924,
- .User2Cfg = (TC_UIOLHXC_VALUE << TC_UIOLHNC_SHIFT) | (TC_UIOLHXC_VALUE << TC_UIOLHPC_SHIFT) | (0x1 << TC_UIOHOCT_SHIFT) | (0x1 << TC_UIOHSTOP_SHIFT),
- .HasQos = TRUE,
- .RefreshPeriod = 0x3D0,
- .CasLatency = 0x8,
- .WriteLatency = 0x3,
- .t_mrd = 0x2,
- .t_ras = 0xA,
- .t_rc = 0xE,
- .t_rcd = 0x104,
- .t_rfc = 0x2f32,
- .t_rp = 0x14,
- .t_rrd = 0x2,
- .t_wr = 0x4,
- .t_wtr = 0x2,
- .t_xp = 0x2,
- .t_xsr = 0xC8,
- .t_esr = 0x14,
- .MemoryCfg = DMC_MEMORY_CONFIG_ACTIVE_CHIP_1 | DMC_MEMORY_CONFIG_BURST_4 |
- DMC_MEMORY_CONFIG_ROW_ADDRESS_15 | DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10,
- .MemoryCfg2 = DMC_MEMORY_CFG2_DQM_INIT | DMC_MEMORY_CFG2_CKE_INIT |
- DMC_MEMORY_CFG2_BANK_BITS_3 | DMC_MEMORY_CFG2_MEM_WIDTH_32,
- .MemoryCfg3 = 0x00000001,
- .ChipCfg0 = 0x00010000,
- .t_faw = 0x00000A0D,
- .ModeReg = DDR2_MR_BURST_LENGTH_4 | DDR2_MR_CAS_LATENCY_4 | DDR2_MR_WR_CYCLES_4,
- .ExtModeReg = DDR_EMR_RTT_50R | (DDR_EMR_ODS_VAL << DDR_EMR_ODS_MASK),
-};
-
-/**
- Return the current Boot Mode
-
- This function returns the boot reason on the platform
-
- @return Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
- VOID
- )
-{
- if (MmioRead32(ARM_VE_SYS_FLAGS_NV_REG) == 0) {
- return BOOT_WITH_FULL_CONFIGURATION;
- } else {
- return BOOT_ON_S2_RESUME;
- }
-}
-
-/**
- Initialize controllers that must setup in the normal world
-
- This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
- in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
- IN UINTN MpId
- )
-{
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- return RETURN_SUCCESS;
- }
-
- // Configure periodic timer (TIMER0) for 1MHz operation
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
- // Configure 1MHz clock
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
- // configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
- // Configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Initialize the system (or sometimes called permanent) memory
-
- This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
- VOID
- )
-{
- PL341DmcInit (ARM_VE_DMC_BASE, &DDRTimings);
- PL301AxiInit (ARM_VE_FAXI_BASE);
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
- OUT UINTN *CoreCount,
- OUT ARM_CORE_INFO **ArmCoreTable
- )
-{
- *CoreCount = sizeof(mVersatileExpressMpCoreInfoCTA9x4) / sizeof(ARM_CORE_INFO);
- *ArmCoreTable = mVersatileExpressMpCoreInfoCTA9x4;
-
- return EFI_SUCCESS;
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &mArmMpCoreInfoPpiGuid,
- &mMpCoreInfoPpi
- }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
- OUT UINTN *PpiListSize,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
- )
-{
- *PpiListSize = sizeof(gPlatformPpiTable);
- *PpiList = gPlatformPpiTable;
-}
-
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S deleted file mode 100644 index c4aee741a6..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S +++ /dev/null @@ -1,63 +0,0 @@ -#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLib.h>
-#include <Library/ArmLib.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
- bx lr
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
- and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformGetCorePosition):
- and r0, r0, #ARM_CORE_MASK
- bx lr
-
-ASM_PFX(ArmPlatformPeiBootAction):
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm deleted file mode 100644 index aa48ed730e..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm +++ /dev/null @@ -1,70 +0,0 @@ -//
-// Copyright (c) 2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Library/ArmLib.h>
-
-#include <AutoGen.h>
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT ArmPlatformPeiBootAction
- EXPORT ArmPlatformIsPrimaryCore
- EXPORT ArmPlatformGetPrimaryCoreMpId
- EXPORT ArmPlatformGetCorePosition
-
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
-
- AREA CTA9x4Helper, CODE, READONLY
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ArmPlatformGetPrimaryCoreMpId FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ArmPlatformIsPrimaryCore FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
- and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ArmPlatformGetCorePosition FUNCTION
- and r0, r0, #ARM_CORE_MASK
- bx lr
- ENDFUNC
-
-ArmPlatformPeiBootAction FUNCTION
- bx lr
- ENDFUNC
-
- END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c deleted file mode 100644 index 7ea6e74173..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c +++ /dev/null @@ -1,119 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-#include <ArmPlatform.h>
-
-// Number of Virtual Memory Map Descriptors without a Logic Tile
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-/**
- Return the Virtual Memory Map of your platform
-
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
-
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
- Virtual Memory mapping. This array must be ended by a zero-filled
- entry
-
-**/
-VOID
-ArmPlatformGetVirtualMemoryMap (
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
- )
-{
- ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
- UINTN Index = 0;
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
-
- ASSERT(VirtualMemoryMap != NULL);
-
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
- if (VirtualMemoryTable == NULL) {
- return;
- }
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
- if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {
- // ReMap (Either NOR Flash or DRAM)
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
- }
-
- // DDR
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // SMC CS7
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS0-CS1 - NOR Flash 1 & 2
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS2 - SRAM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // SMB CS3-CS6 - Motherboard Peripherals
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // If a Logic Tile is connected to The ARM Versatile Express Motherboard
- if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));
- } else {
- ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
- }
-
- // End of Table
- VirtualMemoryTable[++Index].PhysicalBase = 0;
- VirtualMemoryTable[Index].VirtualBase = 0;
- VirtualMemoryTable[Index].Length = 0;
- VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- *VirtualMemoryMap = VirtualMemoryTable;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S deleted file mode 100644 index 50ff713917..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S +++ /dev/null @@ -1,81 +0,0 @@ -#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLibV8.h>
-#include <Base.h>
-#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-ASM_PFX(ArmPlatformPeiBootAction):
- ret
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
- ldrh w0, [x0]
- ret
-
-# IN None
-# OUT x0 = number of cores present in the system
-ASM_PFX(ArmGetCpuCountPerCluster):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x0)
- ldrh w0, [x0]
- ret
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
- ldrh w1, [x1]
- and x0, x0, x1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
- ldrh w1, [x1]
- cmp w0, w1
- b.ne 1f
- mov x0, #1
- ret
-1:
- mov x0, #0
- ret
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
- and x1, x0, #ARM_CORE_MASK
- and x0, x0, #ARM_CLUSTER_MASK
- add x0, x1, x0, LSR #6
- ret
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S deleted file mode 100644 index e739050b0d..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S +++ /dev/null @@ -1,116 +0,0 @@ -#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-#include "AsmMacroIoLib.inc"
-
-#include <Chipset/ArmCortexA9.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-ASM_PFX(ArmPlatformPeiBootAction):
- bx lr
-
-# IN None
-# OUT r0 = SCU Base Address
-ASM_PFX(ArmGetScuBaseAddress):
- # Read Configuration Base Address Register. ArmCBar cannot be called to get
- # the Configuration BAR as a stack is not necessary setup. The SCU is at the
- # offset 0x0000 from the Private Memory Region.
- mrc p15, 4, r0, c15, c0, 0
- bx lr
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
- bx lr
-
-# IN None
-# OUT r0 = number of cores present in the system
-ASM_PFX(ArmGetCpuCountPerCluster):
- stmfd SP!, {r1-r2}
-
- # Read CP15 MIDR
- mrc p15, 0, r1, c0, c0, 0
-
- # Check if the CPU is A15
- mov r1, r1, LSR #4
- LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
- and r1, r1, r0
-
- LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
- cmp r1, r0
- beq _Read_cp15_reg
-
-_CPU_is_not_A15:
- mov r2, lr @ Save link register
- bl ArmGetScuBaseAddress @ Read SCU Base Address
- mov lr, r2 @ Restore link register val
- ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count
- b _Return
-
-_Read_cp15_reg:
- mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count
- lsr r0, #24
-
-_Return:
- and r0, r0, #3
- # Add '1' to the number of CPU on the Cluster
- add r0, r0, #1
- ldmfd SP!, {r1-r2}
- bx lr
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
- and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ASM_PFX(ArmPlatformGetCorePosition):
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm deleted file mode 100644 index f4ad51d36e..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm +++ /dev/null @@ -1,124 +0,0 @@ -//
-// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-
-#include <Chipset/ArmCortexA9.h>
-
-#include <AutoGen.h>
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT ArmPlatformPeiBootAction
- EXPORT ArmGetCpuCountPerCluster
- EXPORT ArmPlatformIsPrimaryCore
- EXPORT ArmPlatformGetPrimaryCoreMpId
- EXPORT ArmPlatformGetCorePosition
-
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
-
- AREA RTSMHelper, CODE, READONLY
-
-ArmPlatformPeiBootAction FUNCTION
- bx lr
- ENDFUNC
-
-// IN None
-// OUT r0 = SCU Base Address
-ArmGetScuBaseAddress FUNCTION
- // Read Configuration Base Address Register. ArmCBar cannot be called to get
- // the Configuration BAR as a stack is not necessary setup. The SCU is at the
- // offset 0x0000 from the Private Memory Region.
- mrc p15, 4, r0, c15, c0, 0
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ArmPlatformGetPrimaryCoreMpId FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
- bx lr
- ENDFUNC
-
-// IN None
-// OUT r0 = number of cores present in the system
-ArmGetCpuCountPerCluster FUNCTION
- stmfd SP!, {r1-r2}
-
- // Read CP15 MIDR
- mrc p15, 0, r1, c0, c0, 0
-
- // Check if the CPU is A15
- mov r1, r1, LSR #4
- mov r0, #ARM_CPU_TYPE_MASK
- and r1, r1, r0
-
- mov r0, #ARM_CPU_TYPE_A15
- cmp r1, r0
- beq _Read_cp15_reg
-
-_CPU_is_not_A15
- mov r2, lr ; Save link register
- bl ArmGetScuBaseAddress ; Read SCU Base Address
- mov lr, r2 ; Restore link register val
- ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] ; Read SCU Config reg to get CPU count
- b _Return
-
-_Read_cp15_reg
- mrc p15, 1, r0, c9, c0, 2 ; Read C9 register of CP15 to get CPU count
- lsr r0, #24
-
-
-_Return
- and r0, r0, #3
- // Add '1' to the number of CPU on the Cluster
- add r0, r0, #1
- ldmfd SP!, {r1-r2}
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ArmPlatformIsPrimaryCore FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
- and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ArmPlatformGetCorePosition FUNCTION
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
- ENDFUNC
-
- END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLib.inf deleted file mode 100644 index 0fe8a32230..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLib.inf +++ /dev/null @@ -1,54 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RTSMArmVExpressFoundationLib
- FILE_GUID = ce5d91ae-0893-11e2-b6bb-1c6f650265cc
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- MemoryAllocationLib
- SerialPortLib
- PrintLib
- HobLib
-
-[Sources.common]
- RTSMFoundation.c
- RTSMFoundationMem.c
-
-[Sources.AARCH64]
- AArch64/RTSMHelper.S
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
- gArmPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLibSec.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLibSec.inf deleted file mode 100644 index 70245b0f4a..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLibSec.inf +++ /dev/null @@ -1,50 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RTSMArmVExpressFoundationLibSec
- FILE_GUID = bc6e6418-0894-11e2-9dc3-1c6f650265cc
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- SerialPortLib
-
-[Sources.common]
- RTSMFoundation.c
-
-[Sources.AARCH64]
- AArch64/RTSMHelper.S
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
- gArmPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf deleted file mode 100644 index 5ee51a3817..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf +++ /dev/null @@ -1,59 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RTSMArmVExpressLib
- FILE_GUID = b98a6cb7-d472-4128-ad62-a7347f85ce13
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- MemoryAllocationLib
- SerialPortLib
- HobLib
-
-[Sources.common]
- RTSM.c
- RTSMMem.c
-
-[Sources.ARM]
- Arm/RTSMHelper.asm | RVCT
- Arm/RTSMHelper.S | GCC
-
-[Sources.AARCH64]
- AArch64/RTSMHelper.S
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmTokenSpaceGuid.PcdFvBaseAddress
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
- gArmPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf deleted file mode 100644 index a535ffd792..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf +++ /dev/null @@ -1,56 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RTSMArmVExpressLibSec
- FILE_GUID = a79eed97-4b98-4974-9690-37b32d6a5b56
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- SerialPortLib
-
-[Sources.common]
- RTSM.c
-
-[Sources.ARM]
- Arm/RTSMHelper.asm | RVCT
- Arm/RTSMHelper.S | GCC
-
-[Sources.AARCH64]
- AArch64/RTSMHelper.S
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmTokenSpaceGuid.PcdFvBaseAddress
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
- gArmPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c deleted file mode 100644 index 6ec512bfb7..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c +++ /dev/null @@ -1,198 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
- {
- // Cluster 0, Core 0
- 0x0, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 1
- 0x0, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 2
- 0x0, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 3
- 0x0, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 0
- 0x1, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 1
- 0x1, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 2
- 0x1, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 1, Core 3
- 0x1, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- }
-};
-
-/**
- Return the current Boot Mode
-
- This function returns the boot reason on the platform
-
- @return Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
- VOID
- )
-{
- return BOOT_WITH_FULL_CONFIGURATION;
-}
-
-/**
- Initialize controllers that must setup in the normal world
-
- This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
- in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
- IN UINTN MpId
- )
-{
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- return RETURN_SUCCESS;
- }
-
- // Disable memory remapping and return to normal mapping
- MmioOr32 (SP810_CTRL_BASE, BIT8);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Initialize the system (or sometimes called permanent) memory
-
- This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
- VOID
- )
-{
- // Nothing to do here
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
- OUT UINTN *CoreCount,
- OUT ARM_CORE_INFO **ArmCoreTable
- )
-{
- UINT32 ProcType;
-
- ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
- if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
- // Only support one cluster on all but ARMv8 FVP platform. FVP still uses CortexA9 ID.
- *CoreCount = ArmGetCpuCountPerCluster ();
- *ArmCoreTable = mVersatileExpressMpCoreInfoTable;
- return EFI_SUCCESS;
- } else {
- return EFI_UNSUPPORTED;
- }
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &mArmMpCoreInfoPpiGuid,
- &mMpCoreInfoPpi
- }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
- OUT UINTN *PpiListSize,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
- )
-{
- *PpiListSize = sizeof(gPlatformPpiTable);
- *PpiList = gPlatformPpiTable;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundation.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundation.c deleted file mode 100644 index 33bef8366d..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundation.c +++ /dev/null @@ -1,159 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
- {
- // Cluster 0, Core 0
- 0x0, 0x0,
-
- // NOTE:
- // The foundation model does not have the VE_SYS_REGS like all the other VE
- // platforms. We pick a spot in RAM that *should* be safe in the simple case
- // of no UEFI apps interfering (Only the Linux loader getting used). By the
- // time we come to load Linux we should have all the cores in a safe place.
- // The image expects to be loaded at 0xa0000000. We also place the mailboxes
- // here as it does not matter if we corrupt the image at this time.
- // NOTE also see: "ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S"
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (UINT64)0x0
-
- },
- {
- // Cluster 0, Core 1
- 0x0, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (UINT64)0x0
-
- },
- {
- // Cluster 0, Core 2
- 0x0, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (UINT64)0x0
- },
- {
- // Cluster 0, Core 3
- 0x0, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (EFI_PHYSICAL_ADDRESS)0xa0000000,
- (UINT64)0x0
- }
-};
-
-/**
- Return the current Boot Mode
-
- This function returns the boot reason on the platform
-
- @return Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
- VOID
- )
-{
- return BOOT_WITH_FULL_CONFIGURATION;
-}
-
-/**
- Initialize controllers that must setup in the normal world
-
- This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
- in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
- IN UINTN MpId
- )
-{
- /* The Foundation model has no SP810 to initialise. */
-
- return RETURN_SUCCESS;
-}
-
-/**
- Initialize the system (or sometimes called permanent) memory
-
- This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
- VOID
- )
-{
- // Nothing to do here
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
- OUT UINTN *CoreCount,
- OUT ARM_CORE_INFO **ArmCoreTable
- )
-{
- // Foundation model has no VE_SYS_REGS
- // Only support one cluster
- *CoreCount = ArmGetCpuCountPerCluster ();
- *ArmCoreTable = mVersatileExpressMpCoreInfoTable;
-
- return EFI_SUCCESS;
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the context of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &mArmMpCoreInfoPpiGuid,
- &mMpCoreInfoPpi
- }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
- OUT UINTN *PpiListSize,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
- )
-{
- *PpiListSize = sizeof(gPlatformPpiTable);
- *PpiList = gPlatformPpiTable;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundationMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundationMem.c deleted file mode 100644 index 863767c84d..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundationMem.c +++ /dev/null @@ -1,115 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <ArmPlatform.h>
-
-// Number of Virtual Memory Map Descriptors
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-/**
- Return the Virtual Memory Map of your platform
-
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
-
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
- Virtual Memory mapping. This array must be ended by a zero-filled
- entry
-
-**/
-VOID
-ArmPlatformGetVirtualMemoryMap (
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
- )
-{
- ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
- UINTN Index = 0;
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
- EFI_VIRTUAL_ADDRESS SparseMemoryBase;
- UINT64 SparseMemorySize;
-
- ASSERT(VirtualMemoryMap != NULL);
-
- ResourceAttributes =
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED;
-
- // Declared the additional DRAM from 2GB to 8GB
- SparseMemoryBase = 0x0880000000;
- SparseMemorySize = SIZE_2GB + SIZE_4GB;
-
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
- ResourceAttributes,
- SparseMemoryBase,
- SparseMemorySize);
-
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
- if (VirtualMemoryTable == NULL) {
- return;
- }
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
- // DDR
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // CPU peripherals. TRM. Manual says not all of them are implemented.
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // Peripheral CS2 and CS3
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // Map sparse memory region if present
- VirtualMemoryTable[++Index].PhysicalBase = SparseMemoryBase;
- VirtualMemoryTable[Index].VirtualBase = SparseMemoryBase;
- VirtualMemoryTable[Index].Length = SparseMemorySize;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // End of Table
- VirtualMemoryTable[++Index].PhysicalBase = 0;
- VirtualMemoryTable[Index].VirtualBase = 0;
- VirtualMemoryTable[Index].Length = 0;
- VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- *VirtualMemoryMap = VirtualMemoryTable;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c deleted file mode 100644 index 6c5e494d50..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ /dev/null @@ -1,158 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <ArmPlatform.h>
-
-// Number of Virtual Memory Map Descriptors
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-/**
- Return the Virtual Memory Map of your platform
-
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
-
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
- Virtual Memory mapping. This array must be ended by a zero-filled
- entry
-
-**/
-VOID
-ArmPlatformGetVirtualMemoryMap (
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
- )
-{
- ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
- UINTN Index = 0;
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
- UINT32 SysId;
- BOOLEAN HasSparseMemory;
- EFI_VIRTUAL_ADDRESS SparseMemoryBase;
- UINT64 SparseMemorySize;
-
- ASSERT (VirtualMemoryMap != NULL);
-
- // The FVP model has Sparse memory
- SysId = MmioRead32 (ARM_VE_SYS_ID_REG);
- if (SysId != ARM_RTSM_SYS_ID) {
- HasSparseMemory = TRUE;
-
- ResourceAttributes =
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED;
-
- // Declared the additional DRAM from 2GB to 4GB
- SparseMemoryBase = 0x0880000000;
- SparseMemorySize = SIZE_2GB;
-
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
- ResourceAttributes,
- SparseMemoryBase,
- SparseMemorySize);
- } else {
- HasSparseMemory = FALSE;
- SparseMemoryBase = 0x0;
- SparseMemorySize = 0x0;
- }
-
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
- if (VirtualMemoryTable == NULL) {
- return;
- }
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
- // ReMap (Either NOR Flash or DRAM)
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;
-
- if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {
- // Map the NOR Flash as Secure Memory
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_CACHED;
- } else {
- VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_UNCACHED;
- }
- } else {
- // DRAM mapping
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
- }
-
- // DDR
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // CPU peripherals. TRM. Manual says not all of them are implemented.
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS0-CS1 - NOR Flash 1 & 2
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS2 - SRAM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // Peripheral CS2 and CS3
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // Map sparse memory region if present
- if (HasSparseMemory) {
- VirtualMemoryTable[++Index].PhysicalBase = SparseMemoryBase;
- VirtualMemoryTable[Index].VirtualBase = SparseMemoryBase;
- VirtualMemoryTable[Index].Length = SparseMemorySize;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
- }
-
- // End of Table
- VirtualMemoryTable[++Index].PhysicalBase = 0;
- VirtualMemoryTable[Index].VirtualBase = 0;
- VirtualMemoryTable[Index].Length = 0;
- VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- *VirtualMemoryMap = VirtualMemoryTable;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf deleted file mode 100644 index 5705b8bd3f..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf +++ /dev/null @@ -1,55 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CTA9x4ArmVExpressLib
- FILE_GUID = aac05341-56df-4a77-b20f-f5daa456bd90
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformSecLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- ArmLib
- ArmTrustZoneLib
- ArmPlatformLib
- ArmPlatformSysConfigLib
- ArmPlatformSecExtraActionLib
- IoLib
- L2X0CacheLib
- PL301AxiLib
- PL341DmcLib
- PL35xSmcLib
- SerialPortLib
-
-[Sources.common]
- CTA9x4Sec.c
- CTA9x4Boot.asm | RVCT
- CTA9x4Boot.S | GCC
-
-[FeaturePcd]
- gArmPlatformTokenSpaceGuid.PcdStandalone
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdTrustzoneSupport
-
- gArmTokenSpaceGuid.PcdL2x0ControllerBase
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S deleted file mode 100644 index c14c986ccf..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S +++ /dev/null @@ -1,123 +0,0 @@ -//
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/ArmPlatformLib.h>
-#include <Drivers/PL35xSmc.h>
-#include <ArmPlatform.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)
-GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
-GCC_ASM_IMPORT(PL35xSmcInitialize)
-
-//
-// For each Chip Select: ChipSelect / SetCycle / SetOpMode
-//
-VersatileExpressSmcConfiguration:
- // NOR Flash 0
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(0)
- .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV
-
- // NOR Flash 1
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(4)
- .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV
-
- // SRAM
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(2)
- .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_ADV
-
- // Usb/Eth/VRAM
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(3)
- .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
-
- // Memory Mapped Peripherals
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(7)
- .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
-
- // VRAM
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(1)
- .word 0x00049249
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
-VersatileExpressSmcConfigurationEnd:
-
-/**
- Call at the beginning of the platform boot up
-
- This function allows the firmware platform to do extra actions at the early
- stage of the platform power up.
-
- Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-ASM_PFX(ArmPlatformSecBootAction):
- bx lr
-
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the satck has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-ASM_PFX(ArmPlatformSecBootMemoryInit):
- mov r5, lr
-
- //
- // Initialize PL354 SMC
- //
- LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
- LoadConstantToReg (VersatileExpressSmcConfiguration, r2)
- LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3)
- blx ASM_PFX(PL35xSmcInitialize)
-
- //
- // Page mode setup for VRAM
- //
- LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
-
- // Read current state
- ldr r0, [r2, #0]
- ldr r0, [r2, #0]
- ldr r0, = 0x00000000
- str r0, [r2, #0]
- ldr r0, [r2, #0]
-
- // Enable page mode
- ldr r0, [r2, #0]
- ldr r0, [r2, #0]
- ldr r0, = 0x00000000
- str r0, [r2, #0]
- LoadConstantToReg (0x00900090, r0)
- str r0, [r2, #0]
-
- // Confirm page mode enabled
- ldr r0, [r2, #0]
- ldr r0, [r2, #0]
- ldr r0, = 0x00000000
- str r0, [r2, #0]
- ldr r0, [r2, #0]
-
- bx r5
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm deleted file mode 100644 index 16fab1605b..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm +++ /dev/null @@ -1,127 +0,0 @@ -//
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/ArmPlatformLib.h>
-#include <Drivers/PL35xSmc.h>
-#include <ArmPlatform.h>
-#include <AutoGen.h>
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT ArmPlatformSecBootAction
- EXPORT ArmPlatformSecBootMemoryInit
- IMPORT PL35xSmcInitialize
-
- PRESERVE8
- AREA CTA9x4BootMode, CODE, READONLY
-
-//
-// For each Chip Select: ChipSelect / SetCycle / SetOpMode
-//
-VersatileExpressSmcConfiguration
- // NOR Flash 0
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(0)
- DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
-
- // NOR Flash 1
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(4)
- DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
-
- // SRAM
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(2)
- DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV
-
- // Usb/Eth/VRAM
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(3)
- DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
-
- // Memory Mapped Peripherals
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(7)
- DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
-
- // VRAM
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(1)
- DCD 0x00049249
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
-VersatileExpressSmcConfigurationEnd
-
-/**
- Call at the beginning of the platform boot up
-
- This function allows the firmware platform to do extra actions at the early
- stage of the platform power up.
-
- Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-ArmPlatformSecBootAction
- bx lr
-
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the satck has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-ArmPlatformSecBootMemoryInit
- mov r5, lr
-
- //
- // Initialize PL354 SMC
- //
- LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
- ldr r2, =VersatileExpressSmcConfiguration
- ldr r3, =VersatileExpressSmcConfigurationEnd
- blx PL35xSmcInitialize
-
- //
- // Page mode setup for VRAM
- //
- LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
-
- // Read current state
- ldr r0, [r2, #0]
- ldr r0, [r2, #0]
- ldr r0, = 0x00000000
- str r0, [r2, #0]
- ldr r0, [r2, #0]
-
- // Enable page mode
- ldr r0, [r2, #0]
- ldr r0, [r2, #0]
- ldr r0, = 0x00000000
- str r0, [r2, #0]
- ldr r0, = 0x00900090
- str r0, [r2, #0]
-
- // Confirm page mode enabled
- ldr r0, [r2, #0]
- ldr r0, [r2, #0]
- ldr r0, = 0x00000000
- str r0, [r2, #0]
- ldr r0, [r2, #0]
-
- bx r5
-
- END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c deleted file mode 100644 index 6fa0774f59..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c +++ /dev/null @@ -1,176 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/ArmPlatformSysConfigLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/SerialPortLib.h>
-
-#include <Drivers/ArmTrustzone.h>
-#include <Drivers/PL310L2Cache.h>
-
-#include <ArmPlatform.h>
-
-#define SerialPrint(txt) SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1)
-
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
- IN UINTN MpId
- )
-{
- // Nothing to do
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- return;
- }
-
- //
- // Setup TZ Protection Controller
- //
-
- if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
- ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
- } else {
- ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
- }
-
- // Set Non Secure access for all devices
- TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
- TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
- TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF);
-
- // Remove Non secure access to secure devices
- TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0,
- ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC);
-
- TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2,
- ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK);
-
- //
- // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
- //
-
- // NOR Flash 0 non secure (BootMon)
- TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED,
- ARM_VE_SMB_NOR0_BASE,0,
- TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-
- // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
- if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
- //Note: Your OS Kernel must be aware of the secure regions before to enable this region
- TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
- ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
- TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
- } else {
- TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
- ARM_VE_SMB_NOR1_BASE,0,
- TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
- }
-
- // Base of SRAM. Only half of SRAM in Non Secure world
- // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
- if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
- //Note: Your OS Kernel must be aware of the secure regions before to enable this region
- TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
- ARM_VE_SMB_SRAM_BASE,0,
- TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
- } else {
- TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
- ARM_VE_SMB_SRAM_BASE,0,
- TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
- }
-
- // Memory Mapped Peripherals. All in non secure world
- TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,
- ARM_VE_SMB_PERIPH_BASE,0,
- TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-
- // MotherBoard Peripherals and On-chip peripherals.
- TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED,
- ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0,
- TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW);
-}
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
- IN UINTN MpId
- )
-{
- UINT32 Value;
-
- // If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe
- // (waiting for the memory to be initialized) as the instruction is still in the remapped
- // flash region at 0x0 to jump in the C-code which lives in the NOR1 at 0x44000000 before
- // the region 0x0 is remapped as DRAM.
- if (!FeaturePcdGet (PcdNorFlashRemapping)) {
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- // Replaced ArmCallWFE () in ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)
- ArmCallWFE ();
- } else {
- // Wake up the secondary core from ArmCallWFE () in ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)
- ArmCallSEV ();
- }
- }
-
- // If it is not the primary core then there is nothing to do
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- return RETURN_SUCCESS;
- }
-
- // The L2x0 controller must be intialize in Secure World
- L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase),
- PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
- PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
- 0,~0, // Use default setting for the Auxiliary Control Register
- FALSE);
-
- // Initialize the System Configuration
- ArmPlatformSysConfigInitialize ();
-
- // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
- // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
- if ((FeaturePcdGet (PcdSystemMemoryInitializeInSec)) || (FeaturePcdGet (PcdStandalone) == FALSE)) {
- // If it is not a standalone build ensure the PcdSystemMemoryInitializeInSec has been set
- ASSERT(FeaturePcdGet (PcdSystemMemoryInitializeInSec) == TRUE);
-
- // Initialize system memory (DRAM)
- ArmPlatformInitializeSystemMemory ();
- }
-
- // Memory Map remapping
- if (FeaturePcdGet (PcdNorFlashRemapping)) {
- SerialPrint ("Secure ROM at 0x0\n\r");
- } else {
- Value = MmioRead32 (ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1
- // Remap the DRAM to 0x0
- MmioWrite32 (ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);
- }
-
- return RETURN_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S deleted file mode 100644 index 035e095493..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S +++ /dev/null @@ -1,70 +0,0 @@ -//
-// Copyright (c) 2013-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLibV8.h>
-#include <Chipset/AArch64.h>
-
-#ifndef __clang__
-// Register definitions used by GCC for GICv3 access.
-// These are defined by ARMCC, so keep them in the GCC specific code for now.
-#define ICC_SRE_EL2 S3_4_C12_C9_5
-#define ICC_SRE_EL3 S3_6_C12_C12_5
-#define ICC_CTLR_EL1 S3_0_C12_C12_4
-#define ICC_CTLR_EL3 S3_6_C12_C12_4
-#define ICC_PMR_EL1 S3_0_C4_C6_0
-#endif
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(InitializeGicV3)
-
-/* Initialize GICv3 to expose it as a GICv2 as UEFI does not support GICv3 yet */
-ASM_PFX(InitializeGicV3):
- // We have a GICv3. UEFI still uses the GICv2 mode. We must do enough setup
- // to allow Linux to use GICv3 if it chooses.
-
- // In order to setup NS side we need to enable it first.
- mrs x0, scr_el3
- orr x0, x0, #1
- msr scr_el3, x0
-
- // Enable SRE at EL3 and ICC_SRE_EL2 access
- mov x0, #((1 << 3) | (1 << 0)) // Enable | SRE
- mrs x1, ICC_SRE_EL3
- orr x1, x1, x0
- msr ICC_SRE_EL3, x1
- isb
-
- // Enable SRE at EL2 and ICC_SRE_EL1 access..
- mrs x1, ICC_SRE_EL2
- orr x1, x1, x0
- msr ICC_SRE_EL2, x1
- isb
-
- // Configure CPU interface
- msr ICC_CTLR_EL3, xzr
- isb
- msr ICC_CTLR_EL1, xzr
- isb
-
- // The MemoryMap view and Register view may not be consistent, So Set PMR again.
- mov w1, #1 << 7 // allow NS access to GICC_PMR
- msr ICC_PMR_EL1, x1
- isb
-
- // Remove the SCR.NS bit
- mrs x0, scr_el3
- and x0, x0, #~SCR_NS
- msr scr_el3, x0
- ret
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMBoot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMBoot.S deleted file mode 100644 index 6c73cdad31..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMBoot.S +++ /dev/null @@ -1,64 +0,0 @@ -//
-// Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLibV8.h>
-#include <Base.h>
-#include <Library/ArmPlatformLib.h>
-#include <AutoGen.h>
-#include <ArmPlatform.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)
-GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
-GCC_ASM_EXPORT(ArmSecMpCoreSecondariesWrite)
-GCC_ASM_EXPORT(ArmSecMpCoreSecondariesRead)
-
-/**
- Call at the beginning of the platform boot up
-
- This function allows the firmware platform to do extra actions at the early
- stage of the platform power up.
-
- Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-ASM_PFX(ArmPlatformSecBootAction):
- ret
-
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the satck has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-ASM_PFX(ArmPlatformSecBootMemoryInit):
- // The SMC does not need to be initialized for RTSM
- ret
-
-/* Write the flag register used to start Secondary cores */
-ASM_PFX(ArmSecMpCoreSecondariesWrite):
- // Write to the CPU Mailbox
- ret
-
-/* Read the flag register used to start Secondary cores */
-ASM_PFX(ArmSecMpCoreSecondariesRead):
- // Return the value from the CPU Mailbox
- mov x0, #0
- ret
-
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S deleted file mode 100644 index a07ed97f5f..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S +++ /dev/null @@ -1,75 +0,0 @@ -//
-// Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLibV8.h>
-#include <Base.h>
-#include <Library/ArmPlatformLib.h>
-#include <AutoGen.h>
-#include <ArmPlatform.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)
-GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
-GCC_ASM_EXPORT(ArmSecMpCoreSecondariesWrite)
-GCC_ASM_EXPORT(ArmSecMpCoreSecondariesRead)
-
-/**
- Call at the beginning of the platform boot up
-
- This function allows the firmware platform to do extra actions at the early
- stage of the platform power up.
-
- Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-ASM_PFX(ArmPlatformSecBootAction):
- ret
-
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the stack has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-ASM_PFX(ArmPlatformSecBootMemoryInit):
- // The SMC does not need to be initialized for RTSM
- ret
-
-
-// NOTE:
-// The foundation model does not have the VE_SYS_REGS like all the other VE
-// platforms. We pick a spot in RAM that *should* be safe in the simple case
-// of no UEFI apps interfering (Only the Linux loader getting used). By the
-// time we come to load Linux we should have all the cores in a safe place.
-// The image expects to be loaded at 0xa0000000. We also place the mailboxes
-// here as it does not matter if we corrupt the image at this time.
-// NOTE also see: "ArmVExpressLibRTSM/RTSMFoundation.c"
-
-/* Write the flag register used to start Secondary cores */
-ASM_PFX(ArmSecMpCoreSecondariesWrite):
- ldr x1, =0xa0000000
- str w0, [x1]
- ret
-
-
-/* Read the flag register used to start Secondary cores */
-ASM_PFX(ArmSecMpCoreSecondariesRead):
- ldr x1, =0xa0000000
- ldr w0, [x1]
- ret
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/GicV3.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/GicV3.S deleted file mode 100644 index 4a82cdbd48..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/GicV3.S +++ /dev/null @@ -1,24 +0,0 @@ -//
-// Copyright (c) 2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(InitializeGicV3)
-
-/* Initialize GICv3 to expose it as a GICv2 as UEFI does not support GICv3 yet */
-ASM_PFX(InitializeGicV3):
- // GICv3 Initialization not Supported yet
- bx lr
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/GicV3.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/GicV3.asm deleted file mode 100644 index 4578c1c31d..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/GicV3.asm +++ /dev/null @@ -1,27 +0,0 @@ -//
-// Copyright (c) 2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT InitializeGicV3
-
- PRESERVE8
- AREA GicV3, CODE, READONLY
-
-/* Initialize GICv3 to expose it as a GICv2 as UEFI does not support GICv3 yet */
-InitializeGicV3 FUNCTION
- // GICv3 Initialization not Supported yet
- bx lr
- ENDFUNC
-
- END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMBoot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMBoot.S deleted file mode 100644 index 371adcb8f9..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMBoot.S +++ /dev/null @@ -1,50 +0,0 @@ -//
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/ArmPlatformLib.h>
-#include <AutoGen.h>
-#include <ArmPlatform.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)
-GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
-
-/**
- Call at the beginning of the platform boot up
-
- This function allows the firmware platform to do extra actions at the early
- stage of the platform power up.
-
- Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-ASM_PFX(ArmPlatformSecBootAction):
- bx lr
-
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the satck has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-ASM_PFX(ArmPlatformSecBootMemoryInit):
- // The SMC does not need to be initialized for RTSM
- bx lr
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMBoot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMBoot.asm deleted file mode 100644 index 2d0b94679f..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMBoot.asm +++ /dev/null @@ -1,54 +0,0 @@ -//
-// Copyright (c) 2011, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/ArmPlatformLib.h>
-#include <AutoGen.h>
-#include <ArmPlatform.h>
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT ArmPlatformSecBootAction
- EXPORT ArmPlatformSecBootMemoryInit
-
- PRESERVE8
- AREA RTSMVExpressBootMode, CODE, READONLY
-
-/**
- Call at the beginning of the platform boot up
-
- This function allows the firmware platform to do extra actions at the early
- stage of the platform power up.
-
- Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-ArmPlatformSecBootAction
- bx lr
-
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the satck has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-ArmPlatformSecBootMemoryInit
- // The SMC does not need to be initialized for RTSM
- bx lr
-
- END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressFoundationSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressFoundationSecLib.inf deleted file mode 100644 index 2e05bece1d..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressFoundationSecLib.inf +++ /dev/null @@ -1,42 +0,0 @@ -#/* @file
-#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RTSMArmVExpressFoundationSecLib
- FILE_GUID = 9de85c42-0894-11e2-8ed6-1c6f650265cc
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformSecLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- SerialPortLib
-
-[Sources.common]
- RTSMFoundationSec.c
-
-[Sources.AARCH64]
- AArch64/RTSMFoundationBoot.S
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdFvBaseAddress
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf deleted file mode 100644 index ee7d3253cd..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf +++ /dev/null @@ -1,49 +0,0 @@ -#/* @file
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RTSMArmVExpressSecLib
- FILE_GUID = 1fdaabb0-ab7d-480c-91ff-428dc1546f3a
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformSecLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- SerialPortLib
-
-[Sources.common]
- RTSMSec.c
-
-[Sources.ARM]
- Arm/RTSMBoot.asm | RVCT
- Arm/RTSMBoot.S | GCC
- Arm/GicV3.asm | RVCT
- Arm/GicV3.S | GCC
-
-[Sources.AARCH64]
- AArch64/RTSMBoot.S
- AArch64/GicV3.S
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdFvBaseAddress
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c deleted file mode 100644 index bae6d0b1df..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c +++ /dev/null @@ -1,71 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL310L2Cache.h>
-#include <Drivers/SP804Timer.h>
-
-#include <ArmPlatform.h>
-
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
- IN UINTN MpId
- )
-{
- // No TZPC or TZASC on RTSM to initialize
-}
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
- IN UINTN MpId
- )
-{
- /* The Foundation model has no SP810 to initialise. */
-
- return RETURN_SUCCESS;
-}
-
-/**
- Call before jumping to Normal World
-
- This function allows the firmware platform to do extra actions before
- jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
- IN UINTN MpId,
- OUT UINTN* JumpAddress
- )
-{
- *JumpAddress = PcdGet64 (PcdFvBaseAddress);
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c deleted file mode 100644 index 9023715ab0..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c +++ /dev/null @@ -1,100 +0,0 @@ -/** @file
-*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmGicLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL310L2Cache.h>
-#include <Drivers/SP804Timer.h>
-
-#include <ArmPlatform.h>
-
-// Initialize GICv3 to expose it as a GICv2 as UEFI does not support GICv3 yet
-VOID
-InitializeGicV3 (
- VOID
- );
-
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
- IN UINTN MpId
- )
-{
- // No TZPC or TZASC on RTSM to initialize
-}
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
- IN UINTN MpId
- )
-{
- UINT32 Identification;
-
- // If it is not the primary core then there is nothing to do
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- return RETURN_SUCCESS;
- }
-
- // Configure periodic timer (TIMER0) for 1MHz operation
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
- // Configure 1MHz clock
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
- // Configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
- // Configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-
- // Read the GIC Identification Register
- Identification = ArmGicGetInterfaceIdentification (PcdGet32 (PcdGicInterruptInterfaceBase));
-
- // Check if we are GICv3
- if (ARM_GIC_ICCIIDR_GET_ARCH_VERSION(Identification) >= 0x3) {
- InitializeGicV3 ();
- }
-
- return RETURN_SUCCESS;
-}
-
-/**
- Call before jumping to Normal World
-
- This function allows the firmware platform to do extra actions before
- jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
- IN UINTN MpId,
- OUT UINTN* JumpAddress
- )
-{
- *JumpAddress = PcdGet64 (PcdFvBaseAddress);
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfig.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfig.c deleted file mode 100644 index 6dfbacd117..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfig.c +++ /dev/null @@ -1,273 +0,0 @@ -/** @file ArmVExpressSysConfig.c
-
- Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/IoLib.h>
-#include <Library/DebugLib.h>
-
-#include <Library/ArmPlatformSysConfigLib.h>
-#include <ArmPlatform.h>
-
-//
-// SYS_CFGCTRL Bits
-//
-#define SYS_CFGCTRL_START BIT31
-#define SYS_CFGCTRL_READ (0 << 30)
-#define SYS_CFGCTRL_WRITE (1 << 30)
-#define SYS_CFGCTRL_FUNCTION(fun) (((fun ) & 0x3F) << 20)
-#define SYS_CFGCTRL_SITE(site) (((site) & 0x3) << 16)
-#define SYS_CFGCTRL_POSITION(pos) (((pos ) & 0xF) << 12)
-#define SYS_CFGCTRL_DEVICE(dev) ((dev ) & 0xFFF)
-
-//
-// SYS_CFGSTAT Bits
-//
-#define SYS_CFGSTAT_ERROR BIT1
-#define SYS_CFGSTAT_COMPLETE BIT0
-
-/****************************************************************************
- *
- * This file makes it easier to access the System Configuration Registers
- * in the ARM Versatile Express motherboard.
- *
- ****************************************************************************/
-
-RETURN_STATUS
-ArmPlatformSysConfigInitialize (
- VOID
- )
-{
- return RETURN_SUCCESS;
-}
-
-/***************************************
- * GENERAL FUNCTION: AccessSysCfgRegister
- * Interacts with
- * SYS_CFGSTAT
- * SYS_CFGDATA
- * SYS_CFGCTRL
- * for setting and for reading out values
- ***************************************/
-
-RETURN_STATUS
-AccessSysCfgRegister (
- IN UINT32 ReadWrite,
- IN UINT32 Function,
- IN UINT32 Site,
- IN UINT32 Position,
- IN UINT32 Device,
- IN OUT UINT32* Data
- )
-{
- UINT32 SysCfgCtrl;
-
- // Clear the COMPLETE bit
- MmioAnd32(ARM_VE_SYS_CFGSTAT_REG, ~SYS_CFGSTAT_COMPLETE);
-
- // If writing, then set the data value
- if(ReadWrite == SYS_CFGCTRL_WRITE) {
- MmioWrite32(ARM_VE_SYS_CFGDATA_REG, *Data);
- }
-
- // Set the control value
- SysCfgCtrl = SYS_CFGCTRL_START | ReadWrite | SYS_CFGCTRL_FUNCTION(Function) | SYS_CFGCTRL_SITE(Site) |
- SYS_CFGCTRL_POSITION(Position) | SYS_CFGCTRL_DEVICE(Device);
- MmioWrite32(ARM_VE_SYS_CFGCTRL_REG, SysCfgCtrl);
-
- // Wait until the COMPLETE bit is set
- while ((MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_COMPLETE) == 0);
-
- // Check for errors
- if(MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_ERROR) {
- return RETURN_DEVICE_ERROR;
- }
-
- // If reading then get the data value
- if(ReadWrite == SYS_CFGCTRL_READ) {
- *Data = MmioRead32(ARM_VE_SYS_CFGDATA_REG);
- }
-
- return RETURN_SUCCESS;
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigGet (
- IN SYS_CONFIG_FUNCTION Function,
- OUT UINT32* Value
- )
-{
- UINT32 Site;
- UINT32 Position;
- UINT32 Device;
-
- Position = 0;
- Device = 0;
-
- // Intercept some functions
- switch(Function) {
-
- case SYS_CFG_OSC_SITE1:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_1_SITE;
- break;
-
- case SYS_CFG_OSC_SITE2:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_2_SITE;
- break;
-
- case SYS_CFG_MUXFPGA:
- Site = *Value;
- break;
-
- case SYS_CFG_OSC:
- case SYS_CFG_VOLT:
- case SYS_CFG_AMP:
- case SYS_CFG_TEMP:
- case SYS_CFG_RESET:
- case SYS_CFG_SCC:
- case SYS_CFG_DVIMODE:
- case SYS_CFG_POWER:
- Site = ARM_VE_MOTHERBOARD_SITE;
- break;
-
- case SYS_CFG_SHUTDOWN:
- case SYS_CFG_REBOOT:
- case SYS_CFG_RTC:
- default:
- return RETURN_UNSUPPORTED;
- }
-
- return AccessSysCfgRegister (SYS_CFGCTRL_READ, Function, Site, Position, Device, Value);
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigGetValues (
- IN SYS_CONFIG_FUNCTION Function,
- IN UINTN Size,
- OUT UINT32* Values
- )
-{
- return RETURN_UNSUPPORTED;
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigSet (
- IN SYS_CONFIG_FUNCTION Function,
- IN UINT32 Value
- )
-{
- UINT32 Site;
- UINT32 Position;
- UINT32 Device;
-
- Position = 0;
- Device = 0;
-
- // Intercept some functions
- switch(Function) {
-
- case SYS_CFG_OSC_SITE1:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_1_SITE;
- break;
-
- case SYS_CFG_OSC_SITE2:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_2_SITE;
- break;
-
- case SYS_CFG_MUXFPGA:
- Site = Value;
- break;
-
- case SYS_CFG_RESET:
- case SYS_CFG_SCC:
- case SYS_CFG_SHUTDOWN:
- case SYS_CFG_REBOOT:
- case SYS_CFG_DVIMODE:
- case SYS_CFG_POWER:
- Site = ARM_VE_MOTHERBOARD_SITE;
- break;
-
- case SYS_CFG_OSC:
- case SYS_CFG_VOLT:
- case SYS_CFG_AMP:
- case SYS_CFG_TEMP:
- case SYS_CFG_RTC:
- default:
- return RETURN_UNSUPPORTED;
- }
-
- return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigSetDevice (
- IN SYS_CONFIG_FUNCTION Function,
- IN UINT32 Device,
- IN UINT32 Value
- )
-{
- UINT32 Site;
- UINT32 Position;
-
- Position = 0;
-
- // Intercept some functions
- switch(Function) {
- case SYS_CFG_SCC:
-#ifdef ARM_VE_SCC_BASE
- MmioWrite32 ((ARM_VE_SCC_BASE + (Device * 4)),Value);
- return RETURN_SUCCESS;
-#else
- // There is no System Configuration Controller on the Model
- return RETURN_UNSUPPORTED;
-#endif
-
- case SYS_CFG_OSC_SITE1:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_1_SITE;
- break;
-
- case SYS_CFG_OSC_SITE2:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_2_SITE;
- break;
-
- case SYS_CFG_MUXFPGA:
- Site = Value;
- break;
-
- case SYS_CFG_RTC:
- return RETURN_UNSUPPORTED;
- //break;
-
- case SYS_CFG_OSC:
- case SYS_CFG_VOLT:
- case SYS_CFG_AMP:
- case SYS_CFG_TEMP:
- case SYS_CFG_RESET:
- case SYS_CFG_SHUTDOWN:
- case SYS_CFG_REBOOT:
- case SYS_CFG_DVIMODE:
- case SYS_CFG_POWER:
- Site = ARM_VE_MOTHERBOARD_SITE;
- break;
- default:
- return RETURN_UNSUPPORTED;
- }
-
- return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf deleted file mode 100644 index b89455a421..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf +++ /dev/null @@ -1,35 +0,0 @@ -#/** @file
-#
-# Component description file for ArmVExpressSysConfigLib module
-#
-# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmVExpressSysConfigLib
- FILE_GUID = a05b5cc0-82d2-11e0-82cb-0002a5d5c51b
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformSysConfigLib|SEC DXE_DRIVER
-
-[Sources.common]
- ArmVExpressSysConfig.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- BaseLib
- IoLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/ArmVExpressSysConfigRuntimeLib.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/ArmVExpressSysConfigRuntimeLib.c deleted file mode 100644 index 1f915e3b02..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/ArmVExpressSysConfigRuntimeLib.c +++ /dev/null @@ -1,283 +0,0 @@ -/** @file ArmVExpressSysConfig.c
-
- Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/IoLib.h>
-#include <Library/DebugLib.h>
-
-#include <Library/ArmPlatformSysConfigLib.h>
-#include <ArmPlatform.h>
-
-#include <Uefi.h>
-#include <Library/UefiRuntimeLib.h>
-
-//
-// SYS_CFGCTRL Bits
-//
-#define SYS_CFGCTRL_START BIT31
-#define SYS_CFGCTRL_READ (0 << 30)
-#define SYS_CFGCTRL_WRITE (1 << 30)
-#define SYS_CFGCTRL_FUNCTION(fun) (((fun ) & 0x3F) << 20)
-#define SYS_CFGCTRL_SITE(site) (((site) & 0x3) << 16)
-#define SYS_CFGCTRL_POSITION(pos) (((pos ) & 0xF) << 12)
-#define SYS_CFGCTRL_DEVICE(dev) ((dev ) & 0xFFF)
-
-//
-// SYS_CFGSTAT Bits
-//
-#define SYS_CFGSTAT_ERROR BIT1
-#define SYS_CFGSTAT_COMPLETE BIT0
-
-/****************************************************************************
- *
- * This file makes it easier to access the System Configuration Registers
- * in the ARM Versatile Express motherboard.
- *
- ****************************************************************************/
-
-RETURN_STATUS
-ArmPlatformSysConfigInitialize (
- VOID
- )
-{
- return RETURN_SUCCESS;
-}
-
-/***************************************
- * GENERAL FUNCTION: AccessSysCfgRegister
- * Interacts with
- * SYS_CFGSTAT
- * SYS_CFGDATA
- * SYS_CFGCTRL
- * for setting and for reading out values
- ***************************************/
-
-RETURN_STATUS
-AccessSysCfgRegister (
- IN UINT32 ReadWrite,
- IN UINT32 Function,
- IN UINT32 Site,
- IN UINT32 Position,
- IN UINT32 Device,
- IN OUT UINT32* Data
- )
-{
- UINT32 SysCfgCtrl;
-
- if (EfiAtRuntime ()) {
- return RETURN_UNSUPPORTED;
- }
-
- // Clear the COMPLETE bit
- MmioAnd32(ARM_VE_SYS_CFGSTAT_REG, ~SYS_CFGSTAT_COMPLETE);
-
- // If writing, then set the data value
- if(ReadWrite == SYS_CFGCTRL_WRITE) {
- MmioWrite32(ARM_VE_SYS_CFGDATA_REG, *Data);
- }
-
- // Set the control value
- SysCfgCtrl = SYS_CFGCTRL_START | ReadWrite | SYS_CFGCTRL_FUNCTION(Function) | SYS_CFGCTRL_SITE(Site) |
- SYS_CFGCTRL_POSITION(Position) | SYS_CFGCTRL_DEVICE(Device);
- MmioWrite32(ARM_VE_SYS_CFGCTRL_REG, SysCfgCtrl);
-
- // Wait until the COMPLETE bit is set
- while ((MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_COMPLETE) == 0);
-
- // Check for errors
- if(MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_ERROR) {
- return RETURN_DEVICE_ERROR;
- }
-
- // If reading then get the data value
- if(ReadWrite == SYS_CFGCTRL_READ) {
- *Data = MmioRead32(ARM_VE_SYS_CFGDATA_REG);
- }
-
- return RETURN_SUCCESS;
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigGet (
- IN SYS_CONFIG_FUNCTION Function,
- OUT UINT32* Value
- )
-{
- UINT32 Site;
- UINT32 Position;
- UINT32 Device;
-
- Position = 0;
- Device = 0;
-
- // Intercept some functions
- switch(Function) {
-
- case SYS_CFG_OSC_SITE1:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_1_SITE;
- break;
-
- case SYS_CFG_OSC_SITE2:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_2_SITE;
- break;
-
- case SYS_CFG_MUXFPGA:
- Site = *Value;
- break;
-
- case SYS_CFG_OSC:
- case SYS_CFG_VOLT:
- case SYS_CFG_AMP:
- case SYS_CFG_TEMP:
- case SYS_CFG_RESET:
- case SYS_CFG_SCC:
- case SYS_CFG_DVIMODE:
- case SYS_CFG_POWER:
- Site = ARM_VE_MOTHERBOARD_SITE;
- break;
-
- case SYS_CFG_SHUTDOWN:
- case SYS_CFG_REBOOT:
- case SYS_CFG_RTC:
- default:
- return RETURN_UNSUPPORTED;
- }
-
- return AccessSysCfgRegister (SYS_CFGCTRL_READ, Function, Site, Position, Device, Value);
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigGetValues (
- IN SYS_CONFIG_FUNCTION Function,
- IN UINTN Size,
- OUT UINT32* Values
- )
-{
- return RETURN_UNSUPPORTED;
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigSet (
- IN SYS_CONFIG_FUNCTION Function,
- IN UINT32 Value
- )
-{
- UINT32 Site;
- UINT32 Position;
- UINT32 Device;
-
- Position = 0;
- Device = 0;
-
- // Intercept some functions
- switch(Function) {
-
- case SYS_CFG_OSC_SITE1:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_1_SITE;
- break;
-
- case SYS_CFG_OSC_SITE2:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_2_SITE;
- break;
-
- case SYS_CFG_MUXFPGA:
- Site = Value;
- break;
-
- case SYS_CFG_RESET:
- case SYS_CFG_SCC:
- case SYS_CFG_SHUTDOWN:
- case SYS_CFG_REBOOT:
- case SYS_CFG_DVIMODE:
- case SYS_CFG_POWER:
- Site = ARM_VE_MOTHERBOARD_SITE;
- break;
-
- case SYS_CFG_OSC:
- case SYS_CFG_VOLT:
- case SYS_CFG_AMP:
- case SYS_CFG_TEMP:
- case SYS_CFG_RTC:
- default:
- return RETURN_UNSUPPORTED;
- }
-
- return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);
-}
-
-RETURN_STATUS
-ArmPlatformSysConfigSetDevice (
- IN SYS_CONFIG_FUNCTION Function,
- IN UINT32 Device,
- IN UINT32 Value
- )
-{
- UINT32 Site;
- UINT32 Position;
-
- Position = 0;
-
- // Intercept some functions
- switch(Function) {
- case SYS_CFG_SCC:
-#ifdef ARM_VE_SCC_BASE
- if (EfiAtRuntime ()) {
- return RETURN_UNSUPPORTED;
- }
- MmioWrite32 ((ARM_VE_SCC_BASE + (Device * 4)),Value);
- return RETURN_SUCCESS;
-#else
- // There is no System Configuration Controller on the Model
- return RETURN_UNSUPPORTED;
-#endif
-
- case SYS_CFG_OSC_SITE1:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_1_SITE;
- break;
-
- case SYS_CFG_OSC_SITE2:
- Function = SYS_CFG_OSC;
- Site = ARM_VE_DAUGHTERBOARD_2_SITE;
- break;
-
- case SYS_CFG_MUXFPGA:
- Site = Value;
- break;
-
- case SYS_CFG_RTC:
- return RETURN_UNSUPPORTED;
- //break;
-
- case SYS_CFG_OSC:
- case SYS_CFG_VOLT:
- case SYS_CFG_AMP:
- case SYS_CFG_TEMP:
- case SYS_CFG_RESET:
- case SYS_CFG_SHUTDOWN:
- case SYS_CFG_REBOOT:
- case SYS_CFG_DVIMODE:
- case SYS_CFG_POWER:
- Site = ARM_VE_MOTHERBOARD_SITE;
- break;
- default:
- return RETURN_UNSUPPORTED;
- }
-
- return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/ArmVExpressSysConfigRuntimeLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/ArmVExpressSysConfigRuntimeLib.inf deleted file mode 100644 index 988250d930..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/ArmVExpressSysConfigRuntimeLib.inf +++ /dev/null @@ -1,37 +0,0 @@ -#/** @file
-#
-# Component description file for ArmVExpressSysConfigRuntimeLib module
-#
-# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-# Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmVExpressSysConfigRuntimeLib
- FILE_GUID = 6275b819-615c-4a36-814a-c1f330b4e5d9
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformSysConfigLib|DXE_RUNTIME_DRIVER
-
-[Sources.common]
- ArmVExpressSysConfigRuntimeLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- BaseLib
- IoLib
- UefiRuntimeLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c b/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c deleted file mode 100644 index a57846715e..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c +++ /dev/null @@ -1,289 +0,0 @@ -/**
-
- Copyright (c) 2012, ARM Ltd. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-
-#include <Library/ArmPlatformSysConfigLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LcdPlatformLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#include <Protocol/Cpu.h>
-#include <Protocol/EdidDiscovered.h>
-#include <Protocol/EdidActive.h>
-
-#include <ArmPlatform.h>
-
-typedef struct {
- UINT32 Mode;
- UINT32 HorizontalResolution;
- UINT32 VerticalResolution;
- LCD_BPP Bpp;
- UINT32 OscFreq;
-
- // These are used by HDLCD
- UINT32 HSync;
- UINT32 HBackPorch;
- UINT32 HFrontPorch;
- UINT32 VSync;
- UINT32 VBackPorch;
- UINT32 VFrontPorch;
-} LCD_RESOLUTION;
-
-
-LCD_RESOLUTION mResolutions[] = {
- { // Mode 0 : VGA : 640 x 480 x 24 bpp
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
- },
- { // Mode 1 : SVGA : 800 x 600 x 24 bpp
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
- },
- { // Mode 2 : XGA : 1024 x 768 x 24 bpp
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
- },
- { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
- SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),
- SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
- SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
- },
- { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
- UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),
- UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
- UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
- },
- { // Mode 5 : HD : 1920 x 1080 x 24 bpp
- HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),
- HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
- HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
- }
-};
-
-EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = {
- 0,
- NULL
-};
-
-EFI_EDID_ACTIVE_PROTOCOL mEdidActive = {
- 0,
- NULL
-};
-
-EFI_STATUS
-LcdPlatformInitializeDisplay (
- IN EFI_HANDLE Handle
- )
-{
- EFI_STATUS Status;
-
- // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard
- Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, ARM_VE_DAUGHTERBOARD_1_SITE);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- // Install the EDID Protocols
- Status = gBS->InstallMultipleProtocolInterfaces (
- &Handle,
- &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered,
- &gEfiEdidActiveProtocolGuid, &mEdidActive,
- NULL
- );
-
- return Status;
-}
-
-EFI_STATUS
-LcdPlatformGetVram (
- OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
- OUT UINTN* VramSize
- )
-{
- EFI_STATUS Status;
- EFI_CPU_ARCH_PROTOCOL *Cpu;
- EFI_ALLOCATE_TYPE AllocationType;
-
- // Set the vram size
- *VramSize = LCD_VRAM_SIZE;
-
- *VramBaseAddress = (EFI_PHYSICAL_ADDRESS)LCD_VRAM_CORE_TILE_BASE;
-
- // Allocate the VRAM from the DRAM so that nobody else uses it.
- if (*VramBaseAddress == 0) {
- AllocationType = AllocateAnyPages;
- } else {
- AllocationType = AllocateAddress;
- }
- Status = gBS->AllocatePages (AllocationType, EfiBootServicesData, EFI_SIZE_TO_PAGES(((UINTN)LCD_VRAM_SIZE)), VramBaseAddress);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- // Ensure the Cpu architectural protocol is already installed
- Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
- ASSERT_EFI_ERROR(Status);
-
- // Mark the VRAM as un-cacheable. The VRAM is inside the DRAM, which is cacheable.
- Status = Cpu->SetMemoryAttributes (Cpu, *VramBaseAddress, *VramSize, EFI_MEMORY_UC);
- ASSERT_EFI_ERROR(Status);
- if (EFI_ERROR(Status)) {
- gBS->FreePool (VramBaseAddress);
- return Status;
- }
-
- return EFI_SUCCESS;
-}
-
-UINT32
-LcdPlatformGetMaxMode (
- VOID
- )
-{
- //
- // The following line will report correctly the total number of graphics modes
- // that could be supported by the graphics driver:
- //
- return (sizeof(mResolutions) / sizeof(LCD_RESOLUTION));
-}
-
-EFI_STATUS
-LcdPlatformSetMode (
- IN UINT32 ModeNumber
- )
-{
- EFI_STATUS Status;
-
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- // Set the video mode oscillator
- do {
- Status = ArmPlatformSysConfigSetDevice (SYS_CFG_OSC_SITE1, PcdGet32(PcdHdLcdVideoModeOscId), mResolutions[ModeNumber].OscFreq);
- } while (Status == EFI_TIMEOUT);
- if (EFI_ERROR(Status)) {
- ASSERT_EFI_ERROR (Status);
- return Status;
- }
-
- // Set the DVI into the new mode
- do {
- Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, mResolutions[ModeNumber].Mode);
- } while (Status == EFI_TIMEOUT);
- if (EFI_ERROR(Status)) {
- ASSERT_EFI_ERROR (Status);
- return Status;
- }
-
- // Set the multiplexer
- Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, ARM_VE_DAUGHTERBOARD_1_SITE);
- if (EFI_ERROR(Status)) {
- ASSERT_EFI_ERROR (Status);
- return Status;
- }
-
- return Status;
-}
-
-EFI_STATUS
-LcdPlatformQueryMode (
- IN UINT32 ModeNumber,
- OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
- )
-{
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- Info->Version = 0;
- Info->HorizontalResolution = mResolutions[ModeNumber].HorizontalResolution;
- Info->VerticalResolution = mResolutions[ModeNumber].VerticalResolution;
- Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution;
-
- switch (mResolutions[ModeNumber].Bpp) {
- case LCD_BITS_PER_PIXEL_24:
- Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
- Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
- Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
- Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
- Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
- break;
-
- case LCD_BITS_PER_PIXEL_16_555:
- case LCD_BITS_PER_PIXEL_16_565:
- case LCD_BITS_PER_PIXEL_12_444:
- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
- default:
- // These are not supported
- ASSERT(FALSE);
- break;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-LcdPlatformGetTimings (
- IN UINT32 ModeNumber,
- OUT UINT32* HRes,
- OUT UINT32* HSync,
- OUT UINT32* HBackPorch,
- OUT UINT32* HFrontPorch,
- OUT UINT32* VRes,
- OUT UINT32* VSync,
- OUT UINT32* VBackPorch,
- OUT UINT32* VFrontPorch
- )
-{
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- *HRes = mResolutions[ModeNumber].HorizontalResolution;
- *HSync = mResolutions[ModeNumber].HSync;
- *HBackPorch = mResolutions[ModeNumber].HBackPorch;
- *HFrontPorch = mResolutions[ModeNumber].HFrontPorch;
- *VRes = mResolutions[ModeNumber].VerticalResolution;
- *VSync = mResolutions[ModeNumber].VSync;
- *VBackPorch = mResolutions[ModeNumber].VBackPorch;
- *VFrontPorch = mResolutions[ModeNumber].VFrontPorch;
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-LcdPlatformGetBpp (
- IN UINT32 ModeNumber,
- OUT LCD_BPP * Bpp
- )
-{
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- *Bpp = mResolutions[ModeNumber].Bpp;
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf deleted file mode 100644 index 7807247379..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf +++ /dev/null @@ -1,44 +0,0 @@ -#/** @file
-#
-# Component description file for HdLcdArmLib module
-#
-# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = HdLcdArmVExpress
- FILE_GUID = 535a720e-06c0-4bb9-b563-452216abbed4
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = LcdPlatformLib
-
-[Sources.common]
-
-HdLcdArmVExpress.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
-
-[LibraryClasses]
- BaseLib
- ArmPlatformSysConfigLib
-
-[Protocols]
- gEfiEdidDiscoveredProtocolGuid # Produced
- gEfiEdidActiveProtocolGuid # Produced
-
-[Pcd]
- gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
- gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c b/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c deleted file mode 100644 index a136bff4a1..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c +++ /dev/null @@ -1,84 +0,0 @@ -/** @file
-
- Copyright (c) 2011-2014, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- **/
-
-#include <PiDxe.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/NorFlashPlatformLib.h>
-#include <ArmPlatform.h>
-
-#define NOR_FLASH_DEVICE_COUNT 4
-
-NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = {
- { // BootMon
- ARM_VE_SMB_NOR0_BASE,
- ARM_VE_SMB_NOR0_BASE,
- SIZE_256KB * 255,
- SIZE_256KB,
- { 0xE7223039, 0x5836, 0x41E1, { 0xB5, 0x42, 0xD7, 0xEC, 0x73, 0x6C, 0x5E, 0x59 } }
- },
- { // BootMon non-volatile storage
- ARM_VE_SMB_NOR0_BASE,
- ARM_VE_SMB_NOR0_BASE + SIZE_256KB * 255,
- SIZE_64KB * 4,
- SIZE_64KB,
- { 0x02118005, 0x9DA7, 0x443A, { 0x92, 0xD5, 0x78, 0x1F, 0x02, 0x2A, 0xED, 0xBB } }
- },
- { // UEFI
- ARM_VE_SMB_NOR1_BASE,
- ARM_VE_SMB_NOR1_BASE,
- SIZE_256KB * 255,
- SIZE_256KB,
- { 0x1F15DA3C, 0x37FF, 0x4070, { 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A } }
- },
- { // UEFI Variable Services non-volatile storage
- ARM_VE_SMB_NOR1_BASE,
- ARM_VE_SMB_NOR1_BASE + SIZE_256KB * 255,
- SIZE_64KB * 3, //FIXME: Set 3 blocks because I did not succeed to copy 4 blocks into the ARM Versatile Express NOR Flash in the last NOR Flash. It should be 4 blocks
- SIZE_64KB,
- { 0xCC2CBF29, 0x1498, 0x4CDD, { 0x81, 0x71, 0xF8, 0xB6, 0xB4, 0x1D, 0x09, 0x09 } }
- }
-};
-
-EFI_STATUS
-NorFlashPlatformInitialization (
- VOID
- )
-{
- // Everything seems ok so far, so now we need to disable the platform-specific
- // flash write protection for Versatile Express
- if ((MmioRead32 (ARM_VE_SYS_FLASH) & 0x1) == 0) {
- // Writing to NOR FLASH is disabled, so enable it
- MmioWrite32 (ARM_VE_SYS_FLASH,1);
- DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: informational - Had to enable HSYS_FLASH flag.\n" ));
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-NorFlashPlatformGetDevices (
- OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,
- OUT UINT32 *Count
- )
-{
- if ((NorFlashDevices == NULL) || (Count == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- *NorFlashDevices = mNorFlashDevices;
- *Count = NOR_FLASH_DEVICE_COUNT;
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf deleted file mode 100644 index 0798cc30d8..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf +++ /dev/null @@ -1,32 +0,0 @@ -#/** @file
-#
-# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = NorFlashArmVExpressLib
- FILE_GUID = c0f5dfa0-7599-11e0-9665-0002a5d5c51b
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = NorFlashPlatformLib
-
-[Sources.common]
- NorFlashArmVExpress.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- IoLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c deleted file mode 100644 index 2000c9bdf4..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c +++ /dev/null @@ -1,374 +0,0 @@ -/** @file
-
- Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-
-#include <Library/ArmPlatformSysConfigLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LcdPlatformLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#include <Protocol/Cpu.h>
-#include <Protocol/EdidDiscovered.h>
-#include <Protocol/EdidActive.h>
-
-#include <ArmPlatform.h>
-
-typedef struct {
- UINT32 Mode;
- UINT32 HorizontalResolution;
- UINT32 VerticalResolution;
- LCD_BPP Bpp;
- UINT32 OscFreq;
-
- UINT32 HSync;
- UINT32 HBackPorch;
- UINT32 HFrontPorch;
- UINT32 VSync;
- UINT32 VBackPorch;
- UINT32 VFrontPorch;
-} LCD_RESOLUTION;
-
-
-LCD_RESOLUTION mResolutions[] = {
- { // Mode 0 : VGA : 640 x 480 x 24 bpp
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
- },
- { // Mode 1 : SVGA : 800 x 600 x 24 bpp
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
- },
- { // Mode 2 : XGA : 1024 x 768 x 24 bpp
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
- },
- { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
- SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),
- SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
- SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
- },
- { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
- UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),
- UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
- UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
- },
- { // Mode 5 : HD : 1920 x 1080 x 24 bpp
- HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),
- HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
- HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
- },
- { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY,
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
- },
- { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY,
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
- },
- { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY,
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
- },
- { // Mode 9 : VGA : 640 x 480 x 15 bpp
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY,
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
- },
- { // Mode 10 : SVGA : 800 x 600 x 15 bpp
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY,
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
- },
- { // Mode 11 : XGA : 1024 x 768 x 15 bpp
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY,
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
- },
- { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000,
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
- },
- { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY,
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
- },
- { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY,
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
- },
- { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY,
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
- }
-};
-
-EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = {
- 0,
- NULL
-};
-
-EFI_EDID_ACTIVE_PROTOCOL mEdidActive = {
- 0,
- NULL
-};
-
-
-EFI_STATUS
-LcdPlatformInitializeDisplay (
- IN EFI_HANDLE Handle
- )
-{
- EFI_STATUS Status;
-
- // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard
- Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);
- if (!EFI_ERROR(Status)) {
- // Install the EDID Protocols
- Status = gBS->InstallMultipleProtocolInterfaces(
- &Handle,
- &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered,
- &gEfiEdidActiveProtocolGuid, &mEdidActive,
- NULL
- );
- }
-
- return Status;
-}
-
-EFI_STATUS
-LcdPlatformGetVram (
- OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
- OUT UINTN* VramSize
- )
-{
- EFI_STATUS Status;
- EFI_CPU_ARCH_PROTOCOL *Cpu;
-
- Status = EFI_SUCCESS;
-
- // Is it on the motherboard or on the daughterboard?
- switch(PL111_CLCD_SITE) {
-
- case ARM_VE_MOTHERBOARD_SITE:
- *VramBaseAddress = (EFI_PHYSICAL_ADDRESS) PL111_CLCD_VRAM_MOTHERBOARD_BASE;
- *VramSize = LCD_VRAM_SIZE;
- break;
-
- case ARM_VE_DAUGHTERBOARD_1_SITE:
- *VramBaseAddress = (EFI_PHYSICAL_ADDRESS) LCD_VRAM_CORE_TILE_BASE;
- *VramSize = LCD_VRAM_SIZE;
-
- // Allocate the VRAM from the DRAM so that nobody else uses it.
- Status = gBS->AllocatePages( AllocateAddress, EfiBootServicesData, EFI_SIZE_TO_PAGES(((UINTN)LCD_VRAM_SIZE)), VramBaseAddress);
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- // Ensure the Cpu architectural protocol is already installed
- Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
- ASSERT_EFI_ERROR(Status);
-
- // Mark the VRAM as un-cachable. The VRAM is inside the DRAM, which is cachable.
- Status = Cpu->SetMemoryAttributes(Cpu, *VramBaseAddress, *VramSize, EFI_MEMORY_UC);
- ASSERT_EFI_ERROR(Status);
- if (EFI_ERROR(Status)) {
- gBS->FreePool(VramBaseAddress);
- return Status;
- }
- break;
-
- default:
- // Unsupported site
- Status = EFI_UNSUPPORTED;
- break;
- }
-
- return Status;
-}
-
-UINT32
-LcdPlatformGetMaxMode (
- VOID
- )
-{
- // The following line will report correctly the total number of graphics modes
- // supported by the PL111CLCD.
- //return (sizeof(mResolutions) / sizeof(CLCD_RESOLUTION)) - 1;
-
- // However, on some platforms it is desirable to ignore some graphics modes.
- // This could be because the specific implementation of PL111 has certain limitations.
-
- // Set the maximum mode allowed
- return (PcdGet32(PcdPL111LcdMaxMode));
-}
-
-EFI_STATUS
-LcdPlatformSetMode (
- IN UINT32 ModeNumber
- )
-{
- EFI_STATUS Status;
- UINT32 LcdSite;
- UINT32 OscillatorId;
- SYS_CONFIG_FUNCTION Function;
- UINT32 SysId;
-
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- LcdSite = PL111_CLCD_SITE;
-
- switch(LcdSite) {
- case ARM_VE_MOTHERBOARD_SITE:
- Function = SYS_CFG_OSC;
- OscillatorId = PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID;
- break;
- case ARM_VE_DAUGHTERBOARD_1_SITE:
- Function = SYS_CFG_OSC_SITE1;
- OscillatorId = (UINT32)PcdGet32(PcdPL111LcdVideoModeOscId);
- break;
- default:
- return EFI_UNSUPPORTED;
- }
-
- // Set the video mode oscillator
- Status = ArmPlatformSysConfigSetDevice (Function, OscillatorId, mResolutions[ModeNumber].OscFreq);
- if (EFI_ERROR(Status)) {
- ASSERT_EFI_ERROR (Status);
- return Status;
- }
-
- // The FVP foundation model does not have an LCD.
- // On the FVP models the GIC variant in encoded in bits [15:12].
- // Note: The DVI Mode is not modelled by RTSM or FVP models.
- SysId = MmioRead32 (ARM_VE_SYS_ID_REG);
- if (SysId != ARM_RTSM_SYS_ID) {
- // Take out the FVP GIC variant to reduce the permutations.
- SysId &= ~ARM_FVP_SYS_ID_VARIANT_MASK;
- if (SysId != ARM_FVP_BASE_BOARD_SYS_ID) {
- // Set the DVI into the new mode
- Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, mResolutions[ModeNumber].Mode);
- if (EFI_ERROR(Status)) {
- ASSERT_EFI_ERROR (Status);
- return Status;
- }
- }
- }
-
- // Set the multiplexer
- Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, LcdSite);
- if (EFI_ERROR(Status)) {
- ASSERT_EFI_ERROR (Status);
- return Status;
- }
-
- return Status;
-}
-
-EFI_STATUS
-LcdPlatformQueryMode (
- IN UINT32 ModeNumber,
- OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
- )
-{
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- Info->Version = 0;
- Info->HorizontalResolution = mResolutions[ModeNumber].HorizontalResolution;
- Info->VerticalResolution = mResolutions[ModeNumber].VerticalResolution;
- Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution;
-
- switch (mResolutions[ModeNumber].Bpp) {
- case LCD_BITS_PER_PIXEL_24:
- Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
- Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
- Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
- Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
- Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
- break;
-
- case LCD_BITS_PER_PIXEL_16_555:
- case LCD_BITS_PER_PIXEL_16_565:
- case LCD_BITS_PER_PIXEL_12_444:
- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
- default:
- // These are not supported
- ASSERT(FALSE);
- break;
- }
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-LcdPlatformGetTimings (
- IN UINT32 ModeNumber,
- OUT UINT32* HRes,
- OUT UINT32* HSync,
- OUT UINT32* HBackPorch,
- OUT UINT32* HFrontPorch,
- OUT UINT32* VRes,
- OUT UINT32* VSync,
- OUT UINT32* VBackPorch,
- OUT UINT32* VFrontPorch
- )
-{
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- *HRes = mResolutions[ModeNumber].HorizontalResolution;
- *HSync = mResolutions[ModeNumber].HSync;
- *HBackPorch = mResolutions[ModeNumber].HBackPorch;
- *HFrontPorch = mResolutions[ModeNumber].HFrontPorch;
- *VRes = mResolutions[ModeNumber].VerticalResolution;
- *VSync = mResolutions[ModeNumber].VSync;
- *VBackPorch = mResolutions[ModeNumber].VBackPorch;
- *VFrontPorch = mResolutions[ModeNumber].VFrontPorch;
-
- return EFI_SUCCESS;
-}
-
-EFI_STATUS
-LcdPlatformGetBpp (
- IN UINT32 ModeNumber,
- OUT LCD_BPP * Bpp
- )
-{
- if (ModeNumber >= LcdPlatformGetMaxMode ()) {
- return EFI_INVALID_PARAMETER;
- }
-
- *Bpp = mResolutions[ModeNumber].Bpp;
-
- return EFI_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf deleted file mode 100644 index d1978e7110..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf +++ /dev/null @@ -1,43 +0,0 @@ -#/** @file
-#
-# Component description file for ArmVeGraphicsDxe module
-#
-# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = PL111LcdArmVExpressLib
- FILE_GUID = b7f06f20-496f-11e0-a8e8-0002a5d5c51b
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- LIBRARY_CLASS = LcdPlatformLib
-
-[Sources.common]
- PL111LcdArmVExpress.c
-
-[Packages]
- MdePkg/MdePkg.dec
- ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- BaseLib
- ArmPlatformSysConfigLib
-
-[Protocols]
- gEfiEdidDiscoveredProtocolGuid # Produced
- gEfiEdidActiveProtocolGuid # Produced
-
-[Pcd]
- gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
- gArmVExpressTokenSpaceGuid.PcdPL111LcdVideoModeOscId
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c deleted file mode 100644 index bafb6f8093..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c +++ /dev/null @@ -1,88 +0,0 @@ -/** @file
- Template library implementation to support ResetSystem Runtime call.
-
- Fill in the templates with what ever makes you system reset.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/EfiResetSystemLib.h>
-#include <Library/ArmPlatformSysConfigLib.h>
-
-#include <ArmPlatform.h>
-
-/**
- Resets the entire platform.
-
- @param ResetType The type of reset to perform.
- @param ResetStatus The status code for the reset.
- @param DataSize The size, in bytes, of WatchdogData.
- @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or
- EfiResetShutdown the data buffer starts with a Null-terminated
- Unicode string, optionally followed by additional binary data.
-
-**/
-EFI_STATUS
-EFIAPI
-LibResetSystem (
- IN EFI_RESET_TYPE ResetType,
- IN EFI_STATUS ResetStatus,
- IN UINTN DataSize,
- IN CHAR16 *ResetData OPTIONAL
- )
-{
- switch (ResetType) {
- case EfiResetPlatformSpecific:
- // Map the platform specific reset as reboot
- case EfiResetWarm:
- // Map a warm reset into a cold reset
- case EfiResetCold:
- // Send the REBOOT function to the platform microcontroller
- ArmPlatformSysConfigSet (SYS_CFG_REBOOT, 0);
-
- // We should never be here
- while(1);
- case EfiResetShutdown:
- // Send the SHUTDOWN function to the platform microcontroller
- ArmPlatformSysConfigSet (SYS_CFG_SHUTDOWN, 0);
-
- // We should never be here
- while(1);
- }
-
- ASSERT(FALSE);
- return EFI_UNSUPPORTED;
-}
-
-/**
- Initialize any infrastructure required for LibResetSystem () to function.
-
- @param ImageHandle The firmware allocated handle for the EFI image.
- @param SystemTable A pointer to the EFI System Table.
-
- @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-LibInitializeResetSystem (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- return EFI_SUCCESS;
-}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf deleted file mode 100644 index 8c17ea8cdb..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ /dev/null @@ -1,35 +0,0 @@ -#/** @file
-# Reset System lib to make it easy to port new platforms
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmVeResetSystemLib
- FILE_GUID = 36885202-0854-4373-bfd2-95d229b44d44
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = EfiResetSystemLib
-
-[Sources.common]
- ResetSystemLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- DebugLib
- BaseLib
- ArmPlatformSysConfigLib
|