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| author | Brendan Jackman <brendan.jackman@arm.com> | 2014-05-08 14:59:04 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-05-08 14:59:04 +0000 |
| commit | 73ca50096eea3edc64e2c635b6b6d99fbb5572d5 (patch) | |
| tree | c2005188cc6c82478ff1a1e0e3c101297e64d53e /ArmPlatformPkg/ArmVExpressPkg | |
| parent | 7eb1d8522a583b2a0a8eea5034be7b30ab14e0f8 (diff) | |
| download | edk2-platforms-73ca50096eea3edc64e2c635b6b6d99fbb5572d5.tar.xz | |
ARM Packages: Use AND instead of BIC instruction with immediate
AARCH64 does not have a BIC-with-immediate instruction. GAS assembles it as a
AND with the immediate inverted, but Clang's integrated assembler emits an
error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15509 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg')
| -rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S index 7d9c25c769..035e095493 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S @@ -12,6 +12,7 @@ //
#include <AsmMacroIoLibV8.h>
+#include <Chipset/AArch64.h>
#ifndef __clang__
// Register definitions used by GCC for GICv3 access.
@@ -64,6 +65,6 @@ ASM_PFX(InitializeGicV3): // Remove the SCR.NS bit
mrs x0, scr_el3
- bic x0, x0, #1
+ and x0, x0, #~SCR_NS
msr scr_el3, x0
ret
|