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| author | Dennis Chen <dennis.chen@arm.com> | 2016-09-05 19:38:20 +0800 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2016-09-08 09:16:01 +0100 |
| commit | 8a1f2378d74390ddfe35c70f68e0c8b03bf84089 (patch) | |
| tree | a14e94339ee014e9680f2629fd80c208eea08bfd /ArmPlatformPkg/ArmVExpressPkg | |
| parent | d796d33f1844deb492bc571c7f2e2b6780b92368 (diff) | |
| download | edk2-platforms-8a1f2378d74390ddfe35c70f68e0c8b03bf84089.tar.xz | |
ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-up
According to the ACPI 6.0/6.1 spec, the physical base address of GICC,
GICD, GICR and GIC ITS is 64-bit. So change the type of the various GIC
base address PCDs to 64-bit, and fix up all users.
Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg')
| -rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c index 9023715ab0..754a36d562 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c @@ -73,7 +73,7 @@ ArmPlatformSecInitialize ( MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
// Read the GIC Identification Register
- Identification = ArmGicGetInterfaceIdentification (PcdGet32 (PcdGicInterruptInterfaceBase));
+ Identification = ArmGicGetInterfaceIdentification (PcdGet64 (PcdGicInterruptInterfaceBase));
// Check if we are GICv3
if (ARM_GIC_ICCIIDR_GET_ARCH_VERSION(Identification) >= 0x3) {
|