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author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:05:20 +0000 |
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committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:05:20 +0000 |
commit | 2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7 (patch) | |
tree | fcc7592f5e22d5f0cc56be5339176545d885be52 /ArmPlatformPkg/ArmVExpressPkg | |
parent | f156d5b49d3f1c3dd1a9dc3c9b6d94b02c056ad1 (diff) | |
download | edk2-platforms-2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7.tar.xz |
ArmPlatformPkg: Changed memory model for the stacks
In the previous version, every cores had the same stack size.
To avoid to waste memory with secondary core stacks, the primary core stack
size is now different from the secondary cores stack size.
These are the Stack PCDs and their default values:
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg')
-rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc index d4be10b022..74c28af89b 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc @@ -385,20 +385,14 @@ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1 - gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores|4 gArmTokenSpaceGuid.PcdVFPEnabled|1 # Stacks for MPCores in Secure World - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x49E00000 # Top of SEC Stack for Secure World - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0x2000 # Stack for each of the 4 CPU cores - + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x49E00000 # Stacks for MPCores in Monitor Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x49D00000 # Top of SEC Stack for Monitor World - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x2000 # Stack for each of the 4 CPU cores - + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x49D00000 # Stacks for MPCores in Normal World - gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000 # Top of SEC Stack for Normal World - gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x00020000 # Stack for each of the 4 CPU cores + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x48000000 # System Memory (1GB) gArmTokenSpaceGuid.PcdSystemMemoryBase|0x60000000 |