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author | Laszlo Ersek <lersek@redhat.com> | 2015-02-23 16:03:16 +0000 |
---|---|---|
committer | lersek <lersek@Edk2> | 2015-02-23 16:03:16 +0000 |
commit | 1275aaf430e5770f4c39b646bb731efa69b5b664 (patch) | |
tree | 58afd0064b50893b91ccc78f2f93f92fef0bbc5d /ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe | |
parent | 120a25c2874081ef69024be4f3fdc9707146745c (diff) | |
download | edk2-platforms-1275aaf430e5770f4c39b646bb731efa69b5b664.tar.xz |
ArmVirtualizationPkg/PciHostBridgeDxe: translate addresses for IO
Unlike the one in PcAtChipsetPkg, our PciHostBridgeDxe module must handle
address space translation. IO addresses expressed in the respective
aperture are mapped to a different base in CPU address space.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16899 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe')
-rw-r--r-- | ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h | 1 | ||||
-rw-r--r-- | ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c | 20 |
2 files changed, 17 insertions, 4 deletions
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h index 6e9bd84c47..cbceca4bcf 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h +++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h @@ -457,6 +457,7 @@ typedef struct { UINT64 BusLimit;
UINT64 MemLimit;
UINT64 IoLimit;
+ UINT64 IoTranslation;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c index 7c35e85c63..85048b2f74 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c @@ -640,11 +640,13 @@ RootBridgeConstructor ( PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (Protocol);
//
- // The host to pci bridge, the host memory and io addresses are
- // direct mapped to pci addresses, so no need translate, set bases to 0.
+ // The host to PCI bridge. The host memory addresses are direct mapped to PCI
+ // addresses, so there's no need to translate them. IO addresses need
+ // translation however.
//
- PrivateData->MemBase = ResAperture->MemBase;
- PrivateData->IoBase = ResAperture->IoBase;
+ PrivateData->MemBase = ResAperture->MemBase;
+ PrivateData->IoBase = ResAperture->IoBase;
+ PrivateData->IoTranslation = ResAperture->IoTranslation;
//
// The host bridge only supports 32bit addressing for memory
@@ -978,6 +980,7 @@ RootBridgeIoIoRW ( )
{
EFI_STATUS Status;
+ PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
UINT8 InStride;
UINT8 OutStride;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH OperationWidth;
@@ -988,6 +991,15 @@ RootBridgeIoIoRW ( return Status;
}
+ PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
+ //
+ // The addition below is performed in UINT64 modular arithmetic, in
+ // accordance with the definition of PcdPciIoTranslation in
+ // "ArmPlatformPkg.dec". Meaning, the addition below may in fact *decrease*
+ // Address, implementing a negative offset translation.
+ //
+ Address += PrivateData->IoTranslation;
+
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);
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