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| author | Laszlo Ersek <lersek@redhat.com> | 2015-02-23 16:03:42 +0000 |
|---|---|---|
| committer | lersek <lersek@Edk2> | 2015-02-23 16:03:42 +0000 |
| commit | f9a8be423cdd5ae0a4bf489189aac500cfe79d57 (patch) | |
| tree | ca33a224a0cebf06c591883cb92dc3d7b0bb8663 /ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe | |
| parent | 807c26d306fc3d5f8bb3330f280a0f1f00ad964d (diff) | |
| download | edk2-platforms-f9a8be423cdd5ae0a4bf489189aac500cfe79d57.tar.xz | |
ArmVirtualizationPkg/PciHostBridgeDxe: MMIO aperture must not be uncached
Quite non-intuitively, we must allow guest-side writes to emulated PCI
MMIO regions to go through the CPU cache, otherwise QEMU, whose accesses
always go through the cache, may see stale data in the region.
This change makes no difference for QEMU/TCG, but it is important for
QEMU/KVM, at the moment.
Because gDS->SetMemorySpaceAttributes() is ultimately implemented by
EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() -- see
"MdeModulePkg/Core/Dxe/Gcd/Gcd.c" and "ArmPkg/Drivers/CpuDxe/" -- we add
the CPU architectural protocol to the module's DepEx.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16904 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe')
| -rw-r--r-- | ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c | 17 | ||||
| -rw-r--r-- | ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf | 7 |
2 files changed, 22 insertions, 2 deletions
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c index 452465afa8..17d4db85be 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c +++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c @@ -97,6 +97,7 @@ InitializePciHostBridge ( IN EFI_SYSTEM_TABLE *SystemTable
)
{
+ UINT64 MmioAttributes;
EFI_STATUS Status;
UINTN Loop1;
UINTN Loop2;
@@ -133,17 +134,31 @@ InitializePciHostBridge ( );
ASSERT_EFI_ERROR (Status);
+ MmioAttributes = FeaturePcdGet (PcdKludgeMapPciMmioAsCached) ?
+ EFI_MEMORY_WB : EFI_MEMORY_UC;
+
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
PcdGet32 (PcdPciMmio32Base),
PcdGet32 (PcdPciMmio32Size),
- EFI_MEMORY_UC
+ MmioAttributes
);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "%a: AddMemorySpace: %r\n", __FUNCTION__, Status));
return Status;
}
+ Status = gDS->SetMemorySpaceAttributes (
+ PcdGet32 (PcdPciMmio32Base),
+ PcdGet32 (PcdPciMmio32Size),
+ MmioAttributes
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "%a: SetMemorySpaceAttributes: %r\n", __FUNCTION__,
+ Status));
+ return Status;
+ }
+
//
// Create Host Bridge Device Handle
//
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf index 5497fa61d2..ecea088272 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf +++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf @@ -24,6 +24,7 @@ [Packages]
MdePkg/MdePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
+ ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
@@ -60,5 +61,9 @@ gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+[FeaturePcd]
+ gArmVirtualizationTokenSpaceGuid.PcdKludgeMapPciMmioAsCached
+
[depex]
- gEfiMetronomeArchProtocolGuid
+ gEfiMetronomeArchProtocolGuid AND
+ gEfiCpuArchProtocolGuid
|