diff options
author | Evan Lloyd <evan.lloyd@arm.com> | 2016-09-21 21:33:13 +0100 |
---|---|---|
committer | Leif Lindholm <leif.lindholm@linaro.org> | 2016-10-11 14:23:33 +0100 |
commit | 719a347c5df53a1dca6f80e06a285424228436e1 (patch) | |
tree | c03ece96dbc86074e84252ee2854fe70a5773737 /ArmPlatformPkg/Drivers | |
parent | b3b58d4da79639ffb02e9a0556e21962bf918d1e (diff) | |
download | edk2-platforms-719a347c5df53a1dca6f80e06a285424228436e1.tar.xz |
ArmPlatformPkg: Fix PL011 FIFO size test
This change updates PL011UartInitializePort to compare ReceiveFifoDepth
with the correct hardware FIFO size instead of the constant 32 used
previously.
This corrects a minor bug where a request for a fifo size > 15 and < 32
would not have been honoured on a system with a 16 byte FIFO.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPlatformPkg/Drivers')
-rw-r--r-- | ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c index 3748972acb..b3ea138bf6 100644 --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c @@ -79,17 +79,18 @@ PL011UartInitializePort ( UINT32 Divisor;
UINT32 Integer;
UINT32 Fractional;
+ UINT32 HardwareFifoDepth;
+ HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \
+ > PL011_VER_R1P4) \
+ ? 32 : 16 ;
// The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
// 1 char buffer as the minimum FIFO size. Because everything can be rounded
// down, there is no maximum FIFO size.
- if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) {
+ if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= HardwareFifoDepth)) {
// Enable FIFO
LineControl = PL011_UARTLCR_H_FEN;
- if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4)
- *ReceiveFifoDepth = 32;
- else
- *ReceiveFifoDepth = 16;
+ *ReceiveFifoDepth = HardwareFifoDepth;
} else {
// Disable FIFO
LineControl = 0;
|