ArmPkg: Move ARM Platform drivers from ArmPkg/Drivers/ to ArmPlatformPkg/Drivers/

The idea is to keep ArmPkg responsible for the ARM architectural modules and ArmPlatformPkg
the ARM development platform packages (with their respective drivers).


ArmPlatformPkg: Reduce driver dependency on ArmPlatform.h

- Move some driver definitions from C-Macro to PCD values
- Unify PCD driver namespace




git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11956 6f19259b-4bc3-4df7-8a09-765794883524

10 files changed, 95 insertions, 113 deletions

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
index 679ccc8256..b341c5e7b9 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
@@ -22,7 +22,6 @@
 
 #include <Guid/GlobalVariable.h>
 
-#include <ArmPlatform.h>
 #include "LcdGraphicsOutputDxe.h"
 
 extern BOOLEAN mDisplayInitialized;
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
index a4ab6a68f5..8c9165e730 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
@@ -13,7 +13,6 @@
 
 #include <PiDxe.h>
 #include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/DevicePathLib.h>
 #include <Library/UefiBootServicesTableLib.h>
@@ -22,7 +21,6 @@
 
 #include <Guid/GlobalVariable.h>
 
-#include <ArmPlatform.h>
 #include "LcdGraphicsOutputDxe.h"
 
 /**********************************************************************
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
index ae571d8d83..668c24472f 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
@@ -45,16 +45,12 @@
   BaseMemoryLib
   LcdPlatformLib
 
-[Guids]
-
 [Protocols]
   gEfiDevicePathProtocolGuid
   gEfiGraphicsOutputProtocolGuid
 
-[FixedPcd.common]
- 
-[Pcd.common]
-
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdPL111LcdBase
 
 [Depex]
   gEfiCpuArchProtocolGuid
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h
index 60cdbd5a43..5abf8fccf6 100644
--- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h
+++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h
@@ -26,8 +26,6 @@
 #include <Library/NorFlashPlatformLib.h>
 #include <Library/UefiLib.h>
 
-#include <ArmPlatform.h>
-
 #define HIGH_16_BITS                              0xFFFF0000
 #define LOW_16_BITS                               0x0000FFFF
 #define LOW_8_BITS                                0x000000FF
diff --git a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
index 0e263c03a7..cb811d89d6 100644
--- a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
+++ b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
@@ -13,23 +13,20 @@
 **/
 
 
-#include <Base.h>
 #include <PiDxe.h>
 
 #include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
 #include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
 #include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
 #include <Library/UefiLib.h>
-#include <Library/IoLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
 
 #include <Protocol/EmbeddedGpio.h>
-#include <ArmPlatform.h>
 #include <Drivers/PL061Gpio.h>
 
-#define LOW_4_BITS                              0x0000000F
-
 BOOLEAN     mPL061Initialized = FALSE;
 
 /**
@@ -42,18 +39,18 @@ PL061Identify (
   )
 {
   // Check if this is a PrimeCell Peripheral
-  if(    ( MmioRead8( PL061_GPIO_PCELL_ID0 ) != 0x0D )
-      || ( MmioRead8( PL061_GPIO_PCELL_ID1 ) != 0xF0 )
-      || ( MmioRead8( PL061_GPIO_PCELL_ID2 ) != 0x05 )
-      || ( MmioRead8( PL061_GPIO_PCELL_ID3 ) != 0xB1 ) ) {
+  if (    (MmioRead8 (PL061_GPIO_PCELL_ID0) != 0x0D)
+      ||  (MmioRead8 (PL061_GPIO_PCELL_ID1) != 0xF0)
+      ||  (MmioRead8 (PL061_GPIO_PCELL_ID2) != 0x05)
+      ||  (MmioRead8 (PL061_GPIO_PCELL_ID3) != 0xB1)) {
     return EFI_NOT_FOUND;
   }
 
   // Check if this PrimeCell Peripheral is the PL061 GPIO
-  if(    ( MmioRead8( PL061_GPIO_PERIPH_ID0 ) != 0x61 )
-      || ( MmioRead8( PL061_GPIO_PERIPH_ID1 ) != 0x10 )
-      || ( ( MmioRead8( PL061_GPIO_PERIPH_ID2 ) & LOW_4_BITS ) != 0x04 )
-      || ( MmioRead8( PL061_GPIO_PERIPH_ID3 ) != 0x00 ) ) {
+  if (    (MmioRead8 (PL061_GPIO_PERIPH_ID0) != 0x61)
+      ||  (MmioRead8 (PL061_GPIO_PERIPH_ID1) != 0x10)
+      ||  ((MmioRead8 (PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04)
+      ||  (MmioRead8 (PL061_GPIO_PERIPH_ID3) != 0x00)) {
     return EFI_NOT_FOUND;
   }
 
@@ -62,14 +59,14 @@ PL061Identify (
 
 EFI_STATUS
 PL061Initialize (
-VOID
+  VOID
   )
 {
   EFI_STATUS  Status;
 
   // Check if the PL061 GPIO module exists on board
   Status = PL061Identify();
-  if (EFI_ERROR( Status )) {
+  if (EFI_ERROR (Status)) {
     Status = EFI_DEVICE_ERROR;
     goto EXIT;
   }
@@ -77,7 +74,7 @@ VOID
   // Do other hardware initialisation things here as required
 
   // Disable Interrupts
-  //if( MmioRead8( PL061_GPIO_IE_REG ) != 0 ) {
+  //if (MmioRead8 (PL061_GPIO_IE_REG) != 0) {
   //   // Ensure interrupts are disabled
   //}
 
@@ -114,21 +111,21 @@ Get (
 {
   EFI_STATUS    Status = EFI_SUCCESS;
 
-  if(    ( Value == NULL )
-      || ( Gpio > LAST_GPIO_PIN ) )
+  if (    (Value == NULL)
+      ||  (Gpio > LAST_GPIO_PIN))
   {
     return EFI_INVALID_PARAMETER;
   }
 
   // Initialize the hardware if not already done
-  if( !mPL061Initialized ) {
+  if (!mPL061Initialized) {
     Status = PL061Initialize();
-    if( EFI_ERROR(Status) ) {
+    if (EFI_ERROR(Status)) {
       goto EXIT;
     }
   }
 
-  if( MmioRead8( PL061_GPIO_DATA_REG ) & GPIO_PIN_MASK_HIGH_8BIT(Gpio) ) {
+  if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
     *Value = 1;
   } else {
     *Value = 0;
@@ -167,15 +164,15 @@ Set (
   EFI_STATUS    Status = EFI_SUCCESS;
 
   // Check for errors
-  if( Gpio > LAST_GPIO_PIN ) {
+  if (Gpio > LAST_GPIO_PIN) {
     Status = EFI_INVALID_PARAMETER;
     goto EXIT;
   }
 
   // Initialize the hardware if not already done
-  if( !mPL061Initialized ) {
+  if (!mPL061Initialized) {
     Status = PL061Initialize();
-    if( EFI_ERROR(Status) ) {
+    if (EFI_ERROR(Status)) {
       goto EXIT;
     }
   }
@@ -184,21 +181,21 @@ Set (
   {
     case GPIO_MODE_INPUT:
       // Set the corresponding direction bit to LOW for input
-      MmioAnd8( PL061_GPIO_DIR_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio) );
+      MmioAnd8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio));
       break;
 
     case GPIO_MODE_OUTPUT_0:
       // Set the corresponding data bit to LOW for 0
-      MmioAnd8( PL061_GPIO_DATA_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio) );
+      MmioAnd8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio));
       // Set the corresponding direction bit to HIGH for output
-      MmioOr8( PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio) );
+      MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
       break;
 
     case GPIO_MODE_OUTPUT_1:
       // Set the corresponding data bit to HIGH for 1
-      MmioOr8( PL061_GPIO_DATA_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio) );
+      MmioOr8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
       // Set the corresponding direction bit to HIGH for output
-      MmioOr8( PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio) );
+      MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
       break;
 
     default:
@@ -239,23 +236,23 @@ GetMode (
   EFI_STATUS Status;
 
   // Check for errors
-  if(    ( Mode == NULL )
-      || ( Gpio > LAST_GPIO_PIN ) ) {
+  if (    (Mode == NULL)
+      ||  (Gpio > LAST_GPIO_PIN)) {
     return EFI_INVALID_PARAMETER;
   }
 
   // Initialize the hardware if not already done
-  if( !mPL061Initialized ) {
+  if (!mPL061Initialized) {
     Status = PL061Initialize();
-    if( EFI_ERROR(Status) ) {
+    if (EFI_ERROR(Status)) {
       return Status;
     }
   }
 
   // Check if it is input or output
-  if( MmioRead8( PL061_GPIO_DIR_REG ) & GPIO_PIN_MASK_HIGH_8BIT(Gpio) ) {
+  if (MmioRead8 (PL061_GPIO_DIR_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
     // Pin set to output
-    if( MmioRead8( PL061_GPIO_DATA_REG ) & GPIO_PIN_MASK_HIGH_8BIT(Gpio) ) {
+    if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
       *Mode = GPIO_MODE_OUTPUT_1;
     } else {
       *Mode = GPIO_MODE_OUTPUT_0;
@@ -338,7 +335,7 @@ PL061InstallProtocol (
                   &Handle,
                   &gEmbeddedGpioProtocolGuid, &gGpio,
                   NULL
-                  );
+                 );
   if (EFI_ERROR(Status)) {
     Status = EFI_OUT_OF_RESOURCES;
   }
diff --git a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
index 53eebdaec9..b5adda3a89 100644
--- a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
+++ b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
@@ -31,19 +31,20 @@
 
 [LibraryClasses]
   BaseLib
-  UefiRuntimeServicesTableLib
-  UefiLib
-  UefiBootServicesTableLib
   BaseMemoryLib
   DebugLib
-  UefiDriverEntryPoint
   IoLib
+  PcdLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  UefiLib
+  UefiRuntimeServicesTableLib
 
-[Guids]
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PcdPL061GpioBase
 
 [Protocols]
   gEmbeddedGpioProtocolGuid  
 
-
 [Depex]
-TRUE
+  TRUE
diff --git a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c
index e74b7e1382..159e9256a1 100644
--- a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c
+++ b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c
@@ -28,7 +28,10 @@
 #include <Protocol/HardwareInterrupt.h>
 
 #include <Drivers/SP804Timer.h>
-#include <ArmPlatform.h>
+
+#define SP804_TIMER_PERIODIC_BASE     (UINTN)PcdGet32 (PcdSP804TimerPeriodicBase)
+#define SP804_TIMER_METRONOME_BASE    (UINTN)PcdGet32 (PcdSP804TimerMetronomeBase)
+#define SP804_TIMER_PERFORMANCE_BASE  (UINTN)PcdGet32 (PcdSP804TimerPerformanceBase)
 
 // The notification function to call on every timer interrupt.
 volatile EFI_TIMER_NOTIFY      mTimerNotifyFunction   = (EFI_TIMER_NOTIFY)NULL;
@@ -43,7 +46,6 @@ EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
 // Cached interrupt vector
 UINTN  gVector;
 
-UINT32 mLastTickCount;
 
 /**
 
@@ -75,9 +77,9 @@ TimerInterruptHandler (
   OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
 
   // If the interrupt is shared then we must check if this interrupt source is the one associated to this Timer
-  if (MmioRead32 (SP804_TIMER0_BASE + SP804_TIMER_MSK_INT_STS_REG) != 0) {
+  if (MmioRead32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_MSK_INT_STS_REG) != 0) {
     // clear the periodic interrupt
-    MmioWrite32 (SP804_TIMER0_BASE + SP804_TIMER_INT_CLR_REG, 0);
+    MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_INT_CLR_REG, 0);
 
     // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers
     gInterrupt->EndOfInterrupt (gInterrupt, Source);
@@ -139,7 +141,7 @@ TimerDriverRegisterHandler (
 }
 
 /**
-    Make sure all ArrmVe Timers are disabled
+    Make sure all Dual Timers are disabled
 **/
 VOID
 EFIAPI
@@ -148,25 +150,20 @@ ExitBootServicesEvent (
   IN VOID       *Context
   )
 {
-    // Disable timer 0 if enabled
-    if (MmioRead32(SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-        MmioAnd32 (SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, 0);
-    }
-
-    // Disable timer 1 if enabled
-    if (MmioRead32(SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-        MmioAnd32 (SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, 0);
-    }
+  // Disable 'Periodic Operation' timer if enabled
+  if (MmioRead32(SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, 0);
+  }
 
-    // Disable timer 2 if enabled
-    if (MmioRead32(SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-        MmioAnd32 (SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, 0);
-    }
+  // Disable 'Metronome/Delay' timer if enabled
+  if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    MmioAnd32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, 0);
+  }
 
-    // Disable timer 3 if enabled
-    if (MmioRead32(SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-        MmioAnd32 (SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG, 0);
-    }
+  // Disable 'Performance' timer if enabled
+  if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    MmioAnd32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, 0);
+  }
 }
 
 /**
@@ -208,7 +205,7 @@ TimerDriverSetTimerPeriod (
   UINT64      TimerTicks;
   
   // always disable the timer
-  MmioAnd32 (SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE);
+  MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE);
 
   if (TimerPeriod == 0) {
     // Leave timer disabled from above, and...
@@ -218,7 +215,7 @@ TimerDriverSetTimerPeriod (
   } else {  
     // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10)
     TimerTicks = DivU64x32 (TimerPeriod, 10);
-    TimerTicks = MultU64x32 (TimerTicks, PcdGet32(PcdSP804FrequencyInMHz));
+    TimerTicks = MultU64x32 (TimerTicks, PcdGet32(PcdSP804TimerFrequencyInMHz));
 
     // if it's larger than 32-bits, pin to highest value
     if (TimerTicks > 0xffffffff) {
@@ -228,10 +225,10 @@ TimerDriverSetTimerPeriod (
     }
 
     // Program the SP804 timer with the new count value
-    MmioWrite32 (SP804_TIMER0_BASE + SP804_TIMER_LOAD_REG, TimerTicks);
+    MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_LOAD_REG, TimerTicks);
 
     // enable the timer
-    MmioOr32 (SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+    MmioOr32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
 
     // enable timer 0/1 interrupts
     Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector);    
@@ -365,26 +362,17 @@ TimerInitialize (
   Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);
   ASSERT_EFI_ERROR (Status);
 
-  // Configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled
-  MmioWrite32 (SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
-
-  // Enable the free running timer
-  MmioOr32 (SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-
-  // Record free running tick value (should be close to 0xffffffff)
-  mLastTickCount = MmioRead32 (SP804_TIMER1_BASE + SP804_TIMER_CURRENT_REG);
-
   // Disable the timer
   Status = TimerDriverSetTimerPeriod (&gTimer, 0);
   ASSERT_EFI_ERROR (Status);
 
   // Install interrupt handler
-  gVector = PcdGet32(PcdSP804Timer0InterruptNum);
+  gVector = PcdGet32(PcdSP804TimerPeriodicInterruptNum);
   Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler);
   ASSERT_EFI_ERROR (Status);
 
   // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled
-  MmioWrite32 (SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE);
+  MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE);
 
   // Set up default timer
   Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
diff --git a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
index 017277ad71..f314fb1a0b 100644
--- a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
+++ b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
@@ -48,8 +48,11 @@
   gHardwareInterruptProtocolGuid
 
 [Pcd.common]
-  gArmPlatformTokenSpaceGuid.PcdSP804FrequencyInMHz
-  gArmPlatformTokenSpaceGuid.PcdSP804Timer0InterruptNum
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase
   gEmbeddedTokenSpaceGuid.PcdTimerPeriod
 
 [Depex]
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
index 0eb459303f..840f8ede1f 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
@@ -16,15 +16,15 @@
 #include <PiDxe.h>
 
 #include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
 #include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
 #include <Library/UefiBootServicesTableLib.h>
 #include <Library/UefiRuntimeServicesTableLib.h>
 #include <Library/UefiLib.h>
-#include <Library/IoLib.h>
 
 #include <Protocol/WatchdogTimer.h>
-#include <ArmPlatform.h>
 #include <Drivers/SP805Watchdog.h>
 
 /**
@@ -75,18 +75,18 @@ SP805Identify (
   )
 {
   // Check if this is a PrimeCell Peripheral
-  if(    ( MmioRead8( SP805_WDOG_PCELL_ID0 ) != 0x0D )
-      || ( MmioRead8( SP805_WDOG_PCELL_ID1 ) != 0xF0 )
-      || ( MmioRead8( SP805_WDOG_PCELL_ID2 ) != 0x05 )
-      || ( MmioRead8( SP805_WDOG_PCELL_ID3 ) != 0xB1 ) ) {
+  if (    (MmioRead8 (SP805_WDOG_PCELL_ID0) != 0x0D)
+      ||  (MmioRead8 (SP805_WDOG_PCELL_ID1) != 0xF0)
+      ||  (MmioRead8 (SP805_WDOG_PCELL_ID2) != 0x05)
+      ||  (MmioRead8 (SP805_WDOG_PCELL_ID3) != 0xB1)) {
     return EFI_NOT_FOUND;
   }
 
   // Check if this PrimeCell Peripheral is the SP805 Watchdog Timer
-  if(    ( MmioRead8( SP805_WDOG_PERIPH_ID0 ) != 0x05 )
-      || ( MmioRead8( SP805_WDOG_PERIPH_ID1 ) != 0x18 )
-      || (( MmioRead8( SP805_WDOG_PERIPH_ID2 ) & 0x0000000F) != 0x04 )
-      || ( MmioRead8( SP805_WDOG_PERIPH_ID3 ) != 0x00 ) ) {
+  if (    (MmioRead8 (SP805_WDOG_PERIPH_ID0) != 0x05)
+      ||  (MmioRead8 (SP805_WDOG_PERIPH_ID1) != 0x18)
+      || ((MmioRead8 (SP805_WDOG_PERIPH_ID2) & 0x0000000F) != 0x04)
+      ||  (MmioRead8 (SP805_WDOG_PERIPH_ID3) != 0x00)) {
     return EFI_NOT_FOUND;
   }
 
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
index b77320120c..7cacf69f4f 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
@@ -32,19 +32,21 @@
 
 [LibraryClasses]
   BaseLib
-  UefiRuntimeServicesTableLib
-  UefiLib
-  UefiBootServicesTableLib
   BaseMemoryLib
   DebugLib
-  UefiDriverEntryPoint
   IoLib
+  PcdLib
+  UefiLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  UefiRuntimeServicesTableLib
 
-[Guids]
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
+  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz
 
 [Protocols]
   gEfiWatchdogTimerArchProtocolGuid  
 
-
 [Depex]
-TRUE
+  TRUE