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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-02-28 17:11:42 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-02-28 17:11:42 +0000
commit0db25ccc6cf1d05dc6b8fd9b07d033b40c387c88 (patch)
tree7de1e25749da6fb96d06c7a32a919c2b37e6a830 /ArmPlatformPkg/Include/Drivers
parent986223907fa5e3a2866bbf60bd4a3bd5e2d24172 (diff)
downloadedk2-platforms-0db25ccc6cf1d05dc6b8fd9b07d033b40c387c88.tar.xz
ArmPlatformPkg: Minor code changes (comments, misspellings, coding stylei, line endings)
- Fixed misspellings - Updated Copyright - Remove unused sections in INF file - Fixed incorrect commentsi - Fixed coding style - Fixed line endings (CRLR) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13052 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Include/Drivers')
-rw-r--r--ArmPlatformPkg/Include/Drivers/PL061Gpio.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/ArmPlatformPkg/Include/Drivers/PL061Gpio.h b/ArmPlatformPkg/Include/Drivers/PL061Gpio.h
index 739caaf2a1..38458f4844 100644
--- a/ArmPlatformPkg/Include/Drivers/PL061Gpio.h
+++ b/ArmPlatformPkg/Include/Drivers/PL061Gpio.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -18,7 +18,7 @@
#include <Protocol/EmbeddedGpio.h>
-// SP805 Watchdog Registers
+// PL061 GPIO Registers
#define PL061_GPIO_DATA_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x000)
#define PL061_GPIO_DIR_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x400)
#define PL061_GPIO_IS_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x404)
@@ -44,7 +44,7 @@
// GPIO pins are numbered 0..7
#define LAST_GPIO_PIN 7
-// All bits low except one bit high, native bit lenght
+// All bits low except one bit high, native bit length
#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))
// All bits low except one bit high, restricted to 8 bits (i.e. ensures zeros above 8bits)
#define GPIO_PIN_MASK_HIGH_8BIT(Pin) (GPIO_PIN_MASK(Pin) && 0xFF)