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authorOlivier Martin <olivier.martin@arm.com>2014-07-04 11:13:27 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2014-07-04 11:13:27 +0000
commit2ca815a4952ca3ef3bdb01f5dd2a1ee0a57ac319 (patch)
treed89c29f40fbc07ae1b88ecc6d99936745303eb96 /ArmPlatformPkg/Library
parentd80401a16f250486baab14f02b044cf2cc1ac949 (diff)
downloadedk2-platforms-2ca815a4952ca3ef3bdb01f5dd2a1ee0a57ac319.tar.xz
ArmPkg/ArmGic: Move out the EndOfInterrupt from the interrupt acknowledgement
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15619 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Library')
-rwxr-xr-xArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
index f8f91e8fcd..f42f518722 100755
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
@@ -31,6 +31,7 @@ NonSecureWaitForFirmware (
)
{
VOID (*secondary_start)(VOID);
+ UINTN Interrupt;
// The secondary cores will execute the firmware once wake from WFI.
secondary_start = (VOID (*)())PcdGet32(PcdFvBaseAddress);
@@ -38,7 +39,12 @@ NonSecureWaitForFirmware (
ArmCallWFI();
// Acknowledge the interrupt and send End of Interrupt signal.
- ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);
+ Interrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase));
+ // Check if it is a valid interrupt ID
+ if ((Interrupt & ARM_GIC_ICCIAR_ACKINTID) < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {
+ // Got a valid SGI number hence signal End of Interrupt
+ ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), Interrupt);
+ }
// Jump to secondary core entry point.
secondary_start ();