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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-06 16:27:21 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-06 16:27:21 +0000
commitd269095b712ba45fd4aca55331b5e6f3045ce1ad (patch)
tree45ee937196347b33f6eeddf11cd3fa29c431a1f0 /ArmPlatformPkg/PrePi
parenta6caee65ac3bba2ac649f20bf1c63f0a87050f17 (diff)
downloadedk2-platforms-d269095b712ba45fd4aca55331b5e6f3045ce1ad.tar.xz
ArmPlatformPkg: Change the memory model for the ARM Platform components
In the former memory model, the UEFI firmware was expected to be located at the top of the system memory. Stacks & Pi memory regions were set below the firmware. On some platform, the UEFI firmware could be shadowed by the ROM firmware (case of the BeagleBoard) and in some cases the firmware is copied at the beginning of the system memory. With this new memory model, stack and Pi/DXE memory regions are set at the top of the system memory wherever the UEFI firmware is located in the memory map. Because DXE core does not support shadowed firmwares, the system memory covered by the UEFI firmware is marked as 'Non Present' to avoid to be overlapped by DXE allocations. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11992 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/PrePi')
-rwxr-xr-xArmPlatformPkg/PrePi/Exception.S202
-rw-r--r--ArmPlatformPkg/PrePi/MainMPCore.c7
-rw-r--r--ArmPlatformPkg/PrePi/MainUniCore.c3
-rwxr-xr-xArmPlatformPkg/PrePi/ModuleEntryPoint.S68
-rw-r--r--ArmPlatformPkg/PrePi/ModuleEntryPoint.asm59
-rwxr-xr-xArmPlatformPkg/PrePi/PeiMPCore.inf2
-rwxr-xr-xArmPlatformPkg/PrePi/PeiUniCore.inf186
-rwxr-xr-xArmPlatformPkg/PrePi/PrePi.c52
-rw-r--r--ArmPlatformPkg/PrePi/PrePi.h7
9 files changed, 311 insertions, 275 deletions
diff --git a/ArmPlatformPkg/PrePi/Exception.S b/ArmPlatformPkg/PrePi/Exception.S
index b07f0e8d00..bd59682237 100755
--- a/ArmPlatformPkg/PrePi/Exception.S
+++ b/ArmPlatformPkg/PrePi/Exception.S
@@ -1,101 +1,101 @@
-//
-// Copyright (c) 2011, ARM Limited. All rights reserved.
-//
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <AutoGen.h>
-
-#start of the code section
-.text
-.align 5
-
-# IMPORT
-GCC_ASM_IMPORT(PrePiCommonExceptionEntry)
-
-# EXPORT
-GCC_ASM_EXPORT(PrePiVectorTable)
-
-//============================================================
-//Default Exception Handlers
-//============================================================
-
-ASM_PFX(PrePiVectorTable):
- b _DefaultResetHandler
- b _DefaultUndefined
- b _DefaultSWI
- b _DefaultPrefetchAbort
- b _DefaultDataAbort
- b _DefaultReserved
- b _DefaultIrq
- b _DefaultFiq
-
-//
-// Default Exception handlers: There is no plan to return from any of these exceptions.
-// No context saving at all.
-//
-_DefaultResetHandler:
- mov r1, lr
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #0
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultUndefined:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #1
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultSWI:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #2
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultPrefetchAbort:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #3
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultDataAbort:
- sub r1, LR, #8
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #4
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultReserved:
- mov r1, lr
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #5
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultIrq:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #6
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultFiq:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #7
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
+//
+// Copyright (c) 2011, ARM Limited. All rights reserved.
+//
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <AutoGen.h>
+
+#start of the code section
+.text
+.align 5
+
+# IMPORT
+GCC_ASM_IMPORT(PrePiCommonExceptionEntry)
+
+# EXPORT
+GCC_ASM_EXPORT(PrePiVectorTable)
+
+//============================================================
+//Default Exception Handlers
+//============================================================
+
+ASM_PFX(PrePiVectorTable):
+ b _DefaultResetHandler
+ b _DefaultUndefined
+ b _DefaultSWI
+ b _DefaultPrefetchAbort
+ b _DefaultDataAbort
+ b _DefaultReserved
+ b _DefaultIrq
+ b _DefaultFiq
+
+//
+// Default Exception handlers: There is no plan to return from any of these exceptions.
+// No context saving at all.
+//
+_DefaultResetHandler:
+ mov r1, lr
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #0
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
+_DefaultUndefined:
+ sub r1, LR, #4
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #1
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
+_DefaultSWI:
+ sub r1, LR, #4
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #2
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
+_DefaultPrefetchAbort:
+ sub r1, LR, #4
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #3
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
+_DefaultDataAbort:
+ sub r1, LR, #8
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #4
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
+_DefaultReserved:
+ mov r1, lr
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #5
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
+_DefaultIrq:
+ sub r1, LR, #4
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #6
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
+_DefaultFiq:
+ sub r1, LR, #4
+ # Switch to SVC for common stack
+ cps #0x13
+ mov r0, #7
+ blx ASM_PFX(PrePiCommonExceptionEntry)
+
diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c
index 238b919e29..165e7cfcb0 100644
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -21,20 +21,19 @@
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
- IN UINTN StackBase,
IN UINT64 StartTimeStamp
)
{
//Enable the GIC Distributor
PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));
- // If ArmVe has not been built as Standalone then we need to wake up the secondary cores
- if (!FixedPcdGet32(PcdStandalone)) {
+ // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization
+ if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {
// Sending SGI to all the Secondary CPU interfaces
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
}
- PrePiMain (UefiMemoryBase, StackBase, StartTimeStamp);
+ PrePiMain (UefiMemoryBase, StartTimeStamp);
// We must never return
ASSERT(FALSE);
diff --git a/ArmPlatformPkg/PrePi/MainUniCore.c b/ArmPlatformPkg/PrePi/MainUniCore.c
index f8ce408f6d..c92d9a55b3 100644
--- a/ArmPlatformPkg/PrePi/MainUniCore.c
+++ b/ArmPlatformPkg/PrePi/MainUniCore.c
@@ -17,11 +17,10 @@
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
- IN UINTN StackBase,
IN UINT64 StartTimeStamp
)
{
- PrePiMain (UefiMemoryBase, StackBase, StartTimeStamp);
+ PrePiMain (UefiMemoryBase, StartTimeStamp);
// We must never return
ASSERT(FALSE);
diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
index 0857024a27..a8c779fba9 100755
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
@@ -16,50 +16,70 @@
#include <Library/PcdLib.h>
#include <AutoGen.h>
-#start of the code section
.text
.align 3
-#global symbols referenced by this module
+# Global symbols referenced by this module
GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_EXPORT(_ModuleEntryPoint)
StartupAddr: .word CEntryPoint
-#make _ModuleEntryPoint as global
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-
ASM_PFX(_ModuleEntryPoint):
// Identify CPU ID
mrc p15, 0, r0, c0, c0, 5
and r0, #0xf
-_UefiMemoryBase:
-#if FixedPcdGet32(PcdStandalone)
+_SetSVCMode:
+ // Enter SVC mode
+ mov r1, #0x13|0x80|0x40
+ msr CPSR_c, r1
+
+// Check if we can install the size at the top of the System Memory or if we need
+// to install the stacks at the bottom of the Firmware Device (case the FD is located
+// at the top of the DRAM)
+_SetupStackPosition:
// Compute Top of System Memory
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize
-#else
- // If it is not a Standalone, we must compute the top of the UEFI memory with the base of the FD
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r1)
-#endif
- // Compute Base of UEFI Memory
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r2)
- sub r1, r1, r2 // r1 = SystemMemoryTop - PcdSystemMemoryUefiRegionSize = UefiMemoryBase
+ // Calculate Top of the Firmware Device
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)
+ add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize
+
+ // UEFI Memory Size (stacks are allocated in this region)
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
+
+ //
+ // Reserve the memory for the UEFI region (contain stacks on its top)
+ //
+
+ // Calculate how much space there is between the top of the Firmware and the Top of the System Memory
+ subs r5, r1, r3 // r5 = SystemMemoryTop - FdTop
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop)
+ cmp r5, r4
+ bge _SetupStack
+
+ // Case the top of stacks is the FdBaseAddress
+ mov r1, r2
_SetupStack:
// Compute Base of Normal stacks for CPU Cores
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
- mul r3, r0, r2 // r3 = core_id * stack_size = offset from the stack base
- sub sp, r1, r3 // r3 = UefiMemoryBase - StackOffset = TopOfStack
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r5)
+ mul r3, r0, r5 // r3 = core_id * stack_size = offset from the stack base
+ sub sp, r1, r3 // r3 = (SystemMemoryTop|FdBaseAddress) - StackOffset = TopOfStack
+
+ // Calculate the Base of the UEFI Memory
+ sub r1, r1, r4
- // Only allocate memory in top of the primary core stack
+ // Only allocate memory for global variables at top of the primary core stack
cmp r0, #0
bne _PrepareArguments
-_AllocateGlobalPeiVariables:
+_AllocateGlobalPrePiVariables:
// Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r4)
// The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack
@@ -69,16 +89,12 @@ _AllocateGlobalPeiVariables:
sub sp, sp, r4
_PrepareArguments:
- // Pass the StackBase to the C Entrypoint (UefiMemoryBase - StackSize - StackOffset)
- sub r2, r1, r2
- sub r2, r3
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr r3, StartupAddr
+ ldr r2, StartupAddr
- // jump to PrePiCore C code
+ // Jump to PrePiCore C code
// r0 = core_id
// r1 = UefiMemoryBase
- // r2 = StackBase
- blx r3
+ blx r2
diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
index 52690f8ecd..00abcb304a 100644
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
@@ -31,28 +31,51 @@ _ModuleEntryPoint
mrc p15, 0, r0, c0, c0, 5
and r0, #0xf
-_UefiMemoryBase
-#if FixedPcdGet32(PcdStandalone)
+_SetSVCMode
+ // Enter SVC mode
+ mov r1, #0x13|0x80|0x40
+ msr CPSR_c, r1
+
+// Check if we can install the size at the top of the System Memory or if we need
+// to install the stacks at the bottom of the Firmware Device (case the FD is located
+// at the top of the DRAM)
+_SetupStackPosition
// Compute Top of System Memory
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize
-#else
- // If it is not a Standalone, we must compute the top of the UEFI memory with the base of the FD
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r1)
-#endif
- // Compute Base of UEFI Memory
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r2)
- sub r1, r1, r2 // r1 = SystemMemoryTop - PcdSystemMemoryUefiRegionSize = UefiMemoryBase
+ // Calculate Top of the Firmware Device
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)
+ add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize
+
+ // UEFI Memory Size (stacks are allocated in this region)
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
+
+ //
+ // Reserve the memory for the UEFI region (contain stacks on its top)
+ //
+
+ // Calculate how much space there is between the top of the Firmware and the Top of the System Memory
+ subs r5, r1, r3 // r5 = SystemMemoryTop - FdTop
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop)
+ cmp r5, r4
+ bge _SetupStack
+
+ // Case the top of stacks is the FdBaseAddress
+ mov r1, r2
_SetupStack
// Compute Base of Normal stacks for CPU Cores
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
- mul r3, r0, r2 // r3 = core_id * stack_size = offset from the stack base
- sub sp, r1, r3 // r3 = UefiMemoryBase - StackOffset = TopOfStack
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r5)
+ mul r3, r0, r5 // r3 = core_id * stack_size = offset from the stack base
+ sub sp, r1, r3 // r3 = (SystemMemoryTop|FdBaseAddress) - StackOffset = TopOfStack
+
+ // Calculate the Base of the UEFI Memory
+ sub r1, r1, r4
- // Only allocate memory in top of the primary core stack
+ // Only allocate memory for global variables at top of the primary core stack
cmp r0, #0
bne _PrepareArguments
@@ -66,17 +89,13 @@ _AllocateGlobalPrePiVariables
sub sp, sp, r4
_PrepareArguments
- // Pass the StackBase to the C Entrypoint (UefiMemoryBase - StackSize - StackOffset)
- sub r2, r1, r2
- sub r2, r3
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr r3, StartupAddr
+ ldr r2, StartupAddr
- // jump to PrePiCore C code
+ // Jump to PrePiCore C code
// r0 = core_id
// r1 = UefiMemoryBase
- // r2 = StackBase
- blx r3
+ blx r2
END
diff --git a/ArmPlatformPkg/PrePi/PeiMPCore.inf b/ArmPlatformPkg/PrePi/PeiMPCore.inf
index c7d18d4394..d441407ad3 100755
--- a/ArmPlatformPkg/PrePi/PeiMPCore.inf
+++ b/ArmPlatformPkg/PrePi/PeiMPCore.inf
@@ -81,9 +81,9 @@
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
+ gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
diff --git a/ArmPlatformPkg/PrePi/PeiUniCore.inf b/ArmPlatformPkg/PrePi/PeiUniCore.inf
index 3af265576e..2439452d61 100755
--- a/ArmPlatformPkg/PrePi/PeiUniCore.inf
+++ b/ArmPlatformPkg/PrePi/PeiUniCore.inf
@@ -1,93 +1,93 @@
-#/** @file
-#
-# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmPlatformPrePiUniCore
- FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
-
-[Sources.ARM]
- PrePi.c
- ModuleEntryPoint.S | GCC
- ModuleEntryPoint.asm | RVCT
- Exception.asm | RVCT
- Exception.S | GCC
- MainUniCore.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- DebugAgentLib
- ArmLib
- IoLib
- TimerLib
- SerialPortLib
- ExtractGuidedSectionLib
- LzmaDecompressLib
- PeCoffGetEntryPointLib
- DebugAgentLib
- PrePiLib
- ArmPlatformLib
- MemoryAllocationLib
- HobLib
- PrePiHobListPointerLib
- PlatformPeiLib
- MemoryInitPeiLib
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
- gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdVFPEnabled
-
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress
- gArmTokenSpaceGuid.PcdNormalFdSize
-
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress
- gArmTokenSpaceGuid.PcdNormalFvSize
-
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
-
- gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
- gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset
-
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
-
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
-
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
+#/** @file
+#
+# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmPlatformPrePiUniCore
+ FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+
+[Sources.ARM]
+ PrePi.c
+ ModuleEntryPoint.S | GCC
+ ModuleEntryPoint.asm | RVCT
+ Exception.asm | RVCT
+ Exception.S | GCC
+ MainUniCore.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ DebugAgentLib
+ ArmLib
+ IoLib
+ TimerLib
+ SerialPortLib
+ ExtractGuidedSectionLib
+ LzmaDecompressLib
+ PeCoffGetEntryPointLib
+ DebugAgentLib
+ PrePiLib
+ ArmPlatformLib
+ MemoryAllocationLib
+ HobLib
+ PrePiHobListPointerLib
+ PlatformPeiLib
+ MemoryInitPeiLib
+
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable
+ gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
+ gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdVFPEnabled
+
+ gArmTokenSpaceGuid.PcdNormalFdBaseAddress
+ gArmTokenSpaceGuid.PcdNormalFdSize
+
+ gArmTokenSpaceGuid.PcdNormalFvBaseAddress
+ gArmTokenSpaceGuid.PcdNormalFvSize
+
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
+
+ gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
+ gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset
+
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
+
+ gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
+
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
diff --git a/ArmPlatformPkg/PrePi/PrePi.c b/ArmPlatformPkg/PrePi/PrePi.c
index 98831ed184..5a88b47fe9 100755
--- a/ArmPlatformPkg/PrePi/PrePi.c
+++ b/ArmPlatformPkg/PrePi/PrePi.c
@@ -49,14 +49,16 @@ LzmaDecompressLibConstructor (
VOID
PrePiMain (
IN UINTN UefiMemoryBase,
- IN UINTN StackBase,
IN UINT64 StartTimeStamp
)
{
- EFI_HOB_HANDOFF_INFO_TABLE** PrePiHobBase;
+ EFI_HOB_HANDOFF_INFO_TABLE** PrePiHobBase;
EFI_STATUS Status;
CHAR8 Buffer[100];
UINTN CharCount;
+ UINTN UefiMemoryTop;
+ UINTN StacksSize;
+ UINTN StacksBase;
// Enable program flow prediction, if supported.
ArmEnableBranchPrediction ();
@@ -76,19 +78,24 @@ PrePiMain (
PrePiHobBase = (EFI_HOB_HANDOFF_INFO_TABLE**)(PcdGet32 (PcdCPUCoresNonSecStackBase) + (PcdGet32 (PcdCPUCoresNonSecStackSize) / 2) - PcdGet32 (PcdHobListPtrGlobalOffset));
- // We leave UINT32 at the top of UEFI memory for PcdPrePiHobBase
+ UefiMemoryTop = UefiMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);
+ StacksSize = PcdGet32 (PcdCPUCoresNonSecStackSize) * PcdGet32 (PcdMPCoreMaxCores);
+ StacksBase = UefiMemoryTop - StacksSize;
+
+ // Declare the PI/UEFI memory region
*PrePiHobBase = HobConstructor (
(VOID*)UefiMemoryBase,
FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
(VOID*)UefiMemoryBase,
- (VOID*)(UefiMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize) - sizeof(UINT32)));
+ (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks
+ );
// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
ASSERT_EFI_ERROR (Status);
- // Create the Stack HOB
- BuildStackHob (StackBase, FixedPcdGet32(PcdCPUCoresNonSecStackSize));
+ // Create the Stacks HOB (reserve the memory for all stacks)
+ BuildStackHob (StacksBase, StacksSize);
// Set the Boot Mode
SetBootMode (ArmPlatformGetBootMode ());
@@ -99,8 +106,8 @@ PrePiMain (
BuildMemoryTypeInformationHob ();
- //InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
- //SaveAndSetDebugTimerInterrupt (TRUE);
+ InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
+ SaveAndSetDebugTimerInterrupt (TRUE);
// Now, the HOB List has been initialized, we can register performance information
PERF_START (NULL, "PEI", NULL, StartTimeStamp);
@@ -129,41 +136,38 @@ PrePiMain (
VOID
CEntryPoint (
IN UINTN CoreId,
- IN UINTN UefiMemoryBase,
- IN UINTN StackBase
+ IN UINTN UefiMemoryBase
)
{
UINT64 StartTimeStamp;
- StartTimeStamp = 0;
-
- if ((CoreId == 0) && PerformanceMeasurementEnabled ()) {
+ if ((CoreId == ARM_PRIMARY_CORE) && PerformanceMeasurementEnabled ()) {
// Initialize the Timer Library to setup the Timer HW controller
TimerConstructor ();
// We cannot call yet the PerformanceLib because the HOB List has not been initialized
StartTimeStamp = GetPerformanceCounter ();
}
- //Clean Data cache
- ArmCleanInvalidateDataCache();
+ // Clean Data cache
+ ArmCleanInvalidateDataCache ();
- //Invalidate instruction cache
- ArmInvalidateInstructionCache();
+ // Invalidate instruction cache
+ ArmInvalidateInstructionCache ();
//TODO:Drain Write Buffer
// Enable Instruction & Data caches
- ArmEnableDataCache();
- ArmEnableInstructionCache();
+ ArmEnableDataCache ();
+ ArmEnableInstructionCache ();
// Write VBAR - The Vector table must be 32-byte aligned
- ASSERT(((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);
- ArmWriteVBar((UINT32)PrePiVectorTable);
+ ASSERT (((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);
+ ArmWriteVBar ((UINT32)PrePiVectorTable);
- //If not primary Jump to Secondary Main
- if(0 == CoreId) {
+ // If not primary Jump to Secondary Main
+ if (CoreId == ARM_PRIMARY_CORE) {
// Goto primary Main.
- PrimaryMain (UefiMemoryBase, StackBase, StartTimeStamp);
+ PrimaryMain (UefiMemoryBase, StartTimeStamp);
} else {
SecondaryMain (CoreId);
}
diff --git a/ArmPlatformPkg/PrePi/PrePi.h b/ArmPlatformPkg/PrePi/PrePi.h
index b1d39c669a..f62e263571 100644
--- a/ArmPlatformPkg/PrePi/PrePi.h
+++ b/ArmPlatformPkg/PrePi/PrePi.h
@@ -27,6 +27,7 @@
#include <Chipset/ArmV7.h>
+#define ARM_PRIMARY_CORE 0
#define SerialPrint(txt) SerialPortWrite (txt, AsciiStrLen(txt)+1);
// Vector Table for PrePi Phase
@@ -44,15 +45,14 @@ TimerConstructor (
VOID
PrePiMain (
IN UINTN UefiMemoryBase,
- IN UINTN StackBase,
IN UINT64 StartTimeStamp
);
EFI_STATUS
EFIAPI
MemoryPeim (
- IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,
- IN UINT64 UefiMemorySize
+ IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,
+ IN UINT64 UefiMemorySize
);
EFI_STATUS
@@ -64,7 +64,6 @@ PlatformPeim (
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
- IN UINTN StackBase,
IN UINT64 StartTimeStamp
);