ArmPlatformPkg: Remove unused Package

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>

5 files changed, 0 insertions, 436 deletions

diff --git a/ArmPlatformPkg/Sec/Arm/Arch.c b/ArmPlatformPkg/Sec/Arm/Arch.c
deleted file mode 100644
index 85df0816ef..0000000000
--- a/ArmPlatformPkg/Sec/Arm/Arch.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/** @file

-*

-*  Copyright (c) 2013, ARM Limited. All rights reserved.

-*

-*  This program and the accompanying materials

-*  are licensed and made available under the terms and conditions of the BSD License

-*  which accompanies this distribution.  The full text of the license may be found at

-*  http://opensource.org/licenses/bsd-license.php

-*

-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-*

-**/

-

-#include <Chipset/ArmV7.h>

-

-VOID

-EFIAPI

-ArmSecArchTrustzoneInit (

-  VOID

-  )

-{

-  // Write to CP15 Non-secure Access Control Register

-  ArmWriteNsacr (PcdGet32 (PcdArmNsacr));

-}

diff --git a/ArmPlatformPkg/Sec/Arm/Helper.S b/ArmPlatformPkg/Sec/Arm/Helper.S
deleted file mode 100644
index ac40102218..0000000000
--- a/ArmPlatformPkg/Sec/Arm/Helper.S
+++ /dev/null
@@ -1,84 +0,0 @@
-#========================================================================================

-#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.

-#

-#  This program and the accompanying materials

-#  are licensed and made available under the terms and conditions of the BSD License

-#  which accompanies this distribution.  The full text of the license may be found at

-#  http://opensource.org/licenses/bsd-license.php

-#

-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-#

-#=======================================================================================

-

-#start of the code section

-.text

-.align 3

-

-GCC_ASM_EXPORT(return_from_exception)

-GCC_ASM_EXPORT(enter_monitor_mode)

-GCC_ASM_EXPORT(copy_cpsr_into_spsr)

-GCC_ASM_EXPORT(set_non_secure_mode)

-

-# r0: Monitor World EntryPoint

-# r1: MpId

-# r2: SecBootMode

-# r3: Secure Monitor mode stack

-ASM_PFX(enter_monitor_mode):

-    cmp     r3, #0                      @ If a Secure Monitor stack base has not been defined then use the Secure stack

-    moveq   r3, sp

-

-    mrs     r4, cpsr                    @ Save current mode (SVC) in r4

-    bic     r5, r4, #0x1f               @ Clear all mode bits

-    orr     r5, r5, #0x16               @ Set bits for Monitor mode

-    msr     cpsr_cxsf, r5               @ We are now in Monitor Mode

-

-    mov     sp, r3                      @ Set the stack of the Monitor Mode

-

-    mov     lr, r0                      @ Use the pass entrypoint as lr

-

-    msr     spsr_cxsf, r4               @ Use saved mode for the MOVS jump to the kernel

-

-    mov     r4, r0                      @ Swap EntryPoint and MpId registers

-    mov     r0, r1

-    mov     r1, r2

-    mov     r2, r3

-

-    bx      r4

-

-# We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.

-# When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into

-# 'pc'; we will not change the CPSR flag and it will crash.

-# The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.

-ASM_PFX(return_from_exception):

-    ldr     lr, returned_exception

-

-    #The following instruction breaks the code.

-    #movs    pc, lr

-    mrs     r2, cpsr

-    bic     r2, r2, #0x1f

-    orr     r2, r2, #0x13

-    msr     cpsr_c, r2

-

-returned_exception:                           @ We are now in non-secure state

-    bx      r0

-

-# Save the current Program Status Register (PSR) into the Saved PSR

-ASM_PFX(copy_cpsr_into_spsr):

-    mrs     r0, cpsr

-    msr     spsr_cxsf, r0

-    bx      lr

-

-# Set the Non Secure Mode

-ASM_PFX(set_non_secure_mode):

-    push    { r1 }

-    and     r0, r0, #0x1f     @ Keep only the mode bits

-    mrs     r1, spsr          @ Read the spsr

-    bic     r1, r1, #0x1f     @ Clear all mode bits

-    orr     r1, r1, r0

-    msr     spsr_cxsf, r1     @ write back spsr (may have caused a mode switch)

-    isb

-    pop     { r1 }

-    bx      lr                @ return (hopefully thumb-safe!)

-

-ASM_FUNCTION_REMOVE_IF_UNREFERENCED

diff --git a/ArmPlatformPkg/Sec/Arm/Helper.asm b/ArmPlatformPkg/Sec/Arm/Helper.asm
deleted file mode 100644
index 8aa7d7840d..0000000000
--- a/ArmPlatformPkg/Sec/Arm/Helper.asm
+++ /dev/null
@@ -1,79 +0,0 @@
-//

-//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.

-//

-//  This program and the accompanying materials

-//  are licensed and made available under the terms and conditions of the BSD License

-//  which accompanies this distribution.  The full text of the license may be found at

-//  http://opensource.org/licenses/bsd-license.php

-//

-//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-//

-//

-

-    EXPORT  return_from_exception

-    EXPORT  enter_monitor_mode

-    EXPORT  copy_cpsr_into_spsr

-    EXPORT  set_non_secure_mode

-

-    AREA   Helper, CODE, READONLY

-

-// r0: Monitor World EntryPoint

-// r1: MpId

-// r2: SecBootMode

-// r3: Secure Monitor mode stack

-enter_monitor_mode FUNCTION

-    cmp     r3, #0                      // If a Secure Monitor stack base has not been defined then use the Secure stack

-    moveq   r3, sp

-

-    mrs     r4, cpsr                    // Save current mode (SVC) in r4

-    bic     r5, r4, #0x1f               // Clear all mode bits

-    orr     r5, r5, #0x16               // Set bits for Monitor mode

-    msr     cpsr_cxsf, r5               // We are now in Monitor Mode

-

-    mov     sp, r3                      // Set the stack of the Monitor Mode

-

-    mov     lr, r0                      // Use the pass entrypoint as lr

-

-    msr     spsr_cxsf, r4               // Use saved mode for the MOVS jump to the kernel

-

-    mov     r4, r0                      // Swap EntryPoint and MpId registers

-    mov     r0, r1

-    mov     r1, r2

-    mov     r2, r3

-

-    bx      r4

-    ENDFUNC

-

-// We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.

-// When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into

-// 'pc'; we will not change the CPSR flag and it will crash.

-// The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.

-return_from_exception

-    adr     lr, returned_exception

-    movs    pc, lr

-returned_exception                           // We are now in non-secure state

-    bx      r0

-

-// Save the current Program Status Register (PSR) into the Saved PSR

-copy_cpsr_into_spsr

-    mrs     r0, cpsr

-    msr     spsr_cxsf, r0

-    bx      lr

-

-// Set the Non Secure Mode

-set_non_secure_mode

-    push    { r1 }

-    and     r0, r0, #0x1f     // Keep only the mode bits

-    mrs     r1, spsr          // Read the spsr

-    bic     r1, r1, #0x1f     // Clear all mode bits

-    orr     r1, r1, r0

-    msr     spsr_cxsf, r1     // write back spsr (may have caused a mode switch)

-    isb

-    pop     { r1 }

-    bx      lr                // return (hopefully thumb-safe!)

-

-dead

-    B       dead

-

-    END

diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
deleted file mode 100644
index 51b91b965d..0000000000
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
+++ /dev/null
@@ -1,122 +0,0 @@
-//

-//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.

-//

-//  This program and the accompanying materials

-//  are licensed and made available under the terms and conditions of the BSD License

-//  which accompanies this distribution.  The full text of the license may be found at

-//  http://opensource.org/licenses/bsd-license.php

-//

-//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-//

-//

-

-#include <AutoGen.h>

-#include <AsmMacroIoLib.h>

-#include "SecInternal.h"

-

-.text

-.align 3

-

-GCC_ASM_IMPORT(CEntryPoint)

-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)

-GCC_ASM_IMPORT(ArmPlatformGetCorePosition)

-GCC_ASM_IMPORT(ArmPlatformSecBootAction)

-GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)

-GCC_ASM_IMPORT(ArmDisableInterrupts)

-GCC_ASM_IMPORT(ArmDisableCachesAndMmu)

-GCC_ASM_IMPORT(ArmReadMpidr)

-GCC_ASM_IMPORT(ArmCallWFE)

-GCC_ASM_EXPORT(_ModuleEntryPoint)

-

-StartupAddr:        .word       ASM_PFX(CEntryPoint)

-

-ASM_PFX(_ModuleEntryPoint):

-  // First ensure all interrupts are disabled

-  bl    ASM_PFX(ArmDisableInterrupts)

-

-  // Ensure that the MMU and caches are off

-  bl    ASM_PFX(ArmDisableCachesAndMmu)

-

-  // By default, we are doing a cold boot

-  mov   r10, #ARM_SEC_COLD_BOOT

-

-  // Jump to Platform Specific Boot Action function

-  blx   ASM_PFX(ArmPlatformSecBootAction)

-

-_IdentifyCpu:

-  // Identify CPU ID

-  bl    ASM_PFX(ArmReadMpidr)

-  // Keep a copy of the MpId register value

-  mov   r9, r0

-

-  // Is it the Primary Core ?

-  bl    ASM_PFX(ArmPlatformIsPrimaryCore)

-  cmp   r0, #1

-  // Only the primary core initialize the memory (SMC)

-  beq   _InitMem

-

-_WaitInitMem:

-  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized

-  // Otherwise we have to wait the Primary Core to finish the initialization

-  cmp   r10, #ARM_SEC_COLD_BOOT

-  bne   _SetupSecondaryCoreStack

-

-  // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)

-  bl    ASM_PFX(ArmCallWFE)

-  // Now the Init Mem is initialized, we setup the secondary core stacks

-  b     _SetupSecondaryCoreStack

-

-_InitMem:

-  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized

-  cmp   r10, #ARM_SEC_COLD_BOOT

-  bne   _SetupPrimaryCoreStack

-

-  // Initialize Init Boot Memory

-  bl    ASM_PFX(ArmPlatformSecBootMemoryInit)

-

-_SetupPrimaryCoreStack:

-  // Get the top of the primary stacks (and the base of the secondary stacks)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)

-  add   r1, r1, r2

-

-  LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)

-

-  // The reserved space for global variable must be 8-bytes aligned for pushing

-  // 64-bit variable on the stack

-  SetPrimaryStack (r1, r2, r3)

-  b     _PrepareArguments

-

-_SetupSecondaryCoreStack:

-  // Get the top of the primary stacks (and the base of the secondary stacks)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)

-  add   r6, r1, r2

-

-  // Get the Core Position

-  mov   r0, r9

-  bl    ASM_PFX(ArmPlatformGetCorePosition)

-  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack

-  add   r0, r0, #1

-

-  // StackOffset = CorePos * StackSize

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)

-  mul   r0, r0, r2

-  // SP = StackBase + StackOffset

-  add   sp, r6, r0

-

-_PrepareArguments:

-  // Move sec startup address into a data register

-  // Ensure we're jumping to FV version of the code (not boot remapped alias)

-  ldr   r3, StartupAddr

-

-  // Jump to SEC C code

-  //    r0 = mp_id

-  //    r1 = Boot Mode

-  mov   r0, r9

-  mov   r1, r10

-  blx   r3

-

-_NeverReturn:

-  b _NeverReturn

diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
deleted file mode 100644
index b30fab2141..0000000000
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
+++ /dev/null
@@ -1,126 +0,0 @@
-//

-//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.

-//

-//  This program and the accompanying materials

-//  are licensed and made available under the terms and conditions of the BSD License

-//  which accompanies this distribution.  The full text of the license may be found at

-//  http://opensource.org/licenses/bsd-license.php

-//

-//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-//

-//

-

-#include <AutoGen.h>

-#include <AsmMacroIoLib.h>

-#include "SecInternal.h"

-

-  INCLUDE AsmMacroIoLib.inc

-

-  IMPORT  CEntryPoint

-  IMPORT  ArmPlatformIsPrimaryCore

-  IMPORT  ArmPlatformGetCorePosition

-  IMPORT  ArmPlatformSecBootAction

-  IMPORT  ArmPlatformSecBootMemoryInit

-  IMPORT  ArmDisableInterrupts

-  IMPORT  ArmDisableCachesAndMmu

-  IMPORT  ArmReadMpidr

-  IMPORT  ArmCallWFE

-  EXPORT  _ModuleEntryPoint

-

-  PRESERVE8

-  AREA    SecEntryPoint, CODE, READONLY

-

-StartupAddr        DCD      CEntryPoint

-

-_ModuleEntryPoint FUNCTION

-  // First ensure all interrupts are disabled

-  bl    ArmDisableInterrupts

-

-  // Ensure that the MMU and caches are off

-  bl    ArmDisableCachesAndMmu

-

-  // By default, we are doing a cold boot

-  mov   r10, #ARM_SEC_COLD_BOOT

-

-  // Jump to Platform Specific Boot Action function

-  blx   ArmPlatformSecBootAction

-

-_IdentifyCpu

-  // Identify CPU ID

-  bl    ArmReadMpidr

-  // Keep a copy of the MpId register value

-  mov   r9, r0

-

-  // Is it the Primary Core ?

-  bl    ArmPlatformIsPrimaryCore

-  cmp   r0, #1

-  // Only the primary core initialize the memory (SMC)

-  beq   _InitMem

-

-_WaitInitMem

-  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized

-  // Otherwise we have to wait the Primary Core to finish the initialization

-  cmp   r10, #ARM_SEC_COLD_BOOT

-  bne   _SetupSecondaryCoreStack

-

-  // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)

-  bl    ArmCallWFE

-  // Now the Init Mem is initialized, we setup the secondary core stacks

-  b     _SetupSecondaryCoreStack

-

-_InitMem

-  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized

-  cmp   r10, #ARM_SEC_COLD_BOOT

-  bne   _SetupPrimaryCoreStack

-

-  // Initialize Init Boot Memory

-  bl    ArmPlatformSecBootMemoryInit

-

-_SetupPrimaryCoreStack

-  // Get the top of the primary stacks (and the base of the secondary stacks)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)

-  add   r1, r1, r2

-

-  LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)

-

-  // The reserved space for global variable must be 8-bytes aligned for pushing

-  // 64-bit variable on the stack

-  SetPrimaryStack (r1, r2, r3)

-  b     _PrepareArguments

-

-_SetupSecondaryCoreStack

-  // Get the top of the primary stacks (and the base of the secondary stacks)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)

-  add   r6, r1, r2

-

-  // Get the Core Position

-  mov   r0, r9

-  bl    ArmPlatformGetCorePosition

-  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack

-  add   r0, r0, #1

-

-  // StackOffset = CorePos * StackSize

-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)

-  mul   r0, r0, r2

-  // SP = StackBase + StackOffset

-  add   sp, r6, r0

-

-_PrepareArguments

-  // Move sec startup address into a data register

-  // Ensure we're jumping to FV version of the code (not boot remapped alias)

-  ldr   r3, StartupAddr

-

-  // Jump to SEC C code

-  //    r0 = mp_id

-  //    r1 = Boot Mode

-  mov   r0, r9

-  mov   r1, r10

-  blx   r3

-  ENDFUNC

-

-_NeverReturn

-  b _NeverReturn

-  END