diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-27 16:22:09 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-27 16:22:09 +0000 |
| commit | 90d6a1bbf11487d679c21f54fb79e538574944ea (patch) | |
| tree | 0b1cdd595b92b9dcef767609206405edebb1b356 /ArmPlatformPkg/Sec/SecEntryPoint.S | |
| parent | 607599bf3d054da087529e58883650ad693aad3d (diff) | |
| download | edk2-platforms-90d6a1bbf11487d679c21f54fb79e538574944ea.tar.xz | |
ArmPkg: Introduce ArmCpuLib to abstract ARM Cpu specific initialization
Every CPUs have their own initialization requirements.
This library allows to allows to abstract these initialization requirements
into the ARM Platform common components.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12448 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec/SecEntryPoint.S')
| -rw-r--r-- | ArmPlatformPkg/Sec/SecEntryPoint.S | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S index 7f13057f6b..f92a2dffba 100644 --- a/ArmPlatformPkg/Sec/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/SecEntryPoint.S @@ -13,15 +13,11 @@ #include <AutoGen.h>
#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <Library/ArmPlatformLib.h>
+#include "SecInternal.h"
.text
.align 3
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-
GCC_ASM_IMPORT(CEntryPoint)
GCC_ASM_IMPORT(ArmPlatformSecBootAction)
GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)
@@ -30,13 +26,10 @@ GCC_ASM_IMPORT(ArmDisableCachesAndMmu) GCC_ASM_IMPORT(ArmWriteVBar)
GCC_ASM_IMPORT(ArmReadMpidr)
GCC_ASM_IMPORT(SecVectorTable)
-
-#if (FixedPcdGet32(PcdMPCoreSupport))
-GCC_ASM_IMPORT(ArmIsScuEnable)
-#endif
+GCC_ASM_IMPORT(ArmCpuSynchronizeWait)
+GCC_ASM_EXPORT(_ModuleEntryPoint)
StartupAddr: .word ASM_PFX(CEntryPoint)
-SecVectorTableAddr: .word ASM_PFX(SecVectorTable)
ASM_PFX(_ModuleEntryPoint):
// First ensure all interrupts are disabled
@@ -65,14 +58,11 @@ _IdentifyCpu: // Only the primary core initialize the memory (SMC)
beq _InitMem
-#if (FixedPcdGet32(PcdMPCoreSupport))
- // ... The secondary cores wait for SCU to be enabled
-_WaitForEnabledScu:
- bl ASM_PFX(ArmIsScuEnable)
- tst r1, #1
- beq _WaitForEnabledScu
+_WaitInitMem:
+ mov r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
+ bl ASM_PFX(ArmCpuSynchronizeWait)
+ // Now the Init Mem is initialized, we setup the secondary core stacks
b _SetupSecondaryCoreStack
-#endif
_InitMem:
// Initialize Init Boot Memory
@@ -110,7 +100,7 @@ _SetupSecondaryCoreStack: // Get the base of the stack for the secondary cores
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
add r1, r1, r2
// StackOffset = CorePos * StackSize
|