diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 20:13:32 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 20:13:32 +0000 |
| commit | e314d564db4d52a9e904f6049dad7fc5dece5cb4 (patch) | |
| tree | e135daade07ab9b9fba84ad088d4c115c75b9f41 /ArmPlatformPkg/Sec/SecEntryPoint.S | |
| parent | 315649cda206bd439a09c02e82b683ab754df77a (diff) | |
| download | edk2-platforms-e314d564db4d52a9e904f6049dad7fc5dece5cb4.tar.xz | |
ArmPlatformPkg: Introduced 'ArmPlatformSecLib'
The function only used in Secure Firmware used to be mixed with
the Non-Secure/Normal functions in ArmPlatformLib.
When the Secure Firmware was not required for some platforms (eg:
BeagleBoard), these functions were empty functions.
This new interface has been created to clean the ArmPlatformLib
interface between the SEC and PEI phases.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13260 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec/SecEntryPoint.S')
| -rw-r--r-- | ArmPlatformPkg/Sec/SecEntryPoint.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S index 25b6696173..8266dad977 100644 --- a/ArmPlatformPkg/Sec/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/SecEntryPoint.S @@ -20,7 +20,7 @@ GCC_ASM_IMPORT(CEntryPoint)
GCC_ASM_IMPORT(ArmPlatformSecBootAction)
-GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)
+GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
GCC_ASM_IMPORT(ArmDisableInterrupts)
GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
GCC_ASM_IMPORT(ArmWriteVBar)
@@ -66,7 +66,7 @@ _WaitInitMem: _InitMem:
// Initialize Init Boot Memory
- bl ASM_PFX(ArmPlatformInitializeBootMemory)
+ bl ASM_PFX(ArmPlatformSecBootMemoryInit)
// Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
|