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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-11-01 23:41:20 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-11-01 23:41:20 +0000
commit513aa3497afd3b84f6f20ed53a18534cb72b2180 (patch)
tree1e06af4c806d01f6499e7662c5c3bce781fa7c54 /ArmPlatformPkg/Sec/SecInternal.h
parent504d14603dab586779954485c0ca568b7bd41e25 (diff)
downloadedk2-platforms-513aa3497afd3b84f6f20ed53a18534cb72b2180.tar.xz
ArmPlatformPkg/Sec: Replaced hardcode SCR and NSACR values by PCDs to enable CPU and Platform Specific settings
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12637 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec/SecInternal.h')
-rw-r--r--ArmPlatformPkg/Sec/SecInternal.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/ArmPlatformPkg/Sec/SecInternal.h b/ArmPlatformPkg/Sec/SecInternal.h
index 4d1b0f6089..cf9c1707d5 100644
--- a/ArmPlatformPkg/Sec/SecInternal.h
+++ b/ArmPlatformPkg/Sec/SecInternal.h
@@ -59,6 +59,11 @@ copy_cpsr_into_spsr (
);
VOID
+set_non_secure_mode (
+ IN ARM_PROCESSOR_MODE Mode
+ );
+
+VOID
SecCommonExceptionEntry (
IN UINT32 Entry,
IN UINT32 LR