diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-03-31 12:11:12 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-03-31 12:11:12 +0000 |
| commit | 262a9b04441b9e38b8c43ae0e4c60ae62df35504 (patch) | |
| tree | 2e61f41671a85053ad5d7dd141c9f8bb8120dac8 /ArmPlatformPkg/Sec | |
| parent | 2637d1ef354a4db0e3fc676a8985ee40b5401eba (diff) | |
| download | edk2-platforms-262a9b04441b9e38b8c43ae0e4c60ae62df35504.tar.xz | |
ArmPlatformPkg: Rename gEmbeddedTokenSpaceGuid.PcdEmbeddedFd* into gArmTokenSpaceGuid.PcdNormalFd*
This renaming is for matching the namespace with the secure firmware
gArmTokenSpaceGuid.PcdSecureFdBaseAddress/Size.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11475 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec')
| -rw-r--r-- | ArmPlatformPkg/Sec/Sec.c | 8 | ||||
| -rw-r--r-- | ArmPlatformPkg/Sec/Sec.inf | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c index 4de49329d4..4199f381ba 100644 --- a/ArmPlatformPkg/Sec/Sec.c +++ b/ArmPlatformPkg/Sec/Sec.c @@ -195,7 +195,7 @@ CEntryPoint ( // If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address if (FeaturePcdGet(PcdStandalone) == FALSE) { if (CoreId == 0) { - UINTN* StartAddress = (UINTN*)PcdGet32(PcdEmbeddedFdBaseAddress); + UINTN* StartAddress = (UINTN*)PcdGet32(PcdNormalFdBaseAddress); // Patch the DRAM to make an infinite loop at the start address *StartAddress = 0xEAFFFFFE; // opcode for while(1) @@ -204,7 +204,7 @@ CEntryPoint ( SerialPortWrite ((UINT8 *) Buffer, CharCount); // To enter into Non Secure state, we need to make a return from exception - return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress)); + return_from_exception(PcdGet32(PcdNormalFdBaseAddress)); } else { // When the primary core is stopped by the hardware debugger to copy the firmware // into DRAM. The secondary cores are still running. As soon as the first bytes of @@ -218,7 +218,7 @@ CEntryPoint ( } } else { // To enter into Non Secure state, we need to make a return from exception - return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress)); + return_from_exception(PcdGet32(PcdNormalFdBaseAddress)); } //-------------------- Non Secure Mode --------------------- @@ -232,7 +232,7 @@ VOID NonSecureWaitForFirmware() { VOID (*secondary_start)(VOID); // The secondary cores will execute the fimrware once wake from WFI. - secondary_start = (VOID (*)())PcdGet32(PcdEmbeddedFdBaseAddress); + secondary_start = (VOID (*)())PcdGet32(PcdNormalFdBaseAddress); ArmCallWFI(); diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf index 983d87198e..e3ab22150e 100644 --- a/ArmPlatformPkg/Sec/Sec.inf +++ b/ArmPlatformPkg/Sec/Sec.inf @@ -54,7 +54,7 @@ gArmTokenSpaceGuid.PcdVFPEnabled gArmPlatformTokenSpaceGuid.PcdMPCoreSupport - gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress + gArmTokenSpaceGuid.PcdNormalFdBaseAddress gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize |