ARM Packages: Fixed coding style and typos

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14179 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 5 insertions, 5 deletions

diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index be165442bf..52fa53a647 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -35,20 +35,20 @@ CEntryPoint (
   UINTN           JumpAddress;

 

   // Invalidate the data cache. Doesn't have to do the Data cache clean.

-  ArmInvalidateDataCache();

+  ArmInvalidateDataCache ();

 

   // Invalidate Instruction Cache

-  ArmInvalidateInstructionCache();

+  ArmInvalidateInstructionCache ();

 

   // Invalidate I & D TLBs

-  ArmInvalidateInstructionAndDataTlb();

+  ArmInvalidateInstructionAndDataTlb ();

 

   // CPU specific settings

   ArmCpuSetup (MpId);

 

   // Enable Floating Point Coprocessor if supported by the platform

   if (FixedPcdGet32 (PcdVFPEnabled)) {

-    ArmEnableVFP();

+    ArmEnableVFP ();

   }

 

   // Initialize peripherals that must be done at the early stage

@@ -95,7 +95,7 @@ CEntryPoint (
 

   // Test if Trustzone is supported on this platform

   if (FixedPcdGetBool (PcdTrustzoneSupport)) {

-    if (ArmIsMpCore()) {

+    if (ArmIsMpCore ()) {

       // Setup SMP in Non Secure world

       ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));

     }