summaryrefslogtreecommitdiff
path: root/ArmPlatformPkg
diff options
context:
space:
mode:
authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-03-26 11:03:36 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-03-26 11:03:36 +0000
commit5e7731443c6c9214bb012e70f267c3af0aa33258 (patch)
treec79e7ff7206a2379c9c66bf3b73f73c753e64632 /ArmPlatformPkg
parent18029bb9112f7af8c9aedcf0dacbdd5267eb258c (diff)
downloadedk2-platforms-5e7731443c6c9214bb012e70f267c3af0aa33258.tar.xz
ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs
The GICD_IGROUPR0 is banked for each connected processor. It means the Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be configured for every processor. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg')
-rwxr-xr-xArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c2
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf3
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c7
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c2
-rw-r--r--ArmPlatformPkg/Include/Library/ArmPlatformLib.h2
-rw-r--r--ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.c7
-rw-r--r--ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.inf5
-rw-r--r--ArmPlatformPkg/Sec/Sec.c12
8 files changed, 28 insertions, 12 deletions
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c
index 5eb667d6eb..7191835a61 100755
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c
@@ -31,7 +31,7 @@
**/
VOID
ArmPlatformTrustzoneInit (
- VOID
+ IN UINTN MpId
)
{
ASSERT(FALSE);
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
index 03aee0378a..47ad7396ad 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
@@ -52,3 +52,6 @@
gArmTokenSpaceGuid.PcdTrustzoneSupport
gArmTokenSpaceGuid.PcdL2x0ControllerBase
+
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c
index 0cf07a3caf..37140a4a58 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c
@@ -32,9 +32,14 @@
**/
VOID
ArmPlatformTrustzoneInit (
- VOID
+ IN UINTN MpId
)
{
+ // Nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return;
+ }
+
//
// Setup TZ Protection Controller
//
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c
index deba689360..c65c28c1fa 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c
@@ -31,7 +31,7 @@
**/
VOID
ArmPlatformTrustzoneInit (
- VOID
+ IN UINTN MpId
)
{
// No TZPC or TZASC on RTSM to initialize
diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformLib.h b/ArmPlatformPkg/Include/Library/ArmPlatformLib.h
index 852eb236ce..7dd39fef8c 100644
--- a/ArmPlatformPkg/Include/Library/ArmPlatformLib.h
+++ b/ArmPlatformPkg/Include/Library/ArmPlatformLib.h
@@ -140,7 +140,7 @@ ArmPlatformInitializeSystemMemory (
**/
VOID
ArmPlatformTrustzoneInit (
- VOID
+ IN UINTN MpId
);
/**
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.c b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.c
index 11183e9393..9622a32291 100644
--- a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.c
+++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.c
@@ -25,9 +25,14 @@
**/
VOID
ArmPlatformTrustzoneInit (
- VOID
+ IN UINTN MpId
)
{
+ // Secondary cores might have to set the Secure SGIs into the GICD_IGROUPR0
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return;
+ }
+
ASSERT(FALSE);
}
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.inf b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.inf
index 80ac1a6045..bd3dc4958c 100644
--- a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.inf
+++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.inf
@@ -1,5 +1,5 @@
#/* @file
-# Copyright (c) 2011, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -37,3 +37,6 @@
[FixedPcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
+
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 6b478ac0b4..d12c359d4f 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -144,14 +144,14 @@ TrustedWorldInitialization (
// Set up Monitor World (Vector Table, etc)
ArmSecureMonitorWorldInitialize ();
- // Setup the Trustzone Chipsets
- if (IS_PRIMARY_CORE(MpId)) {
- // Transfer the interrupt to Non-secure World
- ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
+ // Transfer the interrupt to Non-secure World
+ ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
- // Initialize platform specific security policy
- ArmPlatformTrustzoneInit ();
+ // Initialize platform specific security policy
+ ArmPlatformTrustzoneInit (MpId);
+ // Setup the Trustzone Chipsets
+ if (IS_PRIMARY_CORE(MpId)) {
if (ArmIsMpCore()) {
// Waiting for the Primary Core to have finished to initialize the Secure World
ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT);