diff options
| author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-07-02 12:00:00 +0000 |
|---|---|---|
| committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-07-02 12:00:00 +0000 |
| commit | afdfe8f02bdf8d563554bb620c001072862b064e (patch) | |
| tree | 133edcc99dcde42e92643907f76a093647a322c2 /ArmRealViewEbPkg/Sec | |
| parent | 7ee525b2c1f8d3d6da5f788364fe5be36a979c9c (diff) | |
| download | edk2-platforms-afdfe8f02bdf8d563554bb620c001072862b064e.tar.xz | |
Remove ArmEbPkg and replace with ArmRealViewEbPkg. Ported ArmRealViewEbPkg to have a PEI phase, and added place holder CPU PEIM to ArmPkg. This ArmRealViewEbPkg now boots from SEC, PEI, DXE, BDS, to EBL in the ARM RealView system emulator that comes with RealView Pro.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10621 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmRealViewEbPkg/Sec')
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.S | 68 | ||||
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm | 80 | ||||
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/Cache.c | 79 | ||||
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/LzmaDecompress.h | 103 | ||||
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/ModuleEntryPoint.S | 68 | ||||
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/ModuleEntryPoint.asm | 80 | ||||
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/Sec.c | 164 | ||||
| -rwxr-xr-x | ArmRealViewEbPkg/Sec/Sec.inf | 69 |
8 files changed, 711 insertions, 0 deletions
diff --git a/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.S b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.S new file mode 100755 index 0000000000..2b5ee8f31a --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.S @@ -0,0 +1,68 @@ +#------------------------------------------------------------------------------
+#
+# ARM EB Entry point. Reset vector in FV header will brach to
+# _ModuleEntryPoint.
+#
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler
+# does not support = assembly syntax for ldr.
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+
+.text
+.align 3
+
+.globl ASM_PFX(CEntryPoint)
+.globl ASM_PFX(_ModuleEntryPoint)
+
+ASM_PFX(_ModuleEntryPoint):
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8)
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ // Call C entry point
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+ blx ASM_PFX(CEntryPoint)
+
+ShouldNeverGetHere:
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+
diff --git a/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm new file mode 100755 index 0000000000..aa0b98f3e6 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm @@ -0,0 +1,80 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ IMPORT CEntryPoint
+ EXPORT _ModuleEntryPoint
+
+ PRESERVE8
+ AREA ModuleEntryPoint, CODE, READONLY
+
+
+StartupAddr DCD CEntryPoint
+
+_ModuleEntryPoint
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+
+ // move sec startup address into a data register
+ // ensure we're jumping to FV version of the code (not boot remapped alias)
+ ldr r4, StartupAddr
+
+ // jump to SEC C code
+ blx r4
+
+ // Call C entry point
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP
+
+ // blx CEntryPoint
+
+ShouldNeverGetHere
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+ END
+
+
diff --git a/ArmRealViewEbPkg/Sec/Cache.c b/ArmRealViewEbPkg/Sec/Cache.c new file mode 100755 index 0000000000..a0e3abb4eb --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Cache.c @@ -0,0 +1,79 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Library/ArmLib.h>
+#include <Library/PrePiLib.h>
+#include <Library/PcdLib.h>
+
+// DDR attributes
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
+
+// SoC registers. L3 interconnects
+#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000
+#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000
+#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+// SoC registers. L4 interconnects
+#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000
+#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000
+#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+VOID
+InitCache (
+ IN UINT32 MemoryBase,
+ IN UINT32 MemoryLength
+ )
+{
+ UINT32 CacheAttributes;
+ ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];
+ VOID *TranslationTableBase;
+ UINTN TranslationTableSize;
+
+ if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;
+ } else {
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
+ }
+
+ // DDR
+ MemoryTable[0].PhysicalBase = MemoryBase;
+ MemoryTable[0].VirtualBase = MemoryBase;
+ MemoryTable[0].Length = MemoryLength;
+ MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
+
+ // SOC Registers. L3 interconnects
+ MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
+ MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
+
+ // SOC Registers. L4 interconnects
+ MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
+ MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
+
+ // End of Table
+ MemoryTable[3].PhysicalBase = 0;
+ MemoryTable[3].VirtualBase = 0;
+ MemoryTable[3].Length = 0;
+ MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+
+ ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+
+ BuildMemoryAllocationHob ((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
+}
diff --git a/ArmRealViewEbPkg/Sec/LzmaDecompress.h b/ArmRealViewEbPkg/Sec/LzmaDecompress.h new file mode 100755 index 0000000000..e4483b6823 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/LzmaDecompress.h @@ -0,0 +1,103 @@ +/** @file
+ LZMA Decompress Library header file
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __LZMA_DECOMPRESS_H___
+#define __LZMA_DECOMPRESS_H___
+
+/**
+ Examines a GUIDed section and returns the size of the decoded buffer and the
+ size of an scratch buffer required to actually decode the data in a GUIDed section.
+
+ Examines a GUIDed section specified by InputSection.
+ If GUID for InputSection does not match the GUID that this handler supports,
+ then RETURN_UNSUPPORTED is returned.
+ If the required information can not be retrieved from InputSection,
+ then RETURN_INVALID_PARAMETER is returned.
+ If the GUID of InputSection does match the GUID that this handler supports,
+ then the size required to hold the decoded buffer is returned in OututBufferSize,
+ the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field
+ from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.
+
+ If InputSection is NULL, then ASSERT().
+ If OutputBufferSize is NULL, then ASSERT().
+ If ScratchBufferSize is NULL, then ASSERT().
+ If SectionAttribute is NULL, then ASSERT().
+
+
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
+ @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required
+ if the buffer specified by InputSection were decoded.
+ @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space
+ if the buffer specified by InputSection were decoded.
+ @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes
+ field of EFI_GUID_DEFINED_SECTION in the PI Specification.
+
+ @retval RETURN_SUCCESS The information about InputSection was returned.
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
+ @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.
+
+**/
+RETURN_STATUS
+EFIAPI
+LzmaGuidedSectionGetInfo (
+ IN CONST VOID *InputSection,
+ OUT UINT32 *OutputBufferSize,
+ OUT UINT32 *ScratchBufferSize,
+ OUT UINT16 *SectionAttribute
+ );
+
+/**
+ Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.
+
+ Decodes the GUIDed section specified by InputSection.
+ If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned.
+ If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.
+ If the GUID of InputSection does match the GUID that this handler supports, then InputSection
+ is decoded into the buffer specified by OutputBuffer and the authentication status of this
+ decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the
+ data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,
+ the decoded data will be placed in caller allocated buffer specified by OutputBuffer.
+
+ If InputSection is NULL, then ASSERT().
+ If OutputBuffer is NULL, then ASSERT().
+ If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
+ If AuthenticationStatus is NULL, then ASSERT().
+
+
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
+ @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
+ @param[out] ScratchBuffer A caller allocated buffer that may be required by this function
+ as a scratch buffer to perform the decode operation.
+ @param[out] AuthenticationStatus
+ A pointer to the authentication status of the decoded output buffer.
+ See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI
+ section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must
+ never be set by this handler.
+
+ @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
+ @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.
+
+**/
+RETURN_STATUS
+EFIAPI
+LzmaGuidedSectionExtraction (
+ IN CONST VOID *InputSection,
+ OUT VOID **OutputBuffer,
+ OUT VOID *ScratchBuffer, OPTIONAL
+ OUT UINT32 *AuthenticationStatus
+ );
+
+#endif // __LZMADECOMPRESS_H__
+
diff --git a/ArmRealViewEbPkg/Sec/ModuleEntryPoint.S b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.S new file mode 100755 index 0000000000..2b5ee8f31a --- /dev/null +++ b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.S @@ -0,0 +1,68 @@ +#------------------------------------------------------------------------------
+#
+# ARM EB Entry point. Reset vector in FV header will brach to
+# _ModuleEntryPoint.
+#
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler
+# does not support = assembly syntax for ldr.
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+
+.text
+.align 3
+
+.globl ASM_PFX(CEntryPoint)
+.globl ASM_PFX(_ModuleEntryPoint)
+
+ASM_PFX(_ModuleEntryPoint):
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8)
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ // Call C entry point
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+ blx ASM_PFX(CEntryPoint)
+
+ShouldNeverGetHere:
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+
diff --git a/ArmRealViewEbPkg/Sec/ModuleEntryPoint.asm b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.asm new file mode 100755 index 0000000000..aa0b98f3e6 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.asm @@ -0,0 +1,80 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ IMPORT CEntryPoint
+ EXPORT _ModuleEntryPoint
+
+ PRESERVE8
+ AREA ModuleEntryPoint, CODE, READONLY
+
+
+StartupAddr DCD CEntryPoint
+
+_ModuleEntryPoint
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+
+ // move sec startup address into a data register
+ // ensure we're jumping to FV version of the code (not boot remapped alias)
+ ldr r4, StartupAddr
+
+ // jump to SEC C code
+ blx r4
+
+ // Call C entry point
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP
+
+ // blx CEntryPoint
+
+ShouldNeverGetHere
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+ END
+
+
diff --git a/ArmRealViewEbPkg/Sec/Sec.c b/ArmRealViewEbPkg/Sec/Sec.c new file mode 100755 index 0000000000..360a7b017b --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Sec.c @@ -0,0 +1,164 @@ +/** @file
+ C Entry point for the SEC. First C code after the reset vector.
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Library/DebugLib.h>
+#include <Library/PrePiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/DebugAgentLib.h>
+
+#include <Ppi/GuidedSectionExtraction.h>
+#include <Guid/LzmaDecompress.h>
+
+#include <ArmEb/ArmEb.h>
+
+#include "LzmaDecompress.h"
+
+VOID
+EFIAPI
+_ModuleEntryPoint(
+ VOID
+ );
+
+CHAR8 *
+DeCygwinPathIfNeeded (
+ IN CHAR8 *Name
+ );
+
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+ VOID
+ );
+
+
+VOID
+UartInit (
+ VOID
+ )
+{
+ // SEC phase needs to run library constructors by hand.
+ // This assumes we are linked agains the SerialLib
+ // In non SEC modules the init call is in autogenerated code.
+ SerialPortInitialize ();
+}
+
+VOID
+TimerInit (
+ VOID
+ )
+{
+ // configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Enable
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);
+
+ // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
+
+ // preload the timer count register
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);
+
+ // enable the timer
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+}
+
+
+VOID
+InitCache (
+ IN UINT32 MemoryBase,
+ IN UINT32 MemoryLength
+ );
+
+EFI_STATUS
+EFIAPI
+ExtractGuidedSectionLibConstructor (
+ VOID
+ );
+
+EFI_STATUS
+EFIAPI
+LzmaDecompressLibConstructor (
+ VOID
+ );
+
+
+VOID
+CEntryPoint (
+ IN VOID *MemoryBase,
+ IN UINTN MemorySize,
+ IN VOID *StackBase,
+ IN UINTN StackSize
+ )
+{
+ VOID *HobBase;
+
+ // HOB list is at bottom of stack area
+ // Stack grows from top-to-bottom towards HOB list
+ HobBase = (VOID *)StackBase;
+ CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);
+
+ // Turn off remapping NOR to 0. We can will now see DRAM in low memory
+ MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE
+
+ // Enable program flow prediction, if supported.
+ ArmEnableBranchPrediction ();
+
+ // Initialize CPU cache
+ InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);
+
+ // Add memory allocation hob for relocated FD
+ BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
+
+ // Add the FVs to the hob list
+ BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
+
+ // Start talking
+ UartInit ();
+
+ InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL);
+ SaveAndSetDebugTimerInterrupt (TRUE);
+
+ DEBUG ((EFI_D_ERROR, "UART Enabled\n"));
+
+ // Start up a free running timer so that the timer lib will work
+ TimerInit ();
+
+ // SEC phase needs to run library constructors by hand.
+ ExtractGuidedSectionLibConstructor ();
+ LzmaDecompressLibConstructor ();
+
+ // Build HOBs to pass up our version of stuff the DXE Core needs to save space
+ BuildPeCoffLoaderHob ();
+ BuildExtractSectionHob (
+ &gLzmaCustomDecompressGuid,
+ LzmaGuidedSectionGetInfo,
+ LzmaGuidedSectionExtraction
+ );
+
+ // Assume the FV that contains the SEC (our code) also contains a compressed FV.
+ DecompressFirstFv ();
+
+ // Load the DXE Core and transfer control to it
+ LoadDxeCoreFromFv (NULL, 0);
+
+ // DXE Core should always load and never return
+ ASSERT (FALSE);
+}
+
diff --git a/ArmRealViewEbPkg/Sec/Sec.inf b/ArmRealViewEbPkg/Sec/Sec.inf new file mode 100755 index 0000000000..f2ba434427 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Sec.inf @@ -0,0 +1,69 @@ + +#/** @file +# SEC - Reset vector code that jumps to C and loads DXE core +# +# Copyright (c) 2008, Apple Inc. All rights reserved.<BR> +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ArmEBSec + FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8 + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + + +[Sources.ARM] + ModuleEntryPoint.S | GCC + ModuleEntryPoint.asm | RVCT + +[Sources.ARM] + Sec.c + Cache.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec + ArmRealViewEbPkg/ArmRealViewEbPkg.dec + + +[LibraryClasses] + BaseLib + DebugLib + ArmLib + IoLib + ExtractGuidedSectionLib + LzmaDecompressLib + PeCoffGetEntryPointLib + DebugAgentLib + + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdCacheEnable + +[FixedPcd] + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress + gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize + gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase + gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize + gEmbeddedTokenSpaceGuid.PcdPrePiStackSize + gEmbeddedTokenSpaceGuid.PcdPrePiStackBase + gEmbeddedTokenSpaceGuid.PcdMemoryBase + gEmbeddedTokenSpaceGuid.PcdMemorySize + + + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress + + |