diff options
| author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-07-02 12:00:00 +0000 |
|---|---|---|
| committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-07-02 12:00:00 +0000 |
| commit | afdfe8f02bdf8d563554bb620c001072862b064e (patch) | |
| tree | 133edcc99dcde42e92643907f76a093647a322c2 /ArmRealViewEbPkg | |
| parent | 7ee525b2c1f8d3d6da5f788364fe5be36a979c9c (diff) | |
| download | edk2-platforms-afdfe8f02bdf8d563554bb620c001072862b064e.tar.xz | |
Remove ArmEbPkg and replace with ArmRealViewEbPkg. Ported ArmRealViewEbPkg to have a PEI phase, and added place holder CPU PEIM to ArmPkg. This ArmRealViewEbPkg now boots from SEC, PEI, DXE, BDS, to EBL in the ARM RealView system emulator that comes with RealView Pro.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10621 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmRealViewEbPkg')
58 files changed, 6291 insertions, 0 deletions
diff --git a/ArmRealViewEbPkg/ArmRealViewEbPkg.dec b/ArmRealViewEbPkg/ArmRealViewEbPkg.dec new file mode 100755 index 0000000000..654eeeb7e8 --- /dev/null +++ b/ArmRealViewEbPkg/ArmRealViewEbPkg.dec @@ -0,0 +1,42 @@ +#/** @file +# Arm RealView EB package. +# +# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR> +# +# This program and the accompanying materials are licensed and made available under +# the terms and conditions of the BSD License which accompanies this distribution. +# The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + DEC_SPECIFICATION = 0x00010005 + PACKAGE_NAME = ArmRealViewEbPkg + PACKAGE_GUID = 44577A0D-361A-45B2-B33D-BB9EE60D5A4F + PACKAGE_VERSION = 0.1 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Includes.common] + Include # Root include for the package + +[Guids.common] + gArmRealViewEbPkgTokenSpaceGuid = { 0x44577A0D, 0x361A, 0x45B2, { 0xb3, 0x3d, 0xbb, 0x9e, 0xe6, 0x0d, 0x5a, 0x4f} } + +[PcdsFeatureFlag.common] + +[PcdsFixedAtBuild.common] + gArmRealViewEbPkgTokenSpaceGuid.PcdConsoleUartBase|0x10009000|UINT32|0x00000001 + gArmRealViewEbPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000|UINT32|0x00000002 + gArmRealViewEbPkgTokenSpaceGuid.PcdPeiServicePtrAddr|0|UINT32|0x00000003 diff --git a/ArmRealViewEbPkg/ArmRealViewEbPkg.dsc b/ArmRealViewEbPkg/ArmRealViewEbPkg.dsc new file mode 100755 index 0000000000..0ffb819b3f --- /dev/null +++ b/ArmRealViewEbPkg/ArmRealViewEbPkg.dsc @@ -0,0 +1,410 @@ +#/** @file
+# ARM RealViewEB package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmRealViewEbPkg
+ PLATFORM_GUID = F4C1AD3E-9D3E-4F61-8791-B3BB1C43D04C
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+ OUTPUT_DIRECTORY = Build/ArmRealViewEb
+ SUPPORTED_ARCHITECTURES = ARM
+ BUILD_TARGETS = DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = ArmRealViewEbPkg/ArmRealViewEbPkg.fdf
+
+
+[LibraryClasses.common]
+!if $(BUILD_TARGETS) == RELEASE
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+ UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+# UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
+!endif
+
+ ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf
+
+ EfiResetSystemLib|ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.inf
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+
+ EblCmdLib|BeagleBoardPkg/Library/EblCmdLib/EblCmdLib.inf
+ EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+
+ #
+ # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
+ # in the debugger will show load and unload commands for symbols. You can cut and paste this
+ # into the command window to load symbols. We should be able to use a script to do this, but
+ # the version of RVD I have does not support scipts accessing system memory.
+ #
+# PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
+ PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
+# PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+
+
+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+ DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+
+ SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
+
+ RealTimeClockLib|ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.inf
+
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+
+#
+# Assume everything is fixed at build
+#
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+
+
+ EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf
+
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+
+ EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf
+
+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+ DebugAgentTimerLib|ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
+
+ SerialPortLib|ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.inf
+ #TimerLib|ArmRealViewEbPkg/Library/TimerLib/TimerLib.inf
+ TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
+ SerialPortLib|ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.inf
+ GdbSerialLib|ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.inf
+ DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
+
+
+[LibraryClasses.common.SEC]
+ ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+
+ # 1/123 faster than Stm or Vstm version
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+
+ # Uncomment to turn on GDB stub in SEC.
+ #DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf
+
+[LibraryClasses.common.PEI_CORE]
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ # note: this won't actually work since globals in PEI are not writeable
+ # need to generate an ARM PEI services table pointer implementation
+ PeiServicesTablePointerLib|ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+
+[LibraryClasses.common.PEIM]
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ # note: this won't actually work since globals in PEI are not writeable
+ # need to generate an ARM PEI services table pointer implementation
+ PeiServicesTablePointerLib|ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+
+ PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+
+
+[LibraryClasses.common.DXE_DRIVER]
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+
+[LibraryClasses.common.UEFI_APPLICATION]
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+[LibraryClasses.ARM]
+ #
+ # It is not possible to prevent the ARM compiler for generic intrinsic functions.
+ # This library provides the instrinsic functions generate by a given compiler.
+ # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
+ #
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+
+[BuildOptions]
+ RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb
+ RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8
+ RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+
+ GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb
+ GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+
+ XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7
+ XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7
+ XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7
+ XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFeatureFlag.common]
+ gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
+
+ gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
+
+[PcdsFixedAtBuild.common]
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmEb %a"
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
+ gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
+ gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
+
+# DEBUG_ASSERT_ENABLED 0x01
+# DEBUG_PRINT_ENABLED 0x02
+# DEBUG_CODE_ENABLED 0x04
+# CLEAR_MEMORY_ENABLED 0x08
+# ASSERT_BREAKPOINT_ENABLED 0x10
+# ASSERT_DEADLOOP_ENABLED 0x20
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+
+# DEBUG_INIT 0x00000001 // Initialization
+# DEBUG_WARN 0x00000002 // Warnings
+# DEBUG_LOAD 0x00000004 // Load events
+# DEBUG_FS 0x00000008 // EFI File system
+# DEBUG_POOL 0x00000010 // Alloc & Free's
+# DEBUG_PAGE 0x00000020 // Alloc & Free's
+# DEBUG_INFO 0x00000040 // Verbose
+# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers
+# DEBUG_VARIABLE 0x00000100 // Variable
+# DEBUG_BM 0x00000400 // Boot Manager
+# DEBUG_BLKIO 0x00001000 // BlkIo Driver
+# DEBUG_NET 0x00004000 // SNI Driver
+# DEBUG_UNDI 0x00010000 // UNDI Driver
+# DEBUG_LOADFILE 0x00020000 // UNDI Driver
+# DEBUG_EVENT 0x00080000 // Event messages
+# DEBUG_ERROR 0x80000000 // Error
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0xffffffcf
+
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
+#
+# Optional feature to help prevent EFI memory map fragments
+# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
+# Values are in EFI Pages (4K). DXE Core will make sure that
+# at least this much of each type of memory can be allocated
+# from a single memory range. This way you only end up with
+# maximum of two fragements for each type in the memory map
+# (the memory used, and the free memory that was prereserved
+# but not used).
+#
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
+ #gArmTokenSpaceGuid.PcdCpuResetAddress|0x40000000 # set to start of NOR
+ gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds|77
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz|13000000
+
+ #
+ # ARM Pcds
+ #
+ gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
+
+ #
+ # ARM EB PCDS
+ #
+ gArmRealViewEbPkgTokenSpaceGuid.PcdConsoleUartBase|0x10009000
+ gArmRealViewEbPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000
+
+ # change these together
+ gArmRealViewEbPkgTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # pei services ptr just above stack
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x48000000 # stack at top of SRAM
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x00020000 # 128K stack
+
+
+
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+
+#
+# SEC
+#
+ ArmRealViewEbPkg/SecForPei/Sec.inf
+
+#
+# PEI Phase modules
+#
+MdeModulePkg/Core/Pei/PeiMain.inf
+MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+}
+ArmPkg/Drivers/CpuPei/CpuPei.inf
+ArmRealViewEbPkg/PlatformPei/PlatformPei.inf
+ArmRealViewEbPkg/MemoryInitPei/MemoryInitPei.inf
+IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
+Nt32Pkg/BootModePei/BootModePei.inf
+#Nt32Pkg/StallPei/StallPei.inf
+#Nt32Pkg/WinNtFlashMapPei/WinNtFlashMapPei.inf
+MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+#Nt32Pkg/WinNtFirmwareVolumePei/WinNtFirmwareVolumePei.inf
+MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+
+#
+# DXE
+#
+ MdeModulePkg/Core/Dxe/DxeMain.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+ NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ }
+
+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
+
+ EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+ EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+
+ EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+ EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+ ArmRealViewEbPkg/InterruptDxe/InterruptDxe.inf
+ ArmRealViewEbPkg/TimerDxe/TimerDxe.inf
+
+ #
+ # Semi-hosting filesystem
+ #
+ ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ FatPkg/EnhancedFatDxe/Fat.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+
+ #
+ # Application
+ #
+ EmbeddedPkg/Ebl/Ebl.inf
+
+ #
+ # Bds
+ #
+ ArmRealViewEbPkg/Bds/Bds.inf
+
+ #
+ # Example Application
+ #
+ MdeModulePkg/Application/HelloWorld/HelloWorld.inf
+
diff --git a/ArmRealViewEbPkg/ArmRealViewEbPkg.fdf b/ArmRealViewEbPkg/ArmRealViewEbPkg.fdf new file mode 100755 index 0000000000..cd012b8344 --- /dev/null +++ b/ArmRealViewEbPkg/ArmRealViewEbPkg.fdf @@ -0,0 +1,296 @@ +# FLASH layout file for ARM RealView EB.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into the Flash Device Image. Each FD section
+# defines one flash "device" image. A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash" image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+
+[FD.ArmRealViewEb_EFI]
+BaseAddress = 0x40000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
+Size = 0x00200000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
+ErasePolarity = 1
+BlockSize = 0x00010000
+NumBlocks = 0x20
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x001F0000
+gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
+FV = FVMAIN_COMPACT
+
+0x001F0000|0x00010000
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+#NV_VARIABLE_STORE
+DATA = {
+ ## This is the EFI_FIRMWARE_VOLUME_HEADER
+ # ZeroVector []
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ # FileSystemGuid: gEfiSystemNvDataFvGuid =
+ # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
+ 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
+ 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
+ # FvLength: 0x20000
+ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ #Signature "_FVH" #Attributes
+ 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
+ #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
+ 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02,
+ #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block
+ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
+ #Blockmap[1]: End
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ ## This is the VARIABLE_STORE_HEADER
+ #Signature: gEfiVariableGuid =
+ # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
+ 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
+ 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+ #Size: 0xc000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xBFB8
+ # This can speed up the Variable Dispatch a bit.
+ 0xB8, 0xBF, 0x00, 0x00,
+ #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
+ 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+}
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file. This section also defines order the components and modules are positioned
+# within the image. The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FvMain]
+BlockSize = 0x40
+NumBlocks = 0 # This FV gets compressed so make it just big enough
+FvAlignment = 8 # FV alignment and FV attributes setting.
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ #INF MdeModulePkg/Core/Dxe/DxeMain.inf
+
+ #
+ # PI DXE Drivers producing Architectural Protocols (EFI Services)
+ #
+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
+ INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+
+ INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+
+ INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+ INF ArmRealViewEbPkg/InterruptDxe/InterruptDxe.inf
+ INF ArmRealViewEbPkg/TimerDxe/TimerDxe.inf
+
+ #
+ # Semi-hosting filesystem
+ #
+ INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF FatPkg/EnhancedFatDxe/Fat.inf
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+ #
+ # UEFI application (Shell Embedded Boot Loader)
+ #
+ INF EmbeddedPkg/Ebl/Ebl.inf
+
+
+ #
+ # Bds
+ #
+ INF ArmRealViewEbPkg/Bds/Bds.inf
+
+
+[FV.FVMAIN_COMPACT]
+FvAlignment = 8
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF ArmRealViewEbPkg/SecForPei/Sec.inf
+ INF MdeModulePkg/Core/Pei/PeiMain.inf
+ INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+ INF ArmRealViewEbPkg/PlatformPei/PlatformPei.inf
+ INF ArmRealViewEbPkg/MemoryInitPei/MemoryInitPei.inf
+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+ INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
+ INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+
+ # note: this needs to back in fvmaincompressed
+ # need to add decompression of fvmain
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf
+
+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+ }
+
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+# FILE DRIVER = $(NAMED_GUID) {
+# DXE_DEPEX DXE_DEPEX Optional |.depex
+# COMPRESS PI_STD {
+# GUIDED {
+# PE32 PE32 |.efi
+# UI STRING="$(MODULE_NAME)" Optional
+# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+# }
+# }
+# }
+#
+############################################################################
+
+[Rule.Common.SEC]
+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+ TE TE Align = 8 |.efi
+ }
+
+[Rule.Common.PEI_CORE]
+ FILE PEI_CORE = $(NAMED_GUID) {
+ TE TE |.efi
+ UI STRING ="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional |.depex
+ TE TE |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+ FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+ PEI_DEPEX PEI_DEPEX Optional |.depex
+ GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+ }
+
+[Rule.Common.DXE_CORE]
+ FILE DXE_CORE = $(NAMED_GUID) {
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+
+[Rule.Common.UEFI_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+
+[Rule.Common.UEFI_APPLICATION]
+ FILE APPLICATION = $(NAMED_GUID) {
+ UI STRING ="$(MODULE_NAME)" Optional
+ PE32 PE32 |.efi
+ }
diff --git a/ArmRealViewEbPkg/Bds/Bds.inf b/ArmRealViewEbPkg/Bds/Bds.inf new file mode 100755 index 0000000000..b9c152ca68 --- /dev/null +++ b/ArmRealViewEbPkg/Bds/Bds.inf @@ -0,0 +1,71 @@ +
+#/** @file
+#
+# Component discription file for Bds module
+#
+# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEbBds
+ FILE_GUID = B404835D-EB9F-41c6-BE0C-C815B4FE3437
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = BdsInitialize
+
+[Sources.common]
+ BdsEntry.c
+ FirmwareVolume.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+ DevicePathLib
+ BaseLib
+ HobLib
+ UefiRuntimeServicesTableLib
+ ReportStatusCodeLib
+ PerformanceLib
+ DxeServicesTableLib
+ MemoryAllocationLib
+ UefiLib
+ UefiBootServicesTableLib
+ BaseMemoryLib
+ DebugLib
+ PrintLib
+ UefiDriverEntryPoint
+
+[Guids]
+
+
+[Protocols]
+ gEfiBdsArchProtocolGuid
+ gEfiSimpleTextInProtocolGuid
+ gEfiSimpleTextOutProtocolGuid
+ gEfiSerialIoProtocolGuid
+ gEfiDevicePathProtocolGuid
+ gEfiSimpleFileSystemProtocolGuid
+ gEfiUsbIoProtocolGuid
+ gEfiFirmwareVolume2ProtocolGuid
+
+
+[FeaturePcd]
+
+[FixedPcd]
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
+
+[Depex]
+ TRUE
diff --git a/ArmRealViewEbPkg/Bds/BdsEntry.c b/ArmRealViewEbPkg/Bds/BdsEntry.c new file mode 100755 index 0000000000..8de4e7a209 --- /dev/null +++ b/ArmRealViewEbPkg/Bds/BdsEntry.c @@ -0,0 +1,246 @@ +/** @file
+ The entry of the embedded BDS. This BDS does not follow the Boot Manager requirements
+ of the UEFI specification as it is designed to implement an embedded systmes
+ propriatary boot scheme.
+
+ This template assume a DXE driver produces a SerialIo protocol not using the EFI
+ driver module and it will attempt to connect a console on top of this.
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BdsEntry.h"
+
+
+BOOLEAN gConsolePresent = FALSE;
+
+
+EFI_HANDLE mBdsImageHandle = NULL;
+EFI_BDS_ARCH_PROTOCOL gBdsProtocol = {
+ BdsEntry,
+};
+
+
+
+
+/**
+ This function uses policy data from the platform to determine what operating
+ system or system utility should be loaded and invoked. This function call
+ also optionally make the use of user input to determine the operating system
+ or system utility to be loaded and invoked. When the DXE Core has dispatched
+ all the drivers on the dispatch queue, this function is called. This
+ function will attempt to connect the boot devices required to load and invoke
+ the selected operating system or system utility. During this process,
+ additional firmware volumes may be discovered that may contain addition DXE
+ drivers that can be dispatched by the DXE Core. If a boot device cannot be
+ fully connected, this function calls the DXE Service Dispatch() to allow the
+ DXE drivers from any newly discovered firmware volumes to be dispatched.
+ Then the boot device connection can be attempted again. If the same boot
+ device connection operation fails twice in a row, then that boot device has
+ failed, and should be skipped. This function should never return.
+
+ @param This The EFI_BDS_ARCH_PROTOCOL instance.
+
+ @return None.
+
+**/
+VOID
+EFIAPI
+BdsEntry (
+ IN EFI_BDS_ARCH_PROTOCOL *This
+ )
+{
+ EFI_STATUS Status;
+ UINTN NoHandles;
+ EFI_HANDLE *Buffer;
+ EFI_HANDLE FvHandle;
+ EFI_HANDLE ImageHandle;
+ EFI_HANDLE UsbDeviceHandle;
+ EFI_GUID NameGuid;
+ UINTN Size;
+ UINTN HandleCount;
+ UINTN OldHandleCount;
+ EFI_HANDLE *HandleBuffer;
+ UINTN Index;
+ EFI_DEVICE_PATH_PROTOCOL *LoadImageDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *FileSystemDevicePath;
+
+ PERF_END (NULL, "DXE", NULL, 0);
+ PERF_START (NULL, "BDS", NULL, 0);
+
+
+ //
+ // Now do the EFI stuff
+ //
+ Size = 0x100;
+ gST->FirmwareVendor = AllocateRuntimePool (Size);
+ ASSERT (gST->FirmwareVendor != NULL);
+
+ UnicodeSPrint (gST->FirmwareVendor, Size, L"BeagleBoard EFI %a %a", __DATE__, __TIME__);
+
+ //
+ // Now we need to setup the EFI System Table with information about the console devices.
+ // This code is normally in the console spliter driver on platforms that support multiple
+ // consoles at the same time
+ //
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiSimpleTextOutProtocolGuid, NULL, &NoHandles, &Buffer);
+ if (!EFI_ERROR (Status)) {
+ // Use the first SimpleTextOut we find and update the EFI System Table
+ gST->ConsoleOutHandle = Buffer[0];
+ gST->StandardErrorHandle = Buffer[0];
+ Status = gBS->HandleProtocol (Buffer[0], &gEfiSimpleTextOutProtocolGuid, (VOID **)&gST->ConOut);
+ ASSERT_EFI_ERROR (Status);
+
+ gST->StdErr = gST->ConOut;
+
+ gST->ConOut->OutputString (gST->ConOut, L"BDS: Console Started!!!!\n\r");
+ FreePool (Buffer);
+
+ gConsolePresent = TRUE;
+ }
+
+
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiSimpleTextInProtocolGuid, NULL, &NoHandles, &Buffer);
+ if (!EFI_ERROR (Status)) {
+ // Use the first SimpleTextIn we find and update the EFI System Table
+ gST->ConsoleInHandle = Buffer[0];
+ Status = gBS->HandleProtocol (Buffer[0], &gEfiSimpleTextInProtocolGuid, (VOID **)&gST->ConIn);
+ ASSERT_EFI_ERROR (Status);
+
+ FreePool (Buffer);
+ }
+
+ //
+ // We now have EFI Consoles up and running. Print () will work now. DEBUG () and ASSERT () worked
+ // prior to this point as they were configured to use a more primative output scheme.
+ //
+
+ //
+ //Perform Connect
+ //
+ HandleCount = 0;
+ while (1) {
+ OldHandleCount = HandleCount;
+ Status = gBS->LocateHandleBuffer (
+ AllHandles,
+ NULL,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+
+ if (HandleCount == OldHandleCount) {
+ break;
+ }
+
+ for (Index = 0; Index < HandleCount; Index++) {
+ gBS->ConnectController (HandleBuffer[Index], NULL, NULL, TRUE);
+ }
+ }
+
+ EfiSignalEventReadyToBoot ();
+
+ //Locate handles for SimpleFileSystem protocol
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiSimpleFileSystemProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (!EFI_ERROR(Status)) {
+ for (Index = 0; Index < HandleCount; Index++) {
+ //Get the device path
+ FileSystemDevicePath = DevicePathFromHandle(HandleBuffer[Index]);
+ if (FileSystemDevicePath == NULL) {
+ continue;
+ }
+
+ //Check if UsbIo is on any handles in the device path.
+ Status = gBS->LocateDevicePath(&gEfiUsbIoProtocolGuid, &FileSystemDevicePath, &UsbDeviceHandle);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
+ //Check if Usb stick has a magic EBL file.
+ LoadImageDevicePath = FileDevicePath(HandleBuffer[Index], L"Ebl.efi");
+ Status = gBS->LoadImage (TRUE, gImageHandle, LoadImageDevicePath, NULL, 0, &ImageHandle);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
+ //Boot to Shell on USB stick.
+ Status = gBS->StartImage (ImageHandle, NULL, NULL);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+ }
+ }
+
+ //
+ // Normal UEFI behavior is to process Globally Defined Variables as defined in Chapter 3
+ // (Boot Manager) of the UEFI specification. For this embedded system we don't do this.
+ //
+
+ //
+ // Search all the FVs for an application with a UI Section of Ebl. A .FDF file can be used
+ // to control the names of UI sections in an FV.
+ //
+ Status = FindApplicationMatchingUiSection (L"Ebl", &FvHandle, &NameGuid);
+ if (!EFI_ERROR (Status)) {
+
+ //Boot to Shell.
+ Status = LoadPeCoffSectionFromFv (FvHandle, &NameGuid);
+
+ if (EFI_ERROR(Status)) {
+ DEBUG((EFI_D_ERROR, "Boot from Shell failed. Status: %r\n", Status));
+ }
+ }
+
+ //
+ // EFI does not define the behaviour if all boot attemps fail and the last one returns.
+ // So we make a policy choice to reset the system since this BDS does not have a UI.
+ //
+ gRT->ResetSystem (EfiResetShutdown, Status, 0, NULL);
+
+ return ;
+}
+
+
+EFI_STATUS
+EFIAPI
+BdsInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ mBdsImageHandle = ImageHandle;
+
+ //
+ // Install protocol interface
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mBdsImageHandle,
+ &gEfiBdsArchProtocolGuid, &gBdsProtocol,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
diff --git a/ArmRealViewEbPkg/Bds/BdsEntry.h b/ArmRealViewEbPkg/Bds/BdsEntry.h new file mode 100755 index 0000000000..149acbefc5 --- /dev/null +++ b/ArmRealViewEbPkg/Bds/BdsEntry.h @@ -0,0 +1,66 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __BDS_ENTRY_H__
+#define __BDS_ENTRY_H__
+
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PrintLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/DxeServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/HobLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/PcdLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PrintLib.h>
+#include <Library/PerformanceLib.h>
+
+#include <Protocol/Bds.h>
+#include <Protocol/SerialIo.h>
+#include <Protocol/FirmwareVolume2.h>
+#include <Protocol/SimpleTextIn.h>
+#include <Protocol/SimpleTextOut.h>
+#include <Protocol/EmbeddedDevice.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/SimpleFileSystem.h>
+#include <Protocol/UsbIo.h>
+
+
+EFI_STATUS
+LoadPeCoffSectionFromFv (
+ IN EFI_HANDLE FvHandle,
+ IN EFI_GUID *NameGuid
+ );
+
+EFI_STATUS
+FindApplicationMatchingUiSection (
+ IN CHAR16 *UiString,
+ OUT EFI_HANDLE *FvHandle,
+ OUT EFI_GUID *NameGuid
+ );
+
+VOID
+EFIAPI
+BdsEntry (
+ IN EFI_BDS_ARCH_PROTOCOL *This
+ );
+
+#endif
+
diff --git a/ArmRealViewEbPkg/Bds/FirmwareVolume.c b/ArmRealViewEbPkg/Bds/FirmwareVolume.c new file mode 100755 index 0000000000..142095fa66 --- /dev/null +++ b/ArmRealViewEbPkg/Bds/FirmwareVolume.c @@ -0,0 +1,150 @@ +/** @file
+ The entry of the embedded BDS. This BDS does not follow the Boot Manager requirements
+ of the UEFI specification as it is designed to implement an embedded systmes
+ propriatary boot scheme.
+
+ This template assume a DXE driver produces a SerialIo protocol not using the EFI
+ driver module and it will attempt to connect a console on top of this.
+
+
+ Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BdsEntry.h"
+
+
+EFI_STATUS
+FindApplicationMatchingUiSection (
+ IN CHAR16 *UiString,
+ OUT EFI_HANDLE *FvHandle,
+ OUT EFI_GUID *NameGuid
+ )
+{
+ EFI_STATUS Status;
+ EFI_STATUS NextStatus;
+ UINTN NoHandles;
+ EFI_HANDLE *Buffer;
+ UINTN Index;
+ EFI_FV_FILETYPE FileType;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;
+ VOID *Key;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN UiStringLen;
+ CHAR16 *UiSection;
+ UINT32 Authentication;
+
+
+ UiStringLen = 0;
+ if (UiString != NULL) {
+ DEBUG ((DEBUG_ERROR, "UiString %s\n", UiString));
+ UiStringLen = StrLen (UiString);
+ }
+
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiFirmwareVolume2ProtocolGuid, NULL, &NoHandles, &Buffer);
+ if (!EFI_ERROR (Status)) {
+ for (Index = 0; Index < NoHandles; Index++) {
+ Status = gBS->HandleProtocol (Buffer[Index], &gEfiFirmwareVolume2ProtocolGuid, (VOID **)&Fv);
+ if (!EFI_ERROR (Status)) {
+ Key = AllocatePool (Fv->KeySize);
+ ASSERT (Key != NULL);
+ ZeroMem (Key, Fv->KeySize);
+
+ FileType = EFI_FV_FILETYPE_APPLICATION;
+
+ do {
+ NextStatus = Fv->GetNextFile (Fv, Key, &FileType, NameGuid, &Attributes, &Size);
+ if (!EFI_ERROR (NextStatus)) {
+ if (UiString == NULL) {
+ //
+ // If UiString is NULL match first application we find.
+ //
+ *FvHandle = Buffer[Index];
+ FreePool (Key);
+ return Status;
+ }
+
+ UiSection = NULL;
+ Status = Fv->ReadSection (
+ Fv,
+ NameGuid,
+ EFI_SECTION_USER_INTERFACE,
+ 0,
+ (VOID **)&UiSection,
+ &Size,
+ &Authentication
+ );
+ if (!EFI_ERROR (Status)) {
+ if (StrnCmp (UiString, UiSection, UiStringLen) == 0) {
+ //
+ // We found a UiString match.
+ //
+ *FvHandle = Buffer[Index];
+ FreePool (Key);
+ FreePool (UiSection);
+ return Status;
+ }
+ FreePool (UiSection);
+ }
+ }
+ } while (!EFI_ERROR (NextStatus));
+
+ FreePool (Key);
+ }
+ }
+
+ FreePool (Buffer);
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+
+EFI_DEVICE_PATH *
+FvFileDevicePath (
+ IN EFI_HANDLE FvHandle,
+ IN EFI_GUID *NameGuid
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH NewNode;
+
+ DevicePath = DevicePathFromHandle (FvHandle);
+
+ EfiInitializeFwVolDevicepathNode (&NewNode, NameGuid);
+
+ return AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&NewNode);
+}
+
+
+
+EFI_STATUS
+LoadPeCoffSectionFromFv (
+ IN EFI_HANDLE FvHandle,
+ IN EFI_GUID *NameGuid
+ )
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_HANDLE ImageHandle;
+
+ DevicePath = FvFileDevicePath (FvHandle, NameGuid);
+
+ Status = gBS->LoadImage (TRUE, gImageHandle, DevicePath, NULL, 0, &ImageHandle);
+ if (!EFI_ERROR (Status)) {
+ PERF_END (NULL, "BDS", NULL, 0);
+ Status = gBS->StartImage (ImageHandle, NULL, NULL);
+ }
+
+ return Status;
+}
+
diff --git a/ArmRealViewEbPkg/Debugger_scripts/EBLoadSecSyms.inc b/ArmRealViewEbPkg/Debugger_scripts/EBLoadSecSyms.inc new file mode 100755 index 0000000000..c2df81b23e --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/EBLoadSecSyms.inc @@ -0,0 +1,16 @@ +// returns the base address of the SEC FV in flash on the EB board
+// change this address for where your platform's SEC FV is located
+// (or make it more intelligent to search for it)
+define /r FindFv()
+{
+ return 0x40000000;
+}
+.
+
+include /s 'ZZZZZZ/ArmRealViewEbPkg/Debugger_scripts/EfiFuncs.inc'
+error=continue
+unload ,all
+error=abort
+LoadPeiSec()
+include C:\loadfiles.inc
+
diff --git a/ArmRealViewEbPkg/Debugger_scripts/EfiFuncs.inc b/ArmRealViewEbPkg/Debugger_scripts/EfiFuncs.inc new file mode 100755 index 0000000000..0bbe045a96 --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/EfiFuncs.inc @@ -0,0 +1,463 @@ +error=abort
+
+// NOTE: THIS MAY NEED TO BE ADJUSTED
+// change to reflect the total amount of ram in your system
+define /r GetMaxMem()
+{
+ return 0x10000000; // 256 MB
+}
+.
+
+define /r GetWord(Addr)
+{
+ unsigned long data;
+
+ if( (Addr & 0x2) == 0 )
+ {
+ data = dword(Addr);
+ data = data & 0xffff;
+ //$printf "getword data is %x\n", data$;
+ return data;
+ }
+ else
+ {
+ data = dword(Addr & 0xfffffffc);
+ //data = data >> 16;
+ data = data / 0x10000;
+ //$printf "getword data is %x (1)\n", data$;
+ return data;
+ }
+}
+.
+
+define /r ProcessPE32(imgstart)
+unsigned long imgstart;
+{
+ unsigned long filehdrstart;
+ unsigned long debugdirentryrva;
+ unsigned long debugtype;
+ unsigned long debugrva;
+ unsigned long dwarfsig;
+ unsigned long baseofcode;
+ unsigned long baseofdata;
+ unsigned long elfbase;
+ char *elfpath;
+
+ $printf "PE32 image found at %x",imgstart$;
+
+ //$printf "PE file hdr offset %x",dword(imgstart+0x3C)$;
+
+ // offset from dos hdr to PE file hdr
+ filehdrstart = imgstart + dword(imgstart+0x3C);
+
+ // offset to debug dir in PE hdrs
+ //$printf "debug dir is at %x",(filehdrstart+0xA8)$;
+ debugdirentryrva = dword(filehdrstart + 0xA8);
+ if(debugdirentryrva == 0)
+ {
+ $printf "no debug dir for image at %x",imgstart$;
+ return;
+ }
+
+ //$printf "debug dir entry rva is %x",debugdirentryrva$;
+
+ debugtype = dword(imgstart + debugdirentryrva + 0xc);
+ if( (debugtype != 0xdf) && (debugtype != 0x2) )
+ {
+ $printf "debug type is not dwarf for image at %x",imgstart$;
+ $printf "debug type is %x",debugtype$;
+ return;
+ }
+
+ debugrva = dword(imgstart + debugdirentryrva + 0x14);
+ dwarfsig = dword(imgstart + debugrva);
+ if(dwarfsig != 0x66727764)
+ {
+ $printf "dwarf debug signature not found for image at %x",imgstart$;
+ return;
+ }
+
+ elfpath = (char *)(imgstart + debugrva + 0xc);
+
+ baseofcode = imgstart + dword(filehdrstart + 0x28);
+ baseofdata = imgstart + dword(filehdrstart + 0x2c);
+
+ if( (baseofcode < baseofdata) && (baseofcode != 0) )
+ {
+ elfbase = baseofcode;
+ }
+ else
+ {
+ elfbase = baseofdata;
+ }
+
+ $printf "found path %s",elfpath$;
+ $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$;
+}
+.
+
+define /r ProcessTE(imgstart)
+unsigned long imgstart;
+{
+ unsigned long strippedsize;
+ unsigned long debugdirentryrva;
+ unsigned long debugtype;
+ unsigned long debugrva;
+ unsigned long dwarfsig;
+ unsigned long elfbase;
+ char *elfpath;
+
+ $printf "TE image found at %x",imgstart$;
+
+ // determine pe header bytes removed to account for in rva references
+ //strippedsize = word(imgstart + 0x6);
+ //strippedsize = (dword(imgstart + 0x4) & 0xffff0000) >> 16;
+ strippedsize = (dword(imgstart + 0x4) & 0xffff0000) / 0x10000;
+ strippedsize = strippedsize - 0x28;
+
+ debugdirentryrva = dword(imgstart + 0x20);
+ if(debugdirentryrva == 0)
+ {
+ $printf "no debug dir for image at %x",imgstart$;
+ return;
+ }
+ debugdirentryrva = debugdirentryrva - strippedsize;
+
+ //$printf "debug dir entry rva is %x",debugdirentryrva$;
+
+ debugtype = dword(imgstart + debugdirentryrva + 0xc);
+ if( (debugtype != 0xdf) && (debugtype != 0x2) )
+ {
+ $printf "debug type is not dwarf for image at %x",imgstart$;
+ $printf "debug type is %x",debugtype$;
+ return;
+ }
+
+ debugrva = dword(imgstart + debugdirentryrva + 0x14);
+ debugrva = debugrva - strippedsize;
+ dwarfsig = dword(imgstart + debugrva);
+ if( (dwarfsig != 0x66727764) && (dwarfsig != 0x3031424e) )
+ {
+ $printf "dwarf debug signature not found for image at %x",imgstart$;
+ $printf "found %x", dwarfsig$;
+ return;
+ }
+
+ if( dwarfsig == 0x66727764 )
+ {
+ elfpath = (char *)(imgstart + debugrva + 0xc);
+ $printf "looking for elf path at 0x%x", elfpath$;
+ }
+ else
+ {
+ elfpath = (char *)(imgstart + debugrva + 0x10);
+ $printf "looking for elf path at 0x%x", elfpath$;
+ }
+
+ // elf base is baseofcode (we hope that for TE images it's not baseofdata)
+ elfbase = imgstart + dword(imgstart + 0xc) - strippedsize;
+
+ $printf "found path %s",elfpath$;
+ $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$;
+}
+.
+
+define /r ProcessFvSection(secstart)
+unsigned long secstart;
+{
+ unsigned long sectionsize;
+ unsigned char sectiontype;
+
+ sectionsize = dword(secstart);
+ //sectiontype = (sectionsize & 0xff000000) >> 24;
+ sectiontype = (sectionsize & 0xff000000) / 0x1000000;
+ sectionsize = sectionsize & 0x00ffffff;
+
+ $printf "fv section at %x size %x type %x",secstart,sectionsize,sectiontype$;
+
+ if(sectiontype == 0x10) // PE32
+ {
+ ProcessPE32(secstart+0x4);
+ }
+ else if(sectiontype == 0x12) // TE
+ {
+ ProcessTE(secstart+0x4);
+ }
+}
+.
+
+define /r ProcessFfsFile(ffsfilestart)
+unsigned long ffsfilestart;
+{
+ unsigned long ffsfilesize;
+ unsigned long ffsfiletype;
+ unsigned long secoffset;
+ unsigned long secsize;
+
+ //ffsfiletype = byte(ffsfilestart + 0x12);
+ ffsfilesize = dword(ffsfilestart + 0x14);
+ //ffsfiletype = (ffsfilesize & 0xff000000) >> 24;
+ ffsfiletype = (ffsfilesize & 0xff000000) / 0x1000000;
+ ffsfilesize = ffsfilesize & 0x00ffffff;
+
+ if(ffsfiletype == 0xff) return;
+
+ $printf "ffs file at %x size %x type %x",ffsfilestart,ffsfilesize,ffsfiletype$;
+
+ secoffset = ffsfilestart + 0x18;
+
+ // loop through sections in file
+ while(secoffset < (ffsfilestart + ffsfilesize))
+ {
+ // process fv section and increment section offset by size
+ secsize = dword(secoffset) & 0x00ffffff;
+ ProcessFvSection(secoffset);
+ secoffset = secoffset + secsize;
+
+ // align to next 4 byte boundary
+ if( (secoffset & 0x3) != 0 )
+ {
+ secoffset = secoffset + (0x4 - (secoffset & 0x3));
+ }
+ } // end section loop
+}
+.
+
+define /r LoadPeiSec()
+{
+ unsigned long fvbase;
+ unsigned long fvlen;
+ unsigned long fvsig;
+ unsigned long ffsoffset;
+ unsigned long ffsfilesize;
+
+ fvbase = FindFv();
+ $printf "fvbase %x",fvbase$;
+
+ // get fv signature field
+ fvsig = dword(fvbase + 0x28);
+ if(fvsig != 0x4856465F)
+ {
+ $printf "FV does not have proper signature, exiting"$;
+ return 0;
+ }
+
+ $printf "FV signature found"$;
+
+ $fopen 50, 'C:\loadfiles.inc'$;
+
+ fvlen = dword(fvbase + 0x20);
+
+ // first ffs file is after fv header, use headerlength field
+ //ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) >> 16;
+ ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) / 0x10000;
+ ffsoffset = fvbase + GetWord(fvbase + 0x30);
+
+ // loop through ffs files
+ while(ffsoffset < (fvbase+fvlen))
+ {
+ // process ffs file and increment by ffs file size field
+ ProcessFfsFile(ffsoffset);
+ ffsfilesize = (dword(ffsoffset + 0x14) & 0x00ffffff);
+ if(ffsfilesize == 0)
+ {
+ break;
+ }
+ ffsoffset = ffsoffset + ffsfilesize;
+
+
+ // align to next 8 byte boundary
+ if( (ffsoffset & 0x7) != 0 )
+ {
+ ffsoffset = ffsoffset + (0x8 - (ffsoffset & 0x7));
+ }
+
+ } // end fv ffs loop
+
+ $vclose 50$;
+
+}
+.
+
+define /r FindSystemTable(TopOfRam)
+unsigned long TopOfRam;
+{
+ unsigned long offset;
+
+ $printf "FindSystemTable"$;
+ $printf "top of mem is %x",TopOfRam$;
+
+ offset = TopOfRam;
+
+ // align to highest 4MB boundary
+ offset = offset & 0xFFC00000;
+
+ // start at top and look on 4MB boundaries for system table ptr structure
+ while(offset > 0)
+ {
+ //$printf "checking %x",offset$;
+ //$printf "value is %x",dword(offset)$;
+
+ // low signature match
+ if(dword(offset) == 0x20494249)
+ {
+ // high signature match
+ if(dword(offset+4) == 0x54535953)
+ {
+ // less than 4GB?
+ if(dword(offset+0x0c) == 0)
+ {
+ // less than top of ram?
+ if(dword(offset+8) < TopOfRam)
+ {
+ return(dword(offset+8));
+ }
+ }
+ }
+
+ }
+
+ if(offset < 0x400000) break;
+ offset = offset - 0x400000;
+ }
+
+ return 0;
+}
+.
+
+define /r ProcessImage(ImageBase)
+unsigned long ImageBase;
+{
+ $printf "ProcessImage %x", ImageBase$;
+}
+.
+
+define /r FindDebugInfo(SystemTable)
+unsigned long SystemTable;
+{
+ unsigned long CfgTableEntries;
+ unsigned long ConfigTable;
+ unsigned long i;
+ unsigned long offset;
+ unsigned long dbghdr;
+ unsigned long dbgentries;
+ unsigned long dbgptr;
+ unsigned long dbginfo;
+ unsigned long loadedimg;
+
+ $printf "FindDebugInfo"$;
+
+ dbgentries = 0;
+ CfgTableEntries = dword(SystemTable + 0x40);
+ ConfigTable = dword(SystemTable + 0x44);
+
+ $printf "config table is at %x (%d entries)", ConfigTable, CfgTableEntries$;
+
+ // now search for debug info entry with guid 49152E77-1ADA-4764-B7A2-7AFEFED95E8B
+ // 0x49152E77 0x47641ADA 0xFE7AA2B7 0x8B5ED9FE
+ for(i=0; i<CfgTableEntries; i++)
+ {
+ offset = ConfigTable + (i*0x14);
+ if(dword(offset) == 0x49152E77)
+ {
+ if(dword(offset+4) == 0x47641ADA)
+ {
+ if(dword(offset+8) == 0xFE7AA2B7)
+ {
+ if(dword(offset+0xc) == 0x8B5ED9FE)
+ {
+ dbghdr = dword(offset+0x10);
+ dbgentries = dword(dbghdr + 4);
+ dbgptr = dword(dbghdr + 8);
+ }
+ }
+ }
+ }
+ }
+
+ if(dbgentries == 0)
+ {
+ $printf "no debug entries found"$;
+ return;
+ }
+
+ $printf "debug table at %x (%d entries)", dbgptr, dbgentries$;
+
+ for(i=0; i<dbgentries; i++)
+ {
+ dbginfo = dword(dbgptr + (i*4));
+ if(dbginfo != 0)
+ {
+ if(dword(dbginfo) == 1) // normal debug info type
+ {
+ loadedimg = dword(dbginfo + 4);
+ ProcessPE32(dword(loadedimg + 0x20));
+ }
+ }
+ }
+}
+.
+
+define /r LoadDxe()
+{
+ unsigned long maxmem;
+ unsigned long systbl;
+
+ $printf "LoadDxe"$;
+
+ $fopen 50, 'C:\loadfiles.inc'$;
+
+ maxmem = GetMaxMem();
+ systbl = FindSystemTable(maxmem);
+ if(systbl != 0)
+ {
+ $printf "found system table at %x",systbl$;
+ FindDebugInfo(systbl);
+ }
+
+ $vclose 50$;
+}
+.
+
+define /r LoadRuntimeDxe()
+
+{
+ unsigned long maxmem;
+ unsigned long SystemTable;
+ unsigned long CfgTableEntries;
+ unsigned long ConfigTable;
+ unsigned long i;
+ unsigned long offset;
+ unsigned long numentries;
+ unsigned long RuntimeDebugInfo;
+ unsigned long DebugInfoOffset;
+ unsigned long imgbase;
+
+ $printf "LoadRuntimeDxe"$;
+
+ $fopen 50, 'C:\loadfiles.inc'$;
+
+ RuntimeDebugInfo = 0x80000010;
+
+ if(RuntimeDebugInfo != 0)
+ {
+ numentries = dword(RuntimeDebugInfo);
+
+ $printf "runtime debug info is at %x (%d entries)", RuntimeDebugInfo, numentries$;
+
+ DebugInfoOffset = RuntimeDebugInfo + 0x4;
+ for(i=0; i<numentries; i++)
+ {
+ imgbase = dword(DebugInfoOffset);
+ if(imgbase != 0)
+ {
+ $printf "found image at %x",imgbase$;
+ ProcessPE32(imgbase);
+ }
+ DebugInfoOffset = DebugInfoOffset + 0x4;
+ }
+ }
+
+ $vclose 50$;
+}
+.
diff --git a/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc b/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc new file mode 100755 index 0000000000..6299a84799 --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc @@ -0,0 +1,21 @@ +// +// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +error = continue +unload +error = abort + +setreg @CP15_CONTROL = 0x0005107E +setreg @pc=0x80008208 +setreg @cpsr=0x000000D3 +dis/D +readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000 + diff --git a/ArmRealViewEbPkg/Debugger_scripts/rvi_convert_symbols.sh b/ArmRealViewEbPkg/Debugger_scripts/rvi_convert_symbols.sh new file mode 100755 index 0000000000..67fdfe1efa --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/rvi_convert_symbols.sh @@ -0,0 +1,23 @@ +#!/bin/sh
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http:#opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+
+IN=`/usr/bin/cygpath -u $1`
+OUT=`/usr/bin/cygpath -u $2`
+
+/usr/bin/sed -e "s/\/cygdrive\/\(.\)/load\/a\/ni\/np \"\1:/g" \
+ -e 's:\\:/:g' \
+ -e "s/^/load\/a\/ni\/np \"/g" \
+ -e "s/dll /dll\" \&/g" \
+ $IN | /usr/bin/sort.exe --key=3 --output=$OUT
+
diff --git a/ArmRealViewEbPkg/Debugger_scripts/rvi_dummy.axf b/ArmRealViewEbPkg/Debugger_scripts/rvi_dummy.axf Binary files differnew file mode 100755 index 0000000000..17fabaa6cc --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/rvi_dummy.axf diff --git a/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc b/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc new file mode 100755 index 0000000000..ea5f8ec15f --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc @@ -0,0 +1,67 @@ +// +// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// + +error = continue +unload +error = abort + +setreg @CP15_CONTROL = 0x0005107E +setreg @cpsr=0x000000D3 + +; General clock settings. +setmem /32 0x48307270=0x00000080 +setmem /32 0x48306D40=0x00000003 +setmem /32 0x48005140=0x03020A50 + +;Clock configuration +setmem /32 0x48004A40=0x0000030A +setmem /32 0x48004C40=0x00000015 + +;DPLL3 (Core) settings +setmem /32 0x48004D00=0x00370037 +setmem /32 0x48004D30=0x00000000 +setmem /32 0x48004D40=0x094C0C00 + +;DPLL4 (Peripheral) settings +setmem /32 0x48004D00=0x00370037 +setmem /32 0x48004D30=0x00000000 +setmem /32 0x48004D44=0x0001B00C +setmem /32 0x48004D48=0x00000009 + +;DPLL1 (MPU) settings +setmem /32 0x48004904=0x00000037 +setmem /32 0x48004934=0x00000000 +setmem /32 0x48004940=0x0011F40C +setmem /32 0x48004944=0x00000001 +setmem /32 0x48004948=0x00000000 + +;RAM setup. +setmem /16 0x6D000010=0x0000 +setmem /16 0x6D000040=0x0001 +setmem /16 0x6D000044=0x0100 +setmem /16 0x6D000048=0x0000 +setmem /32 0x6D000060=0x0000000A +setmem /32 0x6D000070=0x00000081 +setmem /16 0x6D000040=0x0003 +setmem /32 0x6D000080=0x02D04011 +setmem /16 0x6D000084=0x0032 +setmem /16 0x6D00008C=0x0000 +setmem /32 0x6D00009C=0xBA9DC4C6 +setmem /32 0x6D0000A0=0x00012522 +setmem /32 0x6D0000A4=0x0004E201 +setmem /16 0x6D000040=0x0003 +setmem /32 0x6D0000B0=0x02D04011 +setmem /16 0x6D0000B4=0x0032 +setmem /16 0x6D0000BC=0x0000 +setmem /32 0x6D0000C4=0xBA9DC4C6 +setmem /32 0x6D0000C8=0x00012522 +setmem /32 0x6D0000D4=0x0004E201
\ No newline at end of file diff --git a/ArmRealViewEbPkg/Debugger_scripts/rvi_load_symbols.inc b/ArmRealViewEbPkg/Debugger_scripts/rvi_load_symbols.inc new file mode 100755 index 0000000000..e093ccbcb2 --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/rvi_load_symbols.inc @@ -0,0 +1,23 @@ +//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+include 'ZZZZZZ/rvi_symbols_macros.inc'
+
+macro write_symbols_file("ZZZZZZ/rvi_symbols.tmp", 0x00000000, 0x10000000)
+
+host "bash -o igncr ZZZZZZ/rvi_convert_symbols.sh ZZZZZZ/rvi_symbols.tmp ZZZZZZ/rvi_symbols.inc"
+include 'ZZZZZZ/rvi_symbols.inc'
+load /NI /NP 'ZZZZZZ/rvi_dummy.axf' ;.constdata
+unload rvi_dummy.axf
+delfile rvi_dummy.axf
+
+
diff --git a/ArmRealViewEbPkg/Debugger_scripts/rvi_symbols_macros.inc b/ArmRealViewEbPkg/Debugger_scripts/rvi_symbols_macros.inc new file mode 100755 index 0000000000..97d465eaf2 --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/rvi_symbols_macros.inc @@ -0,0 +1,194 @@ +//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+define /R int compare_guid(guid1, guid2)
+ unsigned char *guid1;
+ unsigned char *guid2;
+{
+ return strncmp(guid1, guid2, 16);
+}
+.
+
+define /R unsigned char * find_system_table(mem_start, mem_size)
+ unsigned char *mem_start;
+ unsigned long mem_size;
+{
+ unsigned char *mem_ptr;
+
+ mem_ptr = mem_start + mem_size;
+
+ do
+ {
+ mem_ptr -= 0x400000; // 4 MB
+
+ if (strncmp(mem_ptr, "IBI SYST", 8) == 0)
+ {
+ return *(unsigned long *)(mem_ptr + 8); // EfiSystemTableBase
+ }
+
+ } while (mem_ptr > mem_start);
+
+ return 0;
+}
+.
+
+define /R unsigned char * find_debug_info_table_header(system_table)
+ unsigned char *system_table;
+{
+ unsigned long configuration_table_entries;
+ unsigned char *configuration_table;
+ unsigned long index;
+ unsigned char debug_table_guid[16];
+
+ // Fill in the debug table's guid
+ debug_table_guid[ 0] = 0x77;
+ debug_table_guid[ 1] = 0x2E;
+ debug_table_guid[ 2] = 0x15;
+ debug_table_guid[ 3] = 0x49;
+ debug_table_guid[ 4] = 0xDA;
+ debug_table_guid[ 5] = 0x1A;
+ debug_table_guid[ 6] = 0x64;
+ debug_table_guid[ 7] = 0x47;
+ debug_table_guid[ 8] = 0xB7;
+ debug_table_guid[ 9] = 0xA2;
+ debug_table_guid[10] = 0x7A;
+ debug_table_guid[11] = 0xFE;
+ debug_table_guid[12] = 0xFE;
+ debug_table_guid[13] = 0xD9;
+ debug_table_guid[14] = 0x5E;
+ debug_table_guid[15] = 0x8B;
+
+ configuration_table_entries = *(unsigned long *)(system_table + 64);
+ configuration_table = *(unsigned long *)(system_table + 68);
+
+ for (index = 0; index < configuration_table_entries; index++)
+ {
+ if (compare_guid(configuration_table, debug_table_guid) == 0)
+ {
+ return *(unsigned long *)(configuration_table + 16);
+ }
+
+ configuration_table += 20;
+ }
+
+ return 0;
+}
+.
+
+define /R int valid_pe_header(header)
+ unsigned char *header;
+{
+ if ((header[0x00] == 'M') &&
+ (header[0x01] == 'Z') &&
+ (header[0x80] == 'P') &&
+ (header[0x81] == 'E'))
+ {
+ return 1;
+ }
+
+ return 0;
+}
+.
+
+define /R unsigned long pe_headersize(header)
+ unsigned char *header;
+{
+ unsigned long *size;
+
+ size = header + 0x00AC;
+
+ return *size;
+}
+.
+
+define /R unsigned char *pe_filename(header)
+ unsigned char *header;
+{
+ unsigned long *debugOffset;
+ unsigned char *stringOffset;
+
+ if (valid_pe_header(header))
+ {
+ debugOffset = header + 0x0128;
+ stringOffset = header + *debugOffset + 0x002C;
+
+ return stringOffset;
+ }
+
+ return 0;
+}
+.
+
+define /R int char_is_valid(c)
+ unsigned char c;
+{
+ if (c >= 32 && c < 127)
+ return 1;
+
+ return 0;
+}
+.
+
+define /R write_symbols_file(filename, mem_start, mem_size)
+ unsigned char *filename;
+ unsigned char *mem_start;
+ unsigned long mem_size;
+{
+ unsigned char *system_table;
+ unsigned char *debug_info_table_header;
+ unsigned char *debug_info_table;
+ unsigned long debug_info_table_size;
+ unsigned long index;
+ unsigned char *debug_image_info;
+ unsigned char *loaded_image_protocol;
+ unsigned char *image_base;
+ unsigned char *debug_filename;
+ unsigned long header_size;
+ int status;
+
+ system_table = find_system_table(mem_start, mem_size);
+ if (system_table == 0)
+ {
+ return;
+ }
+
+ status = fopen(88, filename, "w");
+
+ debug_info_table_header = find_debug_info_table_header(system_table);
+
+ debug_info_table = *(unsigned long *)(debug_info_table_header + 8);
+ debug_info_table_size = *(unsigned long *)(debug_info_table_header + 4);
+
+ for (index = 0; index < (debug_info_table_size * 4); index += 4)
+ {
+ debug_image_info = *(unsigned long *)(debug_info_table + index);
+
+ if (debug_image_info == 0)
+ {
+ break;
+ }
+
+ loaded_image_protocol = *(unsigned long *)(debug_image_info + 4);
+
+ image_base = *(unsigned long *)(loaded_image_protocol + 32);
+
+ debug_filename = pe_filename(image_base);
+ header_size = pe_headersize(image_base);
+
+ $fprintf 88, "%s 0x%08x\n", debug_filename, image_base + header_size$;
+ }
+
+
+ fclose(88);
+}
+.
+
diff --git a/ArmRealViewEbPkg/Debugger_scripts/rvi_unload_symbols.inc b/ArmRealViewEbPkg/Debugger_scripts/rvi_unload_symbols.inc new file mode 100755 index 0000000000..f85f442c9c --- /dev/null +++ b/ArmRealViewEbPkg/Debugger_scripts/rvi_unload_symbols.inc @@ -0,0 +1,118 @@ +//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+error = continue
+
+unload
+
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+delfile 1
+
+error = abort
diff --git a/ArmRealViewEbPkg/Include/ArmEb/ArmEb.h b/ArmRealViewEbPkg/Include/ArmEb/ArmEb.h new file mode 100755 index 0000000000..4eb0dec342 --- /dev/null +++ b/ArmRealViewEbPkg/Include/ArmEb/ArmEb.h @@ -0,0 +1,102 @@ +/*++
+
+Copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+--*/
+
+#ifndef __ARM_EB_H__
+#define __ARM_EB_H__
+
+#include <ArmEb/ArmEbUart.h>
+#include <ArmEb/ArmEbTimer.h>
+
+///
+/// ARM EB Memory Map
+///
+// 0x00000000 - 0x0FFFFFFF SDRAM 256MB
+// 0x10000000 - 0x100FFFFF System FPGA (config registers) 1MB
+// 0x10000000–0x10000FFF 4KB System registers
+// 0x10001000–0x10001FFF 4KB System controller
+// 0x10002000–0x10002FFF 4KB Two-Wire Serial Bus Interface
+// 0x10003000–0x10003FFF 4KB Reserved
+// 0x10004000–0x10004FFF 4KB Advanced Audio CODEC Interface
+// 0x10005000–0x10005FFF 4KB MultiMedia Card Interface (MCI)
+// 0x10006000–0x10006FFF 4KB Keyboard/Mouse Interface 0
+// 0x10007000–0x10007FFF 4KB Keyboard/Mouse Interface 1
+// 0x10008000–0x10008FFF 4KB Character LCD Interface
+// 0x10009000–0x10009FFF 4KB UART 0 Interface
+// 0x1000A000–0x1000AFFF 4KB UART 1 Interface
+// 0x1000B000–0x1000BFFF 4KB UART 2 Interface
+// 0x1000C000–0x1000CFFF 4KB UART 3 Interface
+// 0x1000D000–0x1000DFFF 4KB Synchronous Serial Port Interface
+// 0x1000E000–0x1000EFFF 4KB Smart Card Interface
+// 0x1000F000–0x1000FFFF 4KB Reserved
+// 0x10010000–0x10010FFF 4KB Watchdog Interface
+// 0x10011000–0x10011FFF 4KB Timer modules 0 and 1 interface (Timer 1 starts at 0x10011020)
+// 0x10012000–0x10012FFF 4KB Timer modules 2 and 3 interface (Timer 3 starts at 0x10012020)
+// 0x10013000–0x10013FFF 4KB GPIO Interface 0
+// 0x10014000–0x10014FFF 4KB GPIO Interface 1
+// 0x10015000–0x10015FFF 4KB GPIO Interface 2 (miscellaneous onboard I/O)
+// 0x10016000–0x10016FFF 4KB Reserved
+// 0x10017000–0x10017FFF 4KB Real Time Clock Interface
+// 0x10018000–0x10018FFF 4KB Dynamic Memory Controller configuration
+// 0x10019000–0x10019FFF 4KB PCI controller configuration registers
+// 0x1001A000–0x1001FFFF 24KB Reserved
+// 0x10020000–0x1002FFFF 64KB Color LCD Controller
+// 0x10030000–0x1003FFFF 64KB DMA Controller configuration registers
+// 0x10040000–0x1004FFFF 64KB Generic Interrupt Controller 1 (nIRQ for tile 1)
+// 0x10050000–0x1005FFFF 64KB Generic Interrupt Controller 2 (nFIQ for tile 1)
+// 0x10060000–0x1006FFFF 64KB Generic Interrupt Controller 3 (nIRQ for tile 2)
+// 0x10070000–0x1007FFFF 64KB Generic Interrupt Controller 4 (nFIQ for tile 2)
+// 0x10080000–0x1008FFFF 64KB Static Memory Controller configuration registers
+// 0x100A0000–0x100EFFFF 448MB Reserved
+// 0x10090000–0x100FFFFF 64KB Debug Access Port (DAP)
+// 0x10100000 - 0x100FFFFF Reserved 3MB
+// 0x10400000 - 0x17FFFFFF System FPGA 124MB
+// 0x18000000 - 0x1FFFFFFF Logic Tile 1 128MB
+// 0x20000000 - 0x3FFFFFFF Reserved 512MB
+// 0x40000000 - 0x7FFFFFFF System FPGA 1GB
+// 0x40000000–0x43FFFFFF CS0 NOR flash (nNOR_CS1)
+// 0x44000000–0x47FFFFFF CS1 NOR flash (nNOR_CS2)
+// 0x48000000–0x4BFFFFFF CS2 SRAM (nSRAMCS)
+// 0x4C000000–0x4DFFFFFF CS3 Config flash
+// 0x4E000000–0x4EFFFFFF Ethernet
+// 0x4F000000–0x4FFFFFFF USB
+// 0x50000000–0x53FFFFFF CS4 (nEXPCS) PISMO (nCS0)
+// 0x54000000–0x57FFFFFF CS5 (nSTATICCS4) PISMO (nCS1)
+// 0x58000000–0x5BFFFFFF CS6 (nSTATICCS5) PISMO (nCS2)
+// 0x5C000000–0x5FFFFFFF CS7 (nSTATICCS6) PISMO (nCS3)
+// 0x61000000–0x61FFFFFF PCI SelfCfg window
+// 0x62000000–0x62FFFFFF PCI Cfg window
+// 0x63000000–0x63FFFFFF PCI I/O window
+// 0x64000000–0x67FFFFFF PCI memory window 0
+// 0x68000000–0x6BFFFFFF PCI memory window 1
+// 0x6C000000–0x6FFFFFFF PCI memory window 2
+// 0x70000000 - 0x7FFFFFFF DRAM Mirror
+// 0x80000000 - 0xFFFFFFFF Logic Tile site 2 2GB
+
+//
+// At reset EB_DRAM_BASE is alaised to EB_CS0_NOR_BASE
+//
+#define EB_DRAM_BASE 0x00000000 // 256 MB DRAM
+#define EB_CONFIG_BASE 0x10000000
+
+#define EB_CSO_NOR_BASE 0x40000000 // 64 MB NOR FLASH
+#define EB_CS1_NOR_BASE 0x44000000 // 64 MB NOR FLASH
+#define EB_CS2_SRAM 0x48000000 // 2 MB of SRAM
+#define EB_CS3_CONFIG_FLASH 0x4c000000 // 8 MB Config FLASH for FPGA. Not to be used by application code
+#define EB_CS3_ETHERNET 0x4e000000 // 16 MB Ethernet controller
+#define EB_CS4_PISMO_CS0 0x50000000 // Expansion CS0
+#define EB_CS5_PISMO_CS0 0x54000000 // Expansion CS0
+#define EB_CS6_PISMO_CS0 0x58000000 // Expansion CS0
+
+#define EB_DRAM_REMAP_BASE 0x70000000 // if REMAPSTAT is HIGH alais of EB_DRAM_BASE
+
+#endif
diff --git a/ArmRealViewEbPkg/Include/ArmEb/ArmEbTimer.h b/ArmRealViewEbPkg/Include/ArmEb/ArmEbTimer.h new file mode 100755 index 0000000000..008a6bee5b --- /dev/null +++ b/ArmRealViewEbPkg/Include/ArmEb/ArmEbTimer.h @@ -0,0 +1,78 @@ +/*++
+
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ Timer.h
+
+Abstract:
+
+ Driver implementing the EFI 2.0 timer protocol using the ARM SP804 timer.
+
+--*/
+
+#ifndef _TIMER_SP804_H__
+#define _TIMER_SP804_H__
+
+
+
+// EB board constants
+#define EB_SP810_CTRL_BASE 0x10001000
+#define EB_SP804_TIMER0_BASE 0x10011000
+#define EB_SP804_TIMER1_BASE 0x10011020
+#define EB_SP804_TIMER2_BASE 0x10012000
+#define EB_SP804_TIMER3_BASE 0x10012020
+
+#define EB_TIMER01_INTERRUPT_NUM 36
+#define EB_TIMER23_INTERRUPT_NUM 37
+
+// SP804 Timer constants
+#define SP804_TIMER_LOAD_REG 0x00
+#define SP804_TIMER_CURRENT_REG 0x04
+#define SP804_TIMER_CONTROL_REG 0x08
+#define SP804_TIMER_INT_CLR_REG 0x0C
+#define SP804_TIMER_RAW_INT_STS_REG 0x10
+#define SP804_TIMER_MSK_INT_STS_REG 0x14
+#define SP804_TIMER_BG_LOAD_REG 0x18
+
+// Timer control register bit definitions
+#define SP804_TIMER_CTRL_ONESHOT BIT0
+#define SP804_TIMER_CTRL_32BIT BIT1
+#define SP804_TIMER_CTRL_PRESCALE_MASK (BIT3|BIT2)
+#define SP804_PRESCALE_DIV_1 0
+#define SP804_PRESCALE_DIV_16 BIT2
+#define SP804_PRESCALE_DIV_256 BIT3
+#define SP804_TIMER_CTRL_INT_ENABLE BIT5
+#define SP804_TIMER_CTRL_PERIODIC BIT6
+#define SP804_TIMER_CTRL_ENABLE BIT7
+
+// SP810 System Controller constants
+#define SP810_SYS_CTRL_REG 0x00
+#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=REFCLK, 1=TIMCLK
+#define SP810_SYS_CTRL_TIMER0_EN BIT16
+#define SP810_SYS_CTRL_TIMER1_TIMCLK BIT17 // 0=REFCLK, 1=TIMCLK
+#define SP810_SYS_CTRL_TIMER1_EN BIT18
+#define SP810_SYS_CTRL_TIMER2_TIMCLK BIT19 // 0=REFCLK, 1=TIMCLK
+#define SP810_SYS_CTRL_TIMER2_EN BIT20
+#define SP810_SYS_CTRL_TIMER3_TIMCLK BIT21 // 0=REFCLK, 1=TIMCLK
+#define SP810_SYS_CTRL_TIMER3_EN BIT22
+
+// default timer tick period - 1ms, or 10000 units of 100ns
+//#define TIMER_DEFAULT_PERIOD 10000
+
+// default timer tick period - 50ms, or 500000 units of 100ns
+#define TIMER_DEFAULT_PERIOD 500000
+
+// default timer tick period - 500ms, or 5000000 units of 100ns
+//#define TIMER_DEFAULT_PERIOD 5000000
+
+#endif
+
diff --git a/ArmRealViewEbPkg/Include/ArmEb/ArmEbUart.h b/ArmRealViewEbPkg/Include/ArmEb/ArmEbUart.h new file mode 100755 index 0000000000..642b83ac4c --- /dev/null +++ b/ArmRealViewEbPkg/Include/ArmEb/ArmEbUart.h @@ -0,0 +1,75 @@ +/*++
+
+Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Portions copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+--*/
+
+#ifndef __ARM_EB_UART_H__
+#define __ARM_EB_UART_H__
+
+
+#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds
+
+
+// EB constants
+#define EB_UART1_BASE 0x10009000
+
+// PL011 Registers
+#define UARTDR 0x000
+#define UARTRSR 0x004
+#define UARTECR 0x004
+#define UARTFR 0x018
+#define UARTILPR 0x020
+#define UARTIBRD 0x024
+#define UARTFBRD 0x028
+#define UARTLCR_H 0x02C
+#define UARTCR 0x030
+#define UARTIFLS 0x034
+#define UARTIMSC 0x038
+#define UARTRIS 0x03C
+#define UARTMIS 0x040
+#define UARTICR 0x044
+#define UARTDMACR 0x048
+
+// If the required baud rate is 115200 and UARTCLK = 24MHz then:
+// Baud Rate Divisor = (24×10^6)/(16×115200) = 13.020833
+// This means BRDI = 13 and BRDF = 0.020833
+// Therefore, fractional part, m = integer(0.020833×64) = integer(1.33331) = 1
+// Generated baud rate divider = 13+1/64 = 13.015625
+// Generated baud rate = (24×10^6)/(16×13.015625) = 115246.098
+// Error = (115246.098-115200)/115200 × 100 = 0.04%
+#define UART_115200_IDIV 13
+#define UART_115200_FDIV 1
+
+// add more baud rates here as needed
+
+// data status bits
+#define UART_DATA_ERROR_MASK 0x0F00
+
+// status reg bits
+#define UART_STATUS_ERROR_MASK 0x0F
+
+// flag reg bits
+#define UART_TX_EMPTY_FLAG_MASK 0x80
+#define UART_RX_FULL_FLAG_MASK 0x40
+#define UART_TX_FULL_FLAG_MASK 0x20
+#define UART_RX_EMPTY_FLAG_MASK 0x10
+#define UART_BUSY_FLAG_MASK 0x08
+
+// control reg bits
+#define UART_CTSEN_CONTROL_MASK 0x8000
+#define UART_RTSEN_CONTROL_MASK 0x4000
+#define UART_RTS_CONTROL_MASK 0x0800
+#define UART_DTR_CONTROL_MASK 0x0400
+
+
+#endif
diff --git a/ArmRealViewEbPkg/InterruptDxe/InterruptDxe.c b/ArmRealViewEbPkg/InterruptDxe/InterruptDxe.c new file mode 100755 index 0000000000..b9e8256f82 --- /dev/null +++ b/ArmRealViewEbPkg/InterruptDxe/InterruptDxe.c @@ -0,0 +1,484 @@ +/*++
+
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ Gic.c
+
+Abstract:
+
+ Driver implementing the GIC interrupt controller protocol
+
+--*/
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#include <Protocol/Cpu.h>
+#include <Protocol/HardwareInterrupt.h>
+
+
+//
+// EB board definitions
+//
+#define EB_GIC1_CPU_INTF_BASE 0x10040000
+#define EB_GIC1_DIST_BASE 0x10041000
+#define EB_GIC2_CPU_INTF_BASE 0x10050000
+#define EB_GIC2_DIST_BASE 0x10051000
+#define EB_GIC3_CPU_INTF_BASE 0x10060000
+#define EB_GIC3_DIST_BASE 0x10061000
+#define EB_GIC4_CPU_INTF_BASE 0x10070000
+#define EB_GIC5_DIST_BASE 0x10071000
+
+// number of interrupts sources supported by each GIC on the EB
+#define EB_NUM_GIC_INTERRUPTS 96
+
+// number of 32-bit registers needed to represent those interrupts as a bit
+// (used for enable set, enable clear, pending set, pending clear, and active regs)
+#define EB_NUM_GIC_REG_PER_INT_BITS (EB_NUM_GIC_INTERRUPTS / 32)
+
+// number of 32-bit registers needed to represent those interrupts as two bits
+// (used for configuration reg)
+#define EB_NUM_GIC_REG_PER_INT_CFG (EB_NUM_GIC_INTERRUPTS / 16)
+
+// number of 32-bit registers needed to represent interrupts as 8-bit priority field
+// (used for priority regs)
+#define EB_NUM_GIC_REG_PER_INT_BYTES (EB_NUM_GIC_INTERRUPTS / 4)
+
+#define GIC_DEFAULT_PRIORITY 0x80
+
+//
+// GIC definitions
+//
+
+// Distributor
+#define GIC_ICDDCR 0x000 // Distributor Control Register
+#define GIC_ICDICTR 0x004 // Interrupt Controller Type Register
+#define GIC_ICDIIDR 0x008 // Implementer Identification Register
+
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BITS (see GIC spec)
+#define GIC_ICDISR 0x080 // Interrupt Security Registers
+#define GIC_ICDISER 0x100 // Interrupt Set-Enable Registers
+#define GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers
+#define GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers
+#define GIC_ICDCPR 0x280 // Interrupt Clear-Pending Registers
+#define GIC_ICDABR 0x300 // Active Bit Registers
+
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BYTES
+#define GIC_ICDIPR 0x400 // Interrupt Priority Registers
+
+// each reg base below repeats for EB_NUM_GIC_INTERRUPTS
+#define GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers
+#define GIC_ICDICFR 0xC00 // Interrupt Configuration Registers
+
+// just one of these
+#define GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register
+
+
+// Cpu interface
+#define GIC_ICCICR 0x00 // CPU Interface Controler Register
+#define GIC_ICCPMR 0x04 // Interrupt Priority Mask Register
+#define GIC_ICCBPR 0x08 // Binary Point Register
+#define GIC_ICCIAR 0x0C // Interrupt Acknowledge Register
+#define GIC_ICCEIOR 0x10 // End Of Interrupt Register
+#define GIC_ICCRPR 0x14 // Running Priority Register
+#define GIC_ICCPIR 0x18 // Highest Pending Interrupt Register
+#define GIC_ICCABPR 0x1C // Aliased Binary Point Register
+#define GIC_ICCIDR 0xFC // Identification Register
+
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;
+
+//
+// Notifications
+//
+VOID *CpuProtocolNotificationToken = NULL;
+EFI_EVENT CpuProtocolNotificationEvent = (EFI_EVENT)NULL;
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+
+HARDWARE_INTERRUPT_HANDLER gRegisteredInterruptHandlers[EB_NUM_GIC_INTERRUPTS];
+
+/**
+ Register Handler for the specified interrupt source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+ @param Handler Callback for interrupt. NULL to unregister
+
+ @retval EFI_SUCCESS Source was updated to support Handler.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+RegisterInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN HARDWARE_INTERRUPT_HANDLER Handler
+ )
+{
+ if (Source > EB_NUM_GIC_INTERRUPTS) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ gRegisteredInterruptHandlers[Source] = Handler;
+ return This->EnableInterruptSource(This, Source);
+}
+
+
+/**
+ Enable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt enabled.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+EnableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+
+ if (Source > EB_NUM_GIC_INTERRUPTS) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ // calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ // write set-enable register
+ MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset), 1 << RegShift);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Disable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt disabled.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+DisableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+
+ if (Source > EB_NUM_GIC_INTERRUPTS) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ // calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ // write set-enable register
+ MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDICER+(4*RegOffset), 1 << RegShift);
+
+ return EFI_SUCCESS;
+}
+
+
+
+/**
+ Return current state of interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+ @param InterruptState TRUE: source enabled, FALSE: source disabled.
+
+ @retval EFI_SUCCESS InterruptState is valid
+ @retval EFI_DEVICE_ERROR InterruptState is not valid
+
+**/
+EFI_STATUS
+EFIAPI
+GetInterruptSourceState (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN BOOLEAN *InterruptState
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+
+ if (Source > EB_NUM_GIC_INTERRUPTS) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ // calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ if ((MmioRead32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset)) & (1<<RegShift)) == 0) {
+ *InterruptState = FALSE;
+ } else {
+ *InterruptState = TRUE;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Signal to the hardware that the End Of Intrrupt state
+ has been reached.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt EOI'ed.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+EndOfInterrupt (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source > EB_NUM_GIC_INTERRUPTS) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, Source);
+ return EFI_SUCCESS;
+}
+
+
+/**
+ EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
+
+ @param InterruptType Defines the type of interrupt or exception that
+ occurred on the processor.This parameter is processor architecture specific.
+ @param SystemContext A pointer to the processor context when
+ the interrupt occurred on the processor.
+
+ @return None
+
+**/
+VOID
+EFIAPI
+IrqInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ UINT32 GicInterrupt;
+ HARDWARE_INTERRUPT_HANDLER InterruptHandler;
+
+ GicInterrupt = MmioRead32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCIAR);
+ if (GicInterrupt >= EB_NUM_GIC_INTERRUPTS) {
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, GicInterrupt);
+ }
+
+ InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];
+ if (InterruptHandler != NULL) {
+ // Call the registered interrupt handler.
+ InterruptHandler (GicInterrupt, SystemContext);
+ } else {
+ DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: %x\n", GicInterrupt));
+ }
+
+ EndOfInterrupt (&gHardwareInterruptProtocol, GicInterrupt);
+}
+
+
+//
+// Making this global saves a few bytes in image size
+//
+EFI_HANDLE gHardwareInterruptHandle = NULL;
+
+//
+// The protocol instance produced by this driver
+//
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = {
+ RegisterInterruptSource,
+ EnableInterruptSource,
+ DisableInterruptSource,
+ GetInterruptSourceState,
+ EndOfInterrupt
+};
+
+
+/**
+ Shutdown our hardware
+
+ DXE Core will disable interrupts and turn off the timer and disable interrupts
+ after all the event handlers have run.
+
+ @param[in] Event The Event that is being processed
+ @param[in] Context Event Context
+**/
+VOID
+EFIAPI
+ExitBootServicesEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINTN i;
+
+ for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {
+ DisableInterruptSource (&gHardwareInterruptProtocol, i);
+ }
+}
+
+
+//
+// Notification routines
+//
+VOID
+CpuProtocolInstalledNotification (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ EFI_CPU_ARCH_PROTOCOL *Cpu;
+
+ //
+ // Get the cpu protocol that this driver requires.
+ //
+ Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
+ ASSERT_EFI_ERROR(Status);
+
+ //
+ // Unregister the default exception handler.
+ //
+ Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL);
+ ASSERT_EFI_ERROR(Status);
+
+ //
+ // Register to receive interrupts
+ //
+ Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);
+ ASSERT_EFI_ERROR(Status);
+}
+
+/**
+ Initialize the state information for the CPU Architectural Protocol
+
+ @param ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Protocol registered
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
+ @retval EFI_DEVICE_ERROR Hardware problems
+
+**/
+EFI_STATUS
+InterruptDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN i;
+ UINT32 RegOffset;
+ UINTN RegShift;
+
+
+ // Make sure the Interrupt Controller Protocol is not already installed in the system.
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
+
+ for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {
+ DisableInterruptSource (&gHardwareInterruptProtocol, i);
+
+ // Set Priority
+ RegOffset = i / 4;
+ RegShift = (i % 4) * 8;
+ MmioAndThenOr32 (
+ EB_GIC1_DIST_BASE+GIC_ICDIPR+(4*RegOffset),
+ ~(0xff << RegShift),
+ GIC_DEFAULT_PRIORITY << RegShift
+ );
+ }
+
+ // configure interrupts for cpu 0
+ for (i = 0; i < EB_NUM_GIC_REG_PER_INT_BYTES; i++) {
+ MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICDIPTR + (i*4), 0x01010101);
+ }
+
+ // set binary point reg to 0x7 (no preemption)
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCBPR, 0x7);
+
+ // set priority mask reg to 0xff to allow all priorities through
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCPMR, 0xff);
+
+ // enable gic cpu interface
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCICR, 0x1);
+
+ // enable gic distributor
+ MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICCICR, 0x1);
+
+
+ ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &gHardwareInterruptHandle,
+ &gHardwareInterruptProtocolGuid, &gHardwareInterruptProtocol,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ // Set up to be notified when the Cpu protocol is installed.
+ Status = gBS->CreateEvent (EVT_NOTIFY_SIGNAL, TPL_CALLBACK, CpuProtocolInstalledNotification, NULL, &CpuProtocolNotificationEvent);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->RegisterProtocolNotify (&gEfiCpuArchProtocolGuid, CpuProtocolNotificationEvent, (VOID *)&CpuProtocolNotificationToken);
+ ASSERT_EFI_ERROR (Status);
+
+ // Register for an ExitBootServicesEvent
+ Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
diff --git a/ArmRealViewEbPkg/InterruptDxe/InterruptDxe.inf b/ArmRealViewEbPkg/InterruptDxe/InterruptDxe.inf new file mode 100755 index 0000000000..7479e95997 --- /dev/null +++ b/ArmRealViewEbPkg/InterruptDxe/InterruptDxe.inf @@ -0,0 +1,53 @@ +#/** @file
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = GicInterruptDxe
+ FILE_GUID = A7496828-946E-43BF-97D6-AA0272001899
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = InterruptDxeInitialize
+
+
+[Sources.common]
+ InterruptDxe.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ UefiLib
+ UefiBootServicesTableLib
+ DebugLib
+ PrintLib
+ UefiDriverEntryPoint
+ IoLib
+
+[Guids]
+
+
+[Protocols]
+ gHardwareInterruptProtocolGuid
+ gEfiCpuArchProtocolGuid
+
+[FixedPcd.common]
+ gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
+
+[depex]
+ TRUE
diff --git a/ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c b/ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c new file mode 100755 index 0000000000..e62384217f --- /dev/null +++ b/ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c @@ -0,0 +1,80 @@ +/** @file
+ Template for ArmEb DebugAgentLib.
+
+ For ARM we reserve FIQ for the Debug Agent Timer. We don't care about
+ laytency as we only really need the timer to run a few times a second
+ (how fast can some one type a ctrl-c?), but it works much better if
+ the interrupt we are using to break into the debugger is not being
+ used, and masked, by the system.
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+
+#include <Library/DebugAgentTimerLib.h>
+
+#include <ArmEb/ArmEb.h>
+
+
+/**
+ Setup all the hardware needed for the debug agents timer.
+
+ This function is used to set up debug enviroment.
+
+**/
+VOID
+EFIAPI
+DebugAgentTimerIntialize (
+ VOID
+ )
+{
+ // Map Timer to FIQ
+}
+
+
+/**
+ Set the period for the debug agent timer. Zero means disable the timer.
+
+ @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.
+
+**/
+VOID
+EFIAPI
+DebugAgentTimerSetPeriod (
+ IN UINT32 TimerPeriodMilliseconds
+ )
+{
+ if (TimerPeriodMilliseconds == 0) {
+ // Disable timer and Disable FIQ
+ return;
+ }
+
+ // Set timer period and unmask FIQ
+}
+
+
+/**
+ Perform End Of Interrupt for the debug agent timer. This is called in the
+ interrupt handler after the interrupt has been processed.
+
+**/
+VOID
+EFIAPI
+DebugAgentTimerEndOfInterrupt (
+ VOID
+ )
+{
+ // EOI Timer interrupt for FIQ
+}
+
+
\ No newline at end of file diff --git a/ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf b/ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf new file mode 100755 index 0000000000..8552bbff17 --- /dev/null +++ b/ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf @@ -0,0 +1,38 @@ +#/** @file
+# Component description file for Base PCI Cf8 Library.
+#
+# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.
+# Layers on top of an I/O Library instance.
+# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEbDebugAgentTimerLib
+ FILE_GUID = 80949BBB-68EE-4a4c-B434-D5DB5A232F0C
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = DebugAgentTimerLib|SEC BASE DXE_CORE
+
+
+[Sources.common]
+ DebugAgentTimerLib.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ IoLib
+
diff --git a/ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.c b/ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.c new file mode 100755 index 0000000000..7a87754906 --- /dev/null +++ b/ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.c @@ -0,0 +1,123 @@ +/** @file + Basic serial IO abstaction for GDB + + Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include <Uefi.h> +#include <Library/GdbSerialLib.h> +#include <Library/PcdLib.h> +#include <Library/IoLib.h> + +#include <ArmEb/ArmEb.h> + +RETURN_STATUS +EFIAPI +GdbSerialLibConstructor ( + VOID + ) +{ + return GdbSerialInit (115200, 0, 8, 1); +} + +RETURN_STATUS +EFIAPI +GdbSerialInit ( + IN UINT64 BaudRate, + IN UINT8 Parity, + IN UINT8 DataBits, + IN UINT8 StopBits + ) +{ + if ((Parity != 0) || (DataBits != 8) || (StopBits != 1)) { + return RETURN_UNSUPPORTED; + } + + if (BaudRate != 115200) { + // Could add support for different Baud rates.... + return RETURN_UNSUPPORTED; + } + + UINT32 Base = PcdGet32 (PcdGdbUartBase);
+
+ // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ
+ MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);
+ MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);
+
+ // no parity, 1 stop, no fifo, 8 data bits
+ MmioWrite32 (Base + UARTLCR_H, 0x60);
+
+ // clear any pending errors
+ MmioWrite32 (Base + UARTECR, 0);
+
+ // enable tx, rx, and uart overall
+ MmioWrite32 (Base + UARTCR, 0x301);
+
+ return RETURN_SUCCESS;
+} + +BOOLEAN +EFIAPI +GdbIsCharAvailable ( + VOID + ) +{ + UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;
+
+ if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+} + +CHAR8 +EFIAPI +GdbGetChar ( + VOID + ) +{ + UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;
+ UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;
+
+ while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0);
+ return MmioRead8 (DR);
+} + +VOID +EFIAPI +GdbPutChar ( + IN CHAR8 Char + ) +{ + UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;
+ UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;
+
+ while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0);
+ MmioWrite8 (DR, Char);
+ return; +} + +VOID +GdbPutString ( + IN CHAR8 *String + ) +{ + while (*String != '\0') { + GdbPutChar (*String); + String++; + } +} + + + + diff --git a/ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.inf b/ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.inf new file mode 100755 index 0000000000..3256f4fe68 --- /dev/null +++ b/ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.inf @@ -0,0 +1,40 @@ +#/** @file +# +# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR> +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = GdbSerialLib + FILE_GUID = E8EA1309-2F14-428f-ABE3-7016CE4B4305 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = GdbSerialLib + + CONSTRUCTOR = GdbSerialLibConstructor + + +[Sources.common] + GdbSerialLib.c + + +[Packages] + MdePkg/MdePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmRealViewEbPkg/ArmRealViewEbPkg.dec + +[LibraryClasses] + DebugLib + IoLib + +[FixedPcd] + + gArmRealViewEbPkgTokenSpaceGuid.PcdGdbUartBase
\ No newline at end of file diff --git a/ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c b/ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c new file mode 100755 index 0000000000..9f25f4699f --- /dev/null +++ b/ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c @@ -0,0 +1,70 @@ +/** @file
+ PEI Services Table Pointer Library.
+
+ This library is used for PEIM which does executed from flash device directly but
+ executed in memory.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+/**
+ Caches a pointer PEI Services Table.
+
+ Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
+ in a platform specific manner.
+
+ If PeiServicesTablePointer is NULL, then ASSERT().
+
+ @param PeiServicesTablePointer The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+ IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
+ )
+{
+ UINTN *PeiPtrLoc;
+ ASSERT (PeiServicesTablePointer != NULL);
+
+ PeiPtrLoc = (UINTN *)(UINTN)PcdGet32(PcdPeiServicePtrAddr);
+ *PeiPtrLoc = (UINTN)PeiServicesTablePointer;
+}
+
+/**
+ Retrieves the cached value of the PEI Services Table pointer.
+
+ Returns the cached value of the PEI Services Table pointer in a CPU specific manner
+ as specified in the CPU binding section of the Platform Initialization Pre-EFI
+ Initialization Core Interface Specification.
+
+ If the cached PEI Services Table pointer is NULL, then ASSERT().
+
+ @return The pointer to PeiServices.
+
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+ VOID
+ )
+{
+ UINTN *PeiPtrLoc;
+
+ PeiPtrLoc = (UINTN *)(UINTN)PcdGet32(PcdPeiServicePtrAddr);
+ return (CONST EFI_PEI_SERVICES **)*PeiPtrLoc;
+}
+
+
diff --git a/ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf b/ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf new file mode 100755 index 0000000000..db11b936c3 --- /dev/null +++ b/ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf @@ -0,0 +1,43 @@ +## @file
+# Instance of PEI Services Table Pointer Library using global variable for the table pointer.
+#
+# PEI Services Table Pointer Library implementation that retrieves a pointer to the
+# PEI Services Table from a global variable. Not available to modules that execute from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiServicesTablePointerLib
+ FILE_GUID = 1c747f6b-0a58-49ae-8ea3-0327a4fa10e3
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeiServicesTablePointerLib|PEIM PEI_CORE SEC
+
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)
+#
+
+[Sources]
+ PeiServicesTablePointer.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ DebugLib
+
+[Pcd]
+ gArmRealViewEbPkgTokenSpaceGuid.PcdPeiServicePtrAddr
diff --git a/ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.c b/ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.c new file mode 100755 index 0000000000..cef6dd9791 --- /dev/null +++ b/ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.c @@ -0,0 +1,175 @@ +/** @file
+ Implement EFI RealTimeClock runtime services via RTC Lib.
+
+ Currently this driver does not support runtime virtual calling.
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/RealTimeClockLib.h>
+
+
+/**
+ Returns the current time and date information, and the time-keeping capabilities
+ of the hardware platform.
+
+ @param Time A pointer to storage to receive a snapshot of the current time.
+ @param Capabilities An optional pointer to a buffer to receive the real time clock
+ device's capabilities.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER Time is NULL.
+ @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error.
+
+**/
+EFI_STATUS
+EFIAPI
+LibGetTime (
+ OUT EFI_TIME *Time,
+ OUT EFI_TIME_CAPABILITIES *Capabilities
+ )
+{
+ //
+ // Fill in Time and Capabilities via data from you RTC
+ //
+ return EFI_DEVICE_ERROR;
+}
+
+
+/**
+ Sets the current local time and date information.
+
+ @param Time A pointer to the current time.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER A time field is out of range.
+ @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error.
+
+**/
+EFI_STATUS
+EFIAPI
+LibSetTime (
+ IN EFI_TIME *Time
+ )
+{
+ //
+ // Use Time, to set the time in your RTC hardware
+ //
+ return EFI_DEVICE_ERROR;
+}
+
+
+/**
+ Returns the current wakeup alarm clock setting.
+
+ @param Enabled Indicates if the alarm is currently enabled or disabled.
+ @param Pending Indicates if the alarm signal is pending and requires acknowledgement.
+ @param Time The current alarm setting.
+
+ @retval EFI_SUCCESS The alarm settings were returned.
+ @retval EFI_INVALID_PARAMETER Any parameter is NULL.
+ @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error.
+
+**/
+EFI_STATUS
+EFIAPI
+LibGetWakeupTime (
+ OUT BOOLEAN *Enabled,
+ OUT BOOLEAN *Pending,
+ OUT EFI_TIME *Time
+ )
+{
+ // Not a required feature
+ return EFI_UNSUPPORTED;
+}
+
+
+/**
+ Sets the system wakeup alarm clock time.
+
+ @param Enabled Enable or disable the wakeup alarm.
+ @param Time If Enable is TRUE, the time to set the wakeup alarm for.
+
+ @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If
+ Enable is FALSE, then the wakeup alarm was disabled.
+ @retval EFI_INVALID_PARAMETER A time field is out of range.
+ @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error.
+ @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.
+
+**/
+EFI_STATUS
+EFIAPI
+LibSetWakeupTime (
+ IN BOOLEAN Enabled,
+ OUT EFI_TIME *Time
+ )
+{
+ // Not a required feature
+ return EFI_UNSUPPORTED;
+}
+
+
+
+/**
+ This is the declaration of an EFI image entry point. This can be the entry point to an application
+ written to this specification, an EFI boot service driver, or an EFI runtime driver.
+
+ @param ImageHandle Handle that identifies the loaded image.
+ @param SystemTable System Table for this image.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+LibRtcInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ //
+ // Do some initialization if reqruied to turn on the RTC
+ //
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Fixup internal data so that EFI can be call in virtual mode.
+ Call the passed in Child Notify event and convert any pointers in
+ lib to virtual mode.
+
+ @param[in] Event The Event that is being processed
+ @param[in] Context Event Context
+**/
+VOID
+EFIAPI
+LibRtcVirtualNotifyEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ //
+ // Only needed if you are going to support the OS calling RTC functions in virtual mode.
+ // You will need to call EfiConvertPointer (). To convert any stored physical addresses
+ // to virtual address. After the OS transistions to calling in virtual mode, all future
+ // runtime calls will be made in virtual mode.
+ //
+ return;
+}
+
+
+
diff --git a/ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.inf b/ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.inf new file mode 100755 index 0000000000..a3a7e93cab --- /dev/null +++ b/ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.inf @@ -0,0 +1,37 @@ +#/** @file
+# Memory Status Code Library for UEFI drivers
+#
+# Lib to provide memory journal status code reporting Routines
+# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEbRealTimeClockLib
+ FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RealTimeClockLib
+
+
+[Sources.common]
+ RealTimeClockLib.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+ IoLib
+ DebugLib
+
\ No newline at end of file diff --git a/ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.c b/ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.c new file mode 100755 index 0000000000..f4a1655498 --- /dev/null +++ b/ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -0,0 +1,88 @@ +/** @file
+ Template library implementation to support ResetSystem Runtime call.
+
+ Fill in the templates with what ever makes you system reset.
+
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+#include <Library/EfiResetSystemLib.h>
+
+#include <ArmEb/ArmEb.h>
+
+/**
+ Resets the entire platform.
+
+ @param ResetType The type of reset to perform.
+ @param ResetStatus The status code for the reset.
+ @param DataSize The size, in bytes, of WatchdogData.
+ @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or
+ EfiResetShutdown the data buffer starts with a Null-terminated
+ Unicode string, optionally followed by additional binary data.
+
+**/
+EFI_STATUS
+EFIAPI
+LibResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN CHAR16 *ResetData OPTIONAL
+ )
+{
+ if (ResetData != NULL) {
+ DEBUG ((EFI_D_ERROR, "%s", ResetData));
+ }
+
+ switch (ResetType) {
+ case EfiResetWarm:
+ // Map a warm reset into a cold reset
+ case EfiResetCold:
+ case EfiResetShutdown:
+ default:
+ CpuDeadLoop ();
+ break;
+ }
+
+ // If the reset didn't work, return an error.
+ ASSERT (FALSE);
+ return EFI_DEVICE_ERROR;
+}
+
+
+
+/**
+ Initialize any infrastructure required for LibResetSystem () to function.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+LibInitializeResetSystem (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ return EFI_SUCCESS;
+}
+
diff --git a/ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.inf b/ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.inf new file mode 100755 index 0000000000..f74587743c --- /dev/null +++ b/ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -0,0 +1,35 @@ +#/** @file
+# Reset System lib to make it easy to port new platforms
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEbResetSystemLib
+ FILE_GUID = CEFFA65C-B568-453e-9E11-B81AE683D035
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = EfiResetSystemLib
+
+
+[Sources.common]
+ ResetSystemLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
diff --git a/ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.c b/ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.c new file mode 100755 index 0000000000..90e559a245 --- /dev/null +++ b/ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.c @@ -0,0 +1,137 @@ +/** @file
+ Serial I/O Port library functions with no library constructor/destructor
+
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+#include <Library/SerialPortLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#include <ArmEb/ArmEb.h>
+
+/*
+
+ Programmed hardware of Serial port.
+
+ @return Always return EFI_UNSUPPORTED.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+ VOID
+ )
+{
+ UINT32 Base = PcdGet32 (PcdConsoleUartBase);
+
+ // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ
+ MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);
+ MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);
+
+ // no parity, 1 stop, no fifo, 8 data bits
+ MmioWrite32 (Base + UARTLCR_H, 0x60);
+
+ // clear any pending errors
+ MmioWrite32 (Base + UARTECR, 0);
+
+ // enable tx, rx, and uart overall
+ MmioWrite32 (Base + UARTCR, 0x301);
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Write data to serial device.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Write data failed.
+ @retval !0 Actual number of bytes writed to serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortWrite (
+ IN UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;
+ UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;
+ UINTN Count;
+
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
+ while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) == 0);
+ MmioWrite8 (DR, *Buffer);
+ }
+
+ return NumberOfBytes;
+}
+
+
+/**
+ Read data from serial device and save the datas in buffer.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Read data failed.
+ @retval !0 Aactual number of bytes read from serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortRead (
+ OUT UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;
+ UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;
+ UINTN Count;
+
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
+ while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) != 0);
+ *Buffer = MmioRead8 (DR);
+ }
+
+ return NumberOfBytes;
+}
+
+
+/**
+ Check to see if any data is avaiable to be read from the debug device.
+
+ @retval EFI_SUCCESS At least one byte of data is avaiable to be read
+ @retval EFI_NOT_READY No data is avaiable to be read
+ @retval EFI_DEVICE_ERROR The serial device is not functioning properly
+
+**/
+BOOLEAN
+EFIAPI
+SerialPortPoll (
+ VOID
+ )
+{
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;
+
+ if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+}
+
diff --git a/ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.inf b/ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.inf new file mode 100755 index 0000000000..a53c0fef5b --- /dev/null +++ b/ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.inf @@ -0,0 +1,41 @@ +#/** @file
+# EDK Serial port lib
+#
+# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEbSerialPortLib
+ FILE_GUID = C653196A-3BE1-4ec7-850B-DB7E0A16150F
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SerialPortLib
+
+
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources.common]
+ SerialPortLib.c
+
+[LibraryClasses]
+ IoLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[FixedPcd]
+ gArmRealViewEbPkgTokenSpaceGuid.PcdConsoleUartBase
+
diff --git a/ArmRealViewEbPkg/Library/TimerLib/TimerLib.c b/ArmRealViewEbPkg/Library/TimerLib/TimerLib.c new file mode 100755 index 0000000000..c56b77acaa --- /dev/null +++ b/ArmRealViewEbPkg/Library/TimerLib/TimerLib.c @@ -0,0 +1,177 @@ +/** @file
+ TimerLib for ARM EB. Hardcoded to 100ns period
+
+ This library assume the following initialization, usually done in SEC.
+
+ // configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Enable
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);
+
+ // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
+
+ // preload the timer count register
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);
+
+ // enable the timer
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+
+#include <Library/BaseLib.h>
+#include <Library/TimerLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#include <ArmEb/ArmEb.h>
+
+
+/**
+ Stalls the CPU for at least the given number of microseconds.
+
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+ @param MicroSeconds The minimum number of microseconds to delay.
+
+ @return The value of MicroSeconds inputted.
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+ IN UINTN MicroSeconds
+ )
+{
+ UINT64 NanoSeconds;
+
+ NanoSeconds = MultU64x32 (MicroSeconds, 1000);
+
+ while (NanoSeconds > (UINTN)-1) {
+ NanoSecondDelay((UINTN)-1);
+ NanoSeconds -= (UINTN)-1;
+ }
+
+ NanoSecondDelay (NanoSeconds);
+
+ return MicroSeconds;
+}
+
+/**
+ Stalls the CPU for at least the given number of nanoseconds.
+
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+ @param NanoSeconds The minimum number of nanoseconds to delay.
+
+ @return The value of NanoSeconds inputted.
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+ IN UINTN NanoSeconds
+ )
+{
+ UINT32 TickNumber;
+
+ if (NanoSeconds == 0) {
+ return NanoSeconds;
+ }
+
+ // Round up to 100ns Tick Number
+ TickNumber = (UINT32)NanoSeconds / 100;
+ TickNumber += ((UINT32)NanoSeconds % 100) == 0 ? 0 : 1;
+
+ // load the timer count register
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, TickNumber);
+
+ while (MmioRead32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {
+ ;
+ }
+
+ return NanoSeconds;
+}
+
+/**
+ Retrieves the current value of a 64-bit free running performance counter.
+
+ The counter can either count up by 1 or count down by 1. If the physical
+ performance counter counts by a larger increment, then the counter values
+ must be translated. The properties of the counter can be retrieved from
+ GetPerformanceCounterProperties().
+
+ @return The current value of the free running performance counter.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounter (
+ VOID
+ )
+{
+ // Free running 64-bit/32-bit counter is needed here.
+ // Don't think we need this to boot, just to do performance profile
+ ASSERT (FALSE);
+ return (UINT64)0ULL;
+}
+
+
+/**
+ Retrieves the 64-bit frequency in Hz and the range of performance counter
+ values.
+
+ If StartValue is not NULL, then the value that the performance counter starts
+ with immediately after is it rolls over is returned in StartValue. If
+ EndValue is not NULL, then the value that the performance counter end with
+ immediately before it rolls over is returned in EndValue. The 64-bit
+ frequency of the performance counter in Hz is always returned. If StartValue
+ is less than EndValue, then the performance counter counts up. If StartValue
+ is greater than EndValue, then the performance counter counts down. For
+ example, a 64-bit free running counter that counts up would have a StartValue
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
+
+ @param StartValue The value the performance counter starts with when it
+ rolls over.
+ @param EndValue The value that the performance counter ends with before
+ it rolls over.
+
+ @return The frequency in Hz.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounterProperties (
+ OUT UINT64 *StartValue, OPTIONAL
+ OUT UINT64 *EndValue OPTIONAL
+ )
+{
+ if (StartValue != NULL) {
+ // Timer starts with the reload value
+ *StartValue = (UINT64)0ULL;
+ }
+
+ if (EndValue != NULL) {
+ // Timer counts up to 0xFFFFFFFF
+ *EndValue = 0xFFFFFFFF;
+ }
+
+ return 100;
+}
+
+
diff --git a/ArmRealViewEbPkg/Library/TimerLib/TimerLib.inf b/ArmRealViewEbPkg/Library/TimerLib/TimerLib.inf new file mode 100755 index 0000000000..a194ef1e9a --- /dev/null +++ b/ArmRealViewEbPkg/Library/TimerLib/TimerLib.inf @@ -0,0 +1,44 @@ +#/** @file
+# Timer library implementation
+#
+# A non-functional instance of the Timer Library that can be used as a template
+# for the implementation of a functional timer library instance. This library instance can
+# also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer
+# services as well as EBC modules that require timer services
+# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEbTimerLib
+ FILE_GUID = B2333114-328B-47cc-8E5E-F64E22E4B417
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = TimerLib
+
+[Sources.common]
+ TimerLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ IoLib
+ BaseLib
+
+[Pcd]
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds
+
diff --git a/ArmRealViewEbPkg/MemoryInitPei/MemoryInit.c b/ArmRealViewEbPkg/MemoryInitPei/MemoryInit.c new file mode 100755 index 0000000000..972bb37d2e --- /dev/null +++ b/ArmRealViewEbPkg/MemoryInitPei/MemoryInit.c @@ -0,0 +1,104 @@ +/**@file
+
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ MemoryInit.c
+
+Abstract:
+
+ PEIM to provide fake memory init
+
+**/
+
+
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+#include <Ppi/MasterBootMode.h>
+#include <Ppi/BootInRecoveryMode.h>
+//
+// The Library classes this module consumes
+//
+#include <Library/DebugLib.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/PcdLib.h>
+#include <Library/HobLib.h>
+#include <Library/PeiServicesLib.h>
+
+
+//
+// Module globals
+//
+
+EFI_STATUS
+EFIAPI
+InitializeMemory (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+/*++
+
+Routine Description:
+
+
+
+Arguments:
+
+ FileHandle - Handle of the file being invoked.
+ PeiServices - Describes the list of possible PEI Services.
+
+Returns:
+
+ Status - EFI_SUCCESS if the boot mode could be set
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;
+ UINT64 MemoryBase;
+ UINT64 MemorySize;
+
+ DEBUG ((EFI_D_ERROR, "Memory Init PEIM Loaded\n"));
+
+ // NOTE: this needs to come from your memory controller initization process
+ MemoryBase = 0;
+ MemorySize = 0x10000000;
+
+ DEBUG ((EFI_D_ERROR, "Installing hardcoded 256MB\n"));
+ Status = PeiServicesInstallPeiMemory (MemoryBase, MemorySize);
+ ASSERT_EFI_ERROR (Status);
+
+ Attributes =
+ (
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_TESTED
+ );
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ Attributes,
+ MemoryBase,
+ MemorySize
+ );
+
+ return Status;
+}
diff --git a/ArmRealViewEbPkg/MemoryInitPei/MemoryInitPei.inf b/ArmRealViewEbPkg/MemoryInitPei/MemoryInitPei.inf new file mode 100755 index 0000000000..e50e2ecbcf --- /dev/null +++ b/ArmRealViewEbPkg/MemoryInitPei/MemoryInitPei.inf @@ -0,0 +1,59 @@ +## @file
+# Component description file for BootMode module
+#
+# This module provides platform specific function to detect boot mode.
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = MemoryInit
+ FILE_GUID = D6F4724D-4504-418c-92BF-5E4D98FDBE85
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = InitializeMemory
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources]
+ MemoryInit.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+
+[LibraryClasses]
+ PeimEntryPoint
+ DebugLib
+ HobLib
+
+
+[Ppis]
+
+[FixedPcd]
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
+
+[depex]
+ TRUE
+
diff --git a/ArmRealViewEbPkg/PlatformPei/PlatformPei.c b/ArmRealViewEbPkg/PlatformPei/PlatformPei.c new file mode 100755 index 0000000000..8ef0cb9cc0 --- /dev/null +++ b/ArmRealViewEbPkg/PlatformPei/PlatformPei.c @@ -0,0 +1,130 @@ +/**@file
+
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ BootMode.c
+
+Abstract:
+
+ Tiano PEIM to provide the platform support functionality within Windows
+
+**/
+
+
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+#include <Ppi/MasterBootMode.h>
+#include <Ppi/BootInRecoveryMode.h>
+//
+// The Library classes this module consumes
+//
+#include <Library/DebugLib.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/PcdLib.h>
+#include <Library/HobLib.h>
+
+
+//
+// Module globals
+//
+EFI_PEI_PPI_DESCRIPTOR mPpiListBootMode = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiMasterBootModePpiGuid,
+ NULL
+};
+
+EFI_PEI_PPI_DESCRIPTOR mPpiListRecoveryBootMode = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiBootInRecoveryModePpiGuid,
+ NULL
+};
+
+EFI_STATUS
+EFIAPI
+InitializePlatformPeim (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+/*++
+
+Routine Description:
+
+
+
+Arguments:
+
+ FileHandle - Handle of the file being invoked.
+ PeiServices - Describes the list of possible PEI Services.
+
+Returns:
+
+ Status - EFI_SUCCESS if the boot mode could be set
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;
+ UINTN BootMode;
+
+ DEBUG ((EFI_D_ERROR, "ARM EB Platform PEIM Loaded\n"));
+
+ BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
+
+ Attributes =(
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_TESTED |
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
+ );
+
+ //BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY, Attributes, (UINTN)MemoryBegin, MemoryLength);
+
+ BuildFvHob (FixedPcdGet32(PcdFlashFvMainBase), FixedPcdGet32(PcdFlashFvMainSize));
+
+ BuildResourceDescriptorHob (EFI_RESOURCE_FIRMWARE_DEVICE,
+ (EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_TESTED |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE),
+ FixedPcdGet32(PcdFlashFvMainBase), FixedPcdGet32(PcdFlashFvMainSize));
+
+ //BuildStackHob ((UINTN)StackBase, Hob->EfiMemoryTop - (UINTN)StackBase);
+
+
+ //
+ // Let's assume things are OK if not told otherwise
+ // Should we read an environment variable in order to easily change this?
+ //
+ BootMode = BOOT_WITH_FULL_CONFIGURATION;
+
+ Status = (**PeiServices).SetBootMode (PeiServices, (UINT8) BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = (**PeiServices).InstallPpi (PeiServices, &mPpiListBootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ if (BootMode == BOOT_IN_RECOVERY_MODE) {
+ Status = (**PeiServices).InstallPpi (PeiServices, &mPpiListRecoveryBootMode);
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return Status;
+}
diff --git a/ArmRealViewEbPkg/PlatformPei/PlatformPei.inf b/ArmRealViewEbPkg/PlatformPei/PlatformPei.inf new file mode 100755 index 0000000000..0d9b64bce0 --- /dev/null +++ b/ArmRealViewEbPkg/PlatformPei/PlatformPei.inf @@ -0,0 +1,61 @@ +## @file
+# Component description file for BootMode module
+#
+# This module provides platform specific function to detect boot mode.
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PlatformPei
+ FILE_GUID = 8E7E1414-2290-4a80-A325-F55CFF10907A
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = InitializePlatformPeim
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources]
+ PlatformPei.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+
+[LibraryClasses]
+ PeimEntryPoint
+ DebugLib
+ HobLib
+
+
+[Ppis]
+ gEfiPeiMasterBootModePpiGuid # PPI ALWAYS_PRODUCED
+ gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
+
+[FixedPcd]
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
+
+[depex]
+ TRUE
+
diff --git a/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.S b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.S new file mode 100755 index 0000000000..2b5ee8f31a --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.S @@ -0,0 +1,68 @@ +#------------------------------------------------------------------------------
+#
+# ARM EB Entry point. Reset vector in FV header will brach to
+# _ModuleEntryPoint.
+#
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler
+# does not support = assembly syntax for ldr.
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+
+.text
+.align 3
+
+.globl ASM_PFX(CEntryPoint)
+.globl ASM_PFX(_ModuleEntryPoint)
+
+ASM_PFX(_ModuleEntryPoint):
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8)
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ // Call C entry point
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+ blx ASM_PFX(CEntryPoint)
+
+ShouldNeverGetHere:
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+
diff --git a/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm new file mode 100755 index 0000000000..aa0b98f3e6 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm @@ -0,0 +1,80 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ IMPORT CEntryPoint
+ EXPORT _ModuleEntryPoint
+
+ PRESERVE8
+ AREA ModuleEntryPoint, CODE, READONLY
+
+
+StartupAddr DCD CEntryPoint
+
+_ModuleEntryPoint
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+
+ // move sec startup address into a data register
+ // ensure we're jumping to FV version of the code (not boot remapped alias)
+ ldr r4, StartupAddr
+
+ // jump to SEC C code
+ blx r4
+
+ // Call C entry point
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP
+
+ // blx CEntryPoint
+
+ShouldNeverGetHere
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+ END
+
+
diff --git a/ArmRealViewEbPkg/Sec/Cache.c b/ArmRealViewEbPkg/Sec/Cache.c new file mode 100755 index 0000000000..a0e3abb4eb --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Cache.c @@ -0,0 +1,79 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Library/ArmLib.h>
+#include <Library/PrePiLib.h>
+#include <Library/PcdLib.h>
+
+// DDR attributes
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
+
+// SoC registers. L3 interconnects
+#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000
+#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000
+#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+// SoC registers. L4 interconnects
+#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000
+#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000
+#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
+
+VOID
+InitCache (
+ IN UINT32 MemoryBase,
+ IN UINT32 MemoryLength
+ )
+{
+ UINT32 CacheAttributes;
+ ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];
+ VOID *TranslationTableBase;
+ UINTN TranslationTableSize;
+
+ if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;
+ } else {
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
+ }
+
+ // DDR
+ MemoryTable[0].PhysicalBase = MemoryBase;
+ MemoryTable[0].VirtualBase = MemoryBase;
+ MemoryTable[0].Length = MemoryLength;
+ MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
+
+ // SOC Registers. L3 interconnects
+ MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
+ MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
+
+ // SOC Registers. L4 interconnects
+ MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
+ MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
+
+ // End of Table
+ MemoryTable[3].PhysicalBase = 0;
+ MemoryTable[3].VirtualBase = 0;
+ MemoryTable[3].Length = 0;
+ MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+
+ ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+
+ BuildMemoryAllocationHob ((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
+}
diff --git a/ArmRealViewEbPkg/Sec/LzmaDecompress.h b/ArmRealViewEbPkg/Sec/LzmaDecompress.h new file mode 100755 index 0000000000..e4483b6823 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/LzmaDecompress.h @@ -0,0 +1,103 @@ +/** @file
+ LZMA Decompress Library header file
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __LZMA_DECOMPRESS_H___
+#define __LZMA_DECOMPRESS_H___
+
+/**
+ Examines a GUIDed section and returns the size of the decoded buffer and the
+ size of an scratch buffer required to actually decode the data in a GUIDed section.
+
+ Examines a GUIDed section specified by InputSection.
+ If GUID for InputSection does not match the GUID that this handler supports,
+ then RETURN_UNSUPPORTED is returned.
+ If the required information can not be retrieved from InputSection,
+ then RETURN_INVALID_PARAMETER is returned.
+ If the GUID of InputSection does match the GUID that this handler supports,
+ then the size required to hold the decoded buffer is returned in OututBufferSize,
+ the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field
+ from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.
+
+ If InputSection is NULL, then ASSERT().
+ If OutputBufferSize is NULL, then ASSERT().
+ If ScratchBufferSize is NULL, then ASSERT().
+ If SectionAttribute is NULL, then ASSERT().
+
+
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
+ @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required
+ if the buffer specified by InputSection were decoded.
+ @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space
+ if the buffer specified by InputSection were decoded.
+ @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes
+ field of EFI_GUID_DEFINED_SECTION in the PI Specification.
+
+ @retval RETURN_SUCCESS The information about InputSection was returned.
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
+ @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.
+
+**/
+RETURN_STATUS
+EFIAPI
+LzmaGuidedSectionGetInfo (
+ IN CONST VOID *InputSection,
+ OUT UINT32 *OutputBufferSize,
+ OUT UINT32 *ScratchBufferSize,
+ OUT UINT16 *SectionAttribute
+ );
+
+/**
+ Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.
+
+ Decodes the GUIDed section specified by InputSection.
+ If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned.
+ If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.
+ If the GUID of InputSection does match the GUID that this handler supports, then InputSection
+ is decoded into the buffer specified by OutputBuffer and the authentication status of this
+ decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the
+ data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,
+ the decoded data will be placed in caller allocated buffer specified by OutputBuffer.
+
+ If InputSection is NULL, then ASSERT().
+ If OutputBuffer is NULL, then ASSERT().
+ If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
+ If AuthenticationStatus is NULL, then ASSERT().
+
+
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
+ @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
+ @param[out] ScratchBuffer A caller allocated buffer that may be required by this function
+ as a scratch buffer to perform the decode operation.
+ @param[out] AuthenticationStatus
+ A pointer to the authentication status of the decoded output buffer.
+ See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI
+ section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must
+ never be set by this handler.
+
+ @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
+ @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.
+
+**/
+RETURN_STATUS
+EFIAPI
+LzmaGuidedSectionExtraction (
+ IN CONST VOID *InputSection,
+ OUT VOID **OutputBuffer,
+ OUT VOID *ScratchBuffer, OPTIONAL
+ OUT UINT32 *AuthenticationStatus
+ );
+
+#endif // __LZMADECOMPRESS_H__
+
diff --git a/ArmRealViewEbPkg/Sec/ModuleEntryPoint.S b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.S new file mode 100755 index 0000000000..2b5ee8f31a --- /dev/null +++ b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.S @@ -0,0 +1,68 @@ +#------------------------------------------------------------------------------
+#
+# ARM EB Entry point. Reset vector in FV header will brach to
+# _ModuleEntryPoint.
+#
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler
+# does not support = assembly syntax for ldr.
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+
+.text
+.align 3
+
+.globl ASM_PFX(CEntryPoint)
+.globl ASM_PFX(_ModuleEntryPoint)
+
+ASM_PFX(_ModuleEntryPoint):
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8)
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ // Call C entry point
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+ blx ASM_PFX(CEntryPoint)
+
+ShouldNeverGetHere:
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+
diff --git a/ArmRealViewEbPkg/Sec/ModuleEntryPoint.asm b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.asm new file mode 100755 index 0000000000..aa0b98f3e6 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/ModuleEntryPoint.asm @@ -0,0 +1,80 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ IMPORT CEntryPoint
+ EXPORT _ModuleEntryPoint
+
+ PRESERVE8
+ AREA ModuleEntryPoint, CODE, READONLY
+
+
+StartupAddr DCD CEntryPoint
+
+_ModuleEntryPoint
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
+ add r4, r2, r3
+ mov r13, r4
+
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
+
+ // move sec startup address into a data register
+ // ensure we're jumping to FV version of the code (not boot remapped alias)
+ ldr r4, StartupAddr
+
+ // jump to SEC C code
+ blx r4
+
+ // Call C entry point
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP
+
+ // blx CEntryPoint
+
+ShouldNeverGetHere
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+ END
+
+
diff --git a/ArmRealViewEbPkg/Sec/Sec.c b/ArmRealViewEbPkg/Sec/Sec.c new file mode 100755 index 0000000000..360a7b017b --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Sec.c @@ -0,0 +1,164 @@ +/** @file
+ C Entry point for the SEC. First C code after the reset vector.
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Library/DebugLib.h>
+#include <Library/PrePiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/DebugAgentLib.h>
+
+#include <Ppi/GuidedSectionExtraction.h>
+#include <Guid/LzmaDecompress.h>
+
+#include <ArmEb/ArmEb.h>
+
+#include "LzmaDecompress.h"
+
+VOID
+EFIAPI
+_ModuleEntryPoint(
+ VOID
+ );
+
+CHAR8 *
+DeCygwinPathIfNeeded (
+ IN CHAR8 *Name
+ );
+
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+ VOID
+ );
+
+
+VOID
+UartInit (
+ VOID
+ )
+{
+ // SEC phase needs to run library constructors by hand.
+ // This assumes we are linked agains the SerialLib
+ // In non SEC modules the init call is in autogenerated code.
+ SerialPortInitialize ();
+}
+
+VOID
+TimerInit (
+ VOID
+ )
+{
+ // configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Enable
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);
+
+ // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
+
+ // preload the timer count register
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);
+
+ // enable the timer
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+}
+
+
+VOID
+InitCache (
+ IN UINT32 MemoryBase,
+ IN UINT32 MemoryLength
+ );
+
+EFI_STATUS
+EFIAPI
+ExtractGuidedSectionLibConstructor (
+ VOID
+ );
+
+EFI_STATUS
+EFIAPI
+LzmaDecompressLibConstructor (
+ VOID
+ );
+
+
+VOID
+CEntryPoint (
+ IN VOID *MemoryBase,
+ IN UINTN MemorySize,
+ IN VOID *StackBase,
+ IN UINTN StackSize
+ )
+{
+ VOID *HobBase;
+
+ // HOB list is at bottom of stack area
+ // Stack grows from top-to-bottom towards HOB list
+ HobBase = (VOID *)StackBase;
+ CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);
+
+ // Turn off remapping NOR to 0. We can will now see DRAM in low memory
+ MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE
+
+ // Enable program flow prediction, if supported.
+ ArmEnableBranchPrediction ();
+
+ // Initialize CPU cache
+ InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);
+
+ // Add memory allocation hob for relocated FD
+ BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
+
+ // Add the FVs to the hob list
+ BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
+
+ // Start talking
+ UartInit ();
+
+ InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL);
+ SaveAndSetDebugTimerInterrupt (TRUE);
+
+ DEBUG ((EFI_D_ERROR, "UART Enabled\n"));
+
+ // Start up a free running timer so that the timer lib will work
+ TimerInit ();
+
+ // SEC phase needs to run library constructors by hand.
+ ExtractGuidedSectionLibConstructor ();
+ LzmaDecompressLibConstructor ();
+
+ // Build HOBs to pass up our version of stuff the DXE Core needs to save space
+ BuildPeCoffLoaderHob ();
+ BuildExtractSectionHob (
+ &gLzmaCustomDecompressGuid,
+ LzmaGuidedSectionGetInfo,
+ LzmaGuidedSectionExtraction
+ );
+
+ // Assume the FV that contains the SEC (our code) also contains a compressed FV.
+ DecompressFirstFv ();
+
+ // Load the DXE Core and transfer control to it
+ LoadDxeCoreFromFv (NULL, 0);
+
+ // DXE Core should always load and never return
+ ASSERT (FALSE);
+}
+
diff --git a/ArmRealViewEbPkg/Sec/Sec.inf b/ArmRealViewEbPkg/Sec/Sec.inf new file mode 100755 index 0000000000..f2ba434427 --- /dev/null +++ b/ArmRealViewEbPkg/Sec/Sec.inf @@ -0,0 +1,69 @@ + +#/** @file +# SEC - Reset vector code that jumps to C and loads DXE core +# +# Copyright (c) 2008, Apple Inc. All rights reserved.<BR> +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ArmEBSec + FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8 + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + + +[Sources.ARM] + ModuleEntryPoint.S | GCC + ModuleEntryPoint.asm | RVCT + +[Sources.ARM] + Sec.c + Cache.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec + ArmRealViewEbPkg/ArmRealViewEbPkg.dec + + +[LibraryClasses] + BaseLib + DebugLib + ArmLib + IoLib + ExtractGuidedSectionLib + LzmaDecompressLib + PeCoffGetEntryPointLib + DebugAgentLib + + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdCacheEnable + +[FixedPcd] + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress + gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize + gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase + gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize + gEmbeddedTokenSpaceGuid.PcdPrePiStackSize + gEmbeddedTokenSpaceGuid.PcdPrePiStackBase + gEmbeddedTokenSpaceGuid.PcdMemoryBase + gEmbeddedTokenSpaceGuid.PcdMemorySize + + + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress + + diff --git a/ArmRealViewEbPkg/SecForPei/Arm/ModuleEntryPoint.S b/ArmRealViewEbPkg/SecForPei/Arm/ModuleEntryPoint.S new file mode 100755 index 0000000000..f87aa58037 --- /dev/null +++ b/ArmRealViewEbPkg/SecForPei/Arm/ModuleEntryPoint.S @@ -0,0 +1,79 @@ +#------------------------------------------------------------------------------
+#
+# ARM EB Entry point. Reset vector in FV header will brach to
+# _ModuleEntryPoint.
+#
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler
+# does not support = assembly syntax for ldr.
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+
+.text
+.align 3
+
+.globl ASM_PFX(CEntryPoint)
+.globl ASM_PFX(_ModuleEntryPoint)
+.globl ASM_PFX(StartupAddr)
+
+ASM_PFX(_ModuleEntryPoint):
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r0) // temp ram base arg 0 TODO: change "stackbase" to "temprambase"
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r1) // temp ram size arg 1
+ lsr r3, r1, #1 // r4 = size of temp mem / 2
+ add r3, r3, r0 // r2 = temp ram base + r4
+ mov r13, r3 // result: stack pointer = temp ram base + (size of temp mem / 2)
+
+ // lr points to area in reset vector block containing PEI core address
+ ldr r2, [lr] // pei core arg 3
+
+ // move sec startup address into a data register
+ // ensure we're jumping to FV version of the code (not boot remapped alias)
+#ifndef __APPLE__
+// This does not generate a valid relocation for Xcode. Fix me...
+ ldr r4, ASM_PFX(StartupAddr)
+
+ // jump to SEC C code
+ blx r4
+#endif
+
+
+ASM_PFX(ShouldNeverGetHere):
+ // _CEntryPoint should never return
+ b ASM_PFX(ShouldNeverGetHere)
+
+
diff --git a/ArmRealViewEbPkg/SecForPei/Arm/ModuleEntryPoint.asm b/ArmRealViewEbPkg/SecForPei/Arm/ModuleEntryPoint.asm new file mode 100755 index 0000000000..135cb8d207 --- /dev/null +++ b/ArmRealViewEbPkg/SecForPei/Arm/ModuleEntryPoint.asm @@ -0,0 +1,80 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmEb/ArmEb.h>
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ IMPORT CEntryPoint
+ EXPORT _ModuleEntryPoint
+
+ PRESERVE8
+ AREA ModuleEntryPoint, CODE, READONLY
+
+
+StartupAddr DCD CEntryPoint
+
+_ModuleEntryPoint
+
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
+
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)
+ mcr p15, 0, r0, c1, c0, 2
+ mov r0, #0x40000000 // Set EN bit in FPEXC
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
+
+ // Set CPU vectors to 0 (which is currently flash)
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
+ mcr p15, 0, r0, c12, c0, 0
+ isb // Sync changes to control registers
+
+ //
+ // Set stack based on PCD values. Need to do it this way to make C code work
+ // when it runs from FLASH.
+ //
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r0) // temp ram base arg 0 TODO: change "stackbase" to "temprambase"
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r1) // temp ram size arg 1
+ lsr r3, r1, #1 // r4 = size of temp mem / 2
+ add r3, r3, r0 // r2 = temp ram base + r4
+ mov r13, r3 // result: stack pointer = temp ram base + (size of temp mem / 2)
+
+ // lr points to area in reset vector block containing PEI core address
+ ldr r2, [lr] // pei core arg 3
+
+ // move sec startup address into a data register
+ // ensure we're jumping to FV version of the code (not boot remapped alias)
+ ldr r4, StartupAddr
+
+ // jump to SEC C code
+ blx r4
+
+ // Call C entry point
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP
+ // blx CEntryPoint
+
+ShouldNeverGetHere
+ // _CEntryPoint should never return
+ b ShouldNeverGetHere
+
+ END
+
+
diff --git a/ArmRealViewEbPkg/SecForPei/Arm/SwitchStack.S b/ArmRealViewEbPkg/SecForPei/Arm/SwitchStack.S new file mode 100755 index 0000000000..b4b62d935a --- /dev/null +++ b/ArmRealViewEbPkg/SecForPei/Arm/SwitchStack.S @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+.text
+.align 3
+
+.globl ASM_PFX(SecSwitchStack)
+
+
+
+#/**
+# This allows the caller to switch the stack and return
+#
+# @param StackDelta Signed amount by which to modify the stack pointer
+#
+# @return Nothing. Goes to the Entry Point passing in the new parameters
+#
+#**/
+#VOID
+#EFIAPI
+#SecSwitchStack (
+# VOID *StackDelta
+# )#
+#
+ASM_PFX(SecSwitchStack):
+ mov R1, R13
+ add R1, R0, R1
+ mov R13, R1
+ bx LR
+
+
+
diff --git a/ArmRealViewEbPkg/SecForPei/Arm/SwitchStack.asm b/ArmRealViewEbPkg/SecForPei/Arm/SwitchStack.asm new file mode 100755 index 0000000000..10da81d6ac --- /dev/null +++ b/ArmRealViewEbPkg/SecForPei/Arm/SwitchStack.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ EXPORT SecSwitchStack
+
+ AREA Switch_Stack, CODE, READONLY
+
+;/**
+; This allows the caller to switch the stack and return
+;
+; @param StackDelta Signed amount by which to modify the stack pointer
+;
+; @return Nothing. Goes to the Entry Point passing in the new parameters
+;
+;**/
+;VOID
+;EFIAPI
+;SecSwitchStack (
+; VOID *StackDelta
+; );
+;
+SecSwitchStack
+ MOV R1, SP
+ ADD R1, R0, R1
+ MOV SP, R1
+ BX LR
+ END
diff --git a/ArmRealViewEbPkg/SecForPei/Sec.c b/ArmRealViewEbPkg/SecForPei/Sec.c new file mode 100755 index 0000000000..fbe5b9a2d0 --- /dev/null +++ b/ArmRealViewEbPkg/SecForPei/Sec.c @@ -0,0 +1,119 @@ +/** @file
+ C Entry point for the SEC. First C code after the reset vector.
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Ppi/TemporaryRamSupport.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <ArmEb/ArmEb.h>
+
+EFI_STATUS
+EFIAPI
+SecTemporaryRamSupport (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
+ IN UINTN CopySize
+ );
+
+VOID
+SecSwitchStack (
+ INTN StackDelta
+ );
+
+TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};
+
+EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gEfiTemporaryRamSupportPpiGuid,
+ &mSecTemporaryRamSupportPpi
+ }
+};
+
+
+VOID
+EFIAPI
+_ModuleEntryPoint(
+ VOID
+ );
+
+VOID
+CEntryPoint (
+ IN UINTN TempRamBase,
+ IN UINTN TempRamSize,
+ IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
+ )
+{
+ EFI_SEC_PEI_HAND_OFF SecCoreData;
+
+ // Turn off remapping NOR to 0. We can will now see DRAM in low memory (although it is not yet initialized)
+ // note: this makes SEC platform-specific for the EB platform
+ MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE
+
+ //
+ // Bind this information into the SEC hand-off state
+ // Note: this must be in sync with the stuff in the asm file
+ // Note also: HOBs (pei temp ram) MUST be above stack
+ //
+ SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);
+ SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);
+ SecCoreData.TemporaryRamBase = (VOID*)(UINTN)TempRamBase;
+ SecCoreData.TemporaryRamSize = TempRamSize;
+ SecCoreData.PeiTemporaryRamBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase + (SecCoreData.TemporaryRamSize / 2));
+ SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;
+ SecCoreData.StackBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase);
+ SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;
+
+ // jump to pei core entry point
+ (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);
+}
+
+EFI_STATUS
+EFIAPI
+SecTemporaryRamSupport (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
+ IN UINTN CopySize
+ )
+{
+ //
+ // Migrate the whole temporary memory to permenent memory.
+ //
+ CopyMem (
+ (VOID*)(UINTN)PermanentMemoryBase,
+ (VOID*)(UINTN)TemporaryMemoryBase,
+ CopySize
+ );
+
+ SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));
+
+ //
+ // We need *not* fix the return address because currently,
+ // The PeiCore is excuted in flash.
+ //
+
+ //
+ // Simulate to invalid temporary memory, terminate temporary memory
+ //
+ //ZeroMem ((VOID*)(UINTN)TemporaryMemoryBase, CopySize);
+
+ return EFI_SUCCESS;
+}
+
diff --git a/ArmRealViewEbPkg/SecForPei/Sec.inf b/ArmRealViewEbPkg/SecForPei/Sec.inf new file mode 100755 index 0000000000..e1673f0189 --- /dev/null +++ b/ArmRealViewEbPkg/SecForPei/Sec.inf @@ -0,0 +1,57 @@ + +#/** @file +# SEC - Reset vector code that jumps to C and loads DXE core +# +# Copyright (c) 2008, Apple Inc. All rights reserved.<BR> +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ArmRealViewEbSec + FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8 + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + + + +[Sources.ARM] + Sec.c + Arm/SwitchStack.asm + Arm/SwitchStack.S + Arm/ModuleEntryPoint.S + Arm/ModuleEntryPoint.asm + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmRealViewEbPkg/ArmRealViewEbPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + +[Ppis] + gEfiTemporaryRamSupportPpiGuid + +[FeaturePcd] + +[FixedPcd] + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress + gEmbeddedTokenSpaceGuid.PcdPrePiStackSize + gEmbeddedTokenSpaceGuid.PcdPrePiStackBase + gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize + gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress + + diff --git a/ArmRealViewEbPkg/TimerDxe/Timer.c b/ArmRealViewEbPkg/TimerDxe/Timer.c new file mode 100755 index 0000000000..0a7e054610 --- /dev/null +++ b/ArmRealViewEbPkg/TimerDxe/Timer.c @@ -0,0 +1,412 @@ +/** @file + Template for Timer Architecture Protocol driver of the ARM flavor + + Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +#include <PiDxe.h> + +#include <Library/BaseLib.h> +#include <Library/DebugLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiLib.h> +#include <Library/PcdLib.h> +#include <Library/IoLib.h> + +#include <Protocol/Timer.h> +#include <Protocol/HardwareInterrupt.h> + +#include <ArmEb/ArmEb.h> + + +// The notification function to call on every timer interrupt. +volatile EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL; + + +// The current period of the timer interrupt +volatile UINT64 mTimerPeriod = 0; + +// Cached copy of the Hardware Interrupt protocol instance +EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL; + +// Cached interrupt vector +UINTN gVector; + +UINT32 mLastTickCount; + + +/** + + C Interrupt Handler calledin the interrupt context when Source interrupt is active. + + + @param Source Source of the interrupt. Hardware routing off a specific platform defines + what source means. + + @param SystemContext Pointer to system register context. Mostly used by debuggers and will + update the system context after the return from the interrupt if + modified. Don't change these values unless you know what you are doing + +**/ +VOID +EFIAPI +TimerInterruptHandler ( + IN HARDWARE_INTERRUPT_SOURCE Source, + IN EFI_SYSTEM_CONTEXT SystemContext + ) +{ + EFI_TPL OriginalTPL; + + // + // DXE core uses this callback for the EFI timer tick. The DXE core uses locks + // that raise to TPL_HIGH and then restore back to current level. Thus we need + // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. + // + OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); + + // clear the periodic interrupt + + MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_INT_CLR_REG, 0); + + // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers + gInterrupt->EndOfInterrupt (gInterrupt, Source); + + if (mTimerNotifyFunction) { + mTimerNotifyFunction (mTimerPeriod); + } + + gBS->RestoreTPL (OriginalTPL); +} + + +/** + This function registers the handler NotifyFunction so it is called every time + the timer interrupt fires. It also passes the amount of time since the last + handler call to the NotifyFunction. If NotifyFunction is NULL, then the + handler is unregistered. If the handler is registered, then EFI_SUCCESS is + returned. If the CPU does not support registering a timer interrupt handler, + then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler + when a handler is already registered, then EFI_ALREADY_STARTED is returned. + If an attempt is made to unregister a handler when a handler is not registered, + then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to + register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR + is returned. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param NotifyFunction The function to call when a timer interrupt fires. This + function executes at TPL_HIGH_LEVEL. The DXE Core will + register a handler for the timer interrupt, so it can know + how much time has passed. This information is used to + signal timer based events. NULL will unregister the handler. + @retval EFI_SUCCESS The timer handler was registered. + @retval EFI_UNSUPPORTED The platform does not support timer interrupts. + @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already + registered. + @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not + previously registered. + @retval EFI_DEVICE_ERROR The timer handler could not be registered. + +**/ +EFI_STATUS +EFIAPI +TimerDriverRegisterHandler ( + IN EFI_TIMER_ARCH_PROTOCOL *This, + IN EFI_TIMER_NOTIFY NotifyFunction + ) +{ + if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) { + return EFI_INVALID_PARAMETER; + } + + if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) { + return EFI_ALREADY_STARTED; + } + + mTimerNotifyFunction = NotifyFunction; + + return EFI_SUCCESS; +} + +/** + + This function adjusts the period of timer interrupts to the value specified + by TimerPeriod. If the timer period is updated, then the selected timer + period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If + the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. + If an error occurs while attempting to update the timer period, then the + timer hardware will be put back in its state prior to this call, and + EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt + is disabled. This is not the same as disabling the CPU's interrupts. + Instead, it must either turn off the timer hardware, or it must adjust the + interrupt controller so that a CPU interrupt is not generated when the timer + interrupt fires. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If + the timer hardware is not programmable, then EFI_UNSUPPORTED is + returned. If the timer is programmable, then the timer period + will be rounded up to the nearest timer period that is supported + by the timer hardware. If TimerPeriod is set to 0, then the + timer interrupts will be disabled. + + + @retval EFI_SUCCESS The timer period was changed. + @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. + @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. + +**/ +EFI_STATUS +EFIAPI +TimerDriverSetTimerPeriod ( + IN EFI_TIMER_ARCH_PROTOCOL *This, + IN UINT64 TimerPeriod + ) +{ + EFI_STATUS Status; + UINT64 TimerTicks; + + + // always disable the timer + MmioAnd32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE); + + if (TimerPeriod == 0) { + // leave timer disabled from above, and... + + // disable timer 0/1 interrupt for a TimerPeriod of 0 + + + Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector); + } else { + // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10) + + TimerTicks = DivU64x32 (TimerPeriod, 10); + + + + // if it's larger than 32-bits, pin to highest value + + if (TimerTicks > 0xffffffff) { + + TimerTicks = 0xffffffff; + + } + + + + // Program the SP804 timer with the new count value + + MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_LOAD_REG, TimerTicks); + + + + // enable the timer + + MmioOr32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE); + + + + // enable timer 0/1 interrupts + + Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector); + } + + // + // Save the new timer period + // + mTimerPeriod = TimerPeriod; + return Status; +} + + +/** + This function retrieves the period of timer interrupts in 100 ns units, + returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod + is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is + returned, then the timer is currently disabled. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If + 0 is returned, then the timer is currently disabled. + + + @retval EFI_SUCCESS The timer period was returned in TimerPeriod. + @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. + +**/ +EFI_STATUS +EFIAPI +TimerDriverGetTimerPeriod ( + IN EFI_TIMER_ARCH_PROTOCOL *This, + OUT UINT64 *TimerPeriod + ) +{ + if (TimerPeriod == NULL) { + return EFI_INVALID_PARAMETER; + } + + *TimerPeriod = mTimerPeriod; + return EFI_SUCCESS; +} + +/** + This function generates a soft timer interrupt. If the platform does not support soft + timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. + If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() + service, then a soft timer interrupt will be generated. If the timer interrupt is + enabled when this service is called, then the registered handler will be invoked. The + registered handler should not be able to distinguish a hardware-generated timer + interrupt from a software-generated timer interrupt. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + + @retval EFI_SUCCESS The soft timer interrupt was generated. + @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts. + +**/ +EFI_STATUS +EFIAPI +TimerDriverGenerateSoftInterrupt ( + IN EFI_TIMER_ARCH_PROTOCOL *This + ) +{ + return EFI_UNSUPPORTED; +} + + + +/** + Interface stucture for the Timer Architectural Protocol. + + @par Protocol Description: + This protocol provides the services to initialize a periodic timer + interrupt, and to register a handler that is called each time the timer + interrupt fires. It may also provide a service to adjust the rate of the + periodic timer interrupt. When a timer interrupt occurs, the handler is + passed the amount of time that has passed since the previous timer + interrupt. + + @param RegisterHandler + Registers a handler that will be called each time the + timer interrupt fires. TimerPeriod defines the minimum + time between timer interrupts, so TimerPeriod will also + be the minimum time between calls to the registered + handler. + + @param SetTimerPeriod + Sets the period of the timer interrupt in 100 nS units. + This function is optional, and may return EFI_UNSUPPORTED. + If this function is supported, then the timer period will + be rounded up to the nearest supported timer period. + + + @param GetTimerPeriod + Retrieves the period of the timer interrupt in 100 nS units. + + @param GenerateSoftInterrupt + Generates a soft timer interrupt that simulates the firing of + the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for + a period of time. + +**/ +EFI_TIMER_ARCH_PROTOCOL gTimer = { + TimerDriverRegisterHandler, + TimerDriverSetTimerPeriod, + TimerDriverGetTimerPeriod, + TimerDriverGenerateSoftInterrupt +}; + + +/** + Initialize the state information for the Timer Architectural Protocol and + the Timer Debug support protocol that allows the debugger to break into a + running program. + + @param ImageHandle of the loaded driver + @param SystemTable Pointer to the System Table + + @retval EFI_SUCCESS Protocol registered + @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure + @retval EFI_DEVICE_ERROR Hardware problems + +**/ +EFI_STATUS +EFIAPI +TimerInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_HANDLE Handle = NULL; + EFI_STATUS Status; + + Status = gBS->LocateProtocol(&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);
+ ASSERT_EFI_ERROR(Status);
+ + // configure free running timer (TIMER1) for 1MHz operation + + + // AND disable clock, OR configure 1MHz clock + MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER1_EN, SP810_SYS_CTRL_TIMER1_TIMCLK); + + + // Renable timer + MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_EN); + + + // configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled + MmioWrite32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1); + + // enable the free running timer + MmioOr32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE); + + // record free running tick value (should be close to 0xffffffff) + mLastTickCount = MmioRead32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CURRENT_REG); + + + // Disable the timer + Status = TimerDriverSetTimerPeriod (&gTimer, 0); + ASSERT_EFI_ERROR (Status); + + // Install interrupt handler + gVector = EB_TIMER01_INTERRUPT_NUM; + Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler); + ASSERT_EFI_ERROR (Status); + + + // configure periodic timer (TIMER0) for 1MHz operation + MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER0_EN, SP810_SYS_CTRL_TIMER0_TIMCLK); + + + // Renable timer + MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_EN); + + + // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled + MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE); + + // Set up default timer + Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD + ASSERT_EFI_ERROR (Status); + + // Install the Timer Architectural Protocol onto a new handle + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gEfiTimerArchProtocolGuid, &gTimer, + NULL + ); + ASSERT_EFI_ERROR(Status); + + return Status; +} + diff --git a/ArmRealViewEbPkg/TimerDxe/TimerDxe.inf b/ArmRealViewEbPkg/TimerDxe/TimerDxe.inf new file mode 100755 index 0000000000..3929861ae3 --- /dev/null +++ b/ArmRealViewEbPkg/TimerDxe/TimerDxe.inf @@ -0,0 +1,55 @@ +#/** @file +# +# Component discription file for Timer module +# +# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR> +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ArmEbTimerDxe + FILE_GUID = B93B3662-C599-42ad-99E5-CD592431AE97 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = TimerInitialize + +[Sources.common] + Timer.c + +[Packages] + MdePkg/MdePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmRealViewEbPkg/ArmRealViewEbPkg.dec + +[LibraryClasses] + BaseLib + UefiRuntimeServicesTableLib + UefiLib + UefiBootServicesTableLib + BaseMemoryLib + DebugLib + UefiDriverEntryPoint + IoLib + +[Guids] + +[Protocols] + gEfiTimerArchProtocolGuid + gHardwareInterruptProtocolGuid + +[Pcd.common] + gEmbeddedTokenSpaceGuid.PcdTimerPeriod + gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds + + +[Depex] + gHardwareInterruptProtocolGuid
\ No newline at end of file diff --git a/ArmRealViewEbPkg/b.bat b/ArmRealViewEbPkg/b.bat new file mode 100755 index 0000000000..28aab38d62 --- /dev/null +++ b/ArmRealViewEbPkg/b.bat @@ -0,0 +1,43 @@ +@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+@REM This program and the accompanying materials
+@REM are licensed and made available under the terms and conditions of the BSD License
+@REM which accompanies this distribution. The full text of the license may be found at
+@REM http://opensource.org/licenses/bsd-license.php
+@REM
+@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+@REM
+
+@REM Example usage of this script. default is a DEBUG build
+@REM b
+@REM b clean
+@REM b release
+@REM b release clean
+@REM b -v -y build.log
+
+ECHO OFF
+@REM Setup Build environment. Sets WORKSPACE and puts build in path
+CALL ..\edksetup.bat
+
+@REM Set for tools chain. Currently RVCT31
+SET TARGET_TOOLS=RVCT31
+SET TARGET=DEBUG
+
+@if /I "%1"=="RELEASE" (
+ @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it
+ SET TARGET=RELEASE
+ shift /1
+)
+
+SET BUILD_ROOT=%WORKSPACE%\Build\ArmRealViewEb\%TARGET%_%TARGET_TOOLS%
+
+@REM Build the ARM RealView EB firmware and creat an FD (FLASH Device) Image.
+CALL build -p ArmRealViewEbPkg\ArmRealViewEbPkg.dsc -a ARM -t RVCT31 -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
+@if ERRORLEVEL 1 goto Exit
+
+@if /I "%1"=="CLEAN" goto Clean
+
+:Exit
+EXIT /B
+
+:Clean
diff --git a/ArmRealViewEbPkg/ba.bat b/ArmRealViewEbPkg/ba.bat new file mode 100755 index 0000000000..545da382bf --- /dev/null +++ b/ArmRealViewEbPkg/ba.bat @@ -0,0 +1,56 @@ +@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR> +@REM This program and the accompanying materials +@REM are licensed and made available under the terms and conditions of the BSD License +@REM which accompanies this distribution. The full text of the license may be found at +@REM http://opensource.org/licenses/bsd-license.php +@REM +@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +@REM + +@REM Example usage of this script. default is a DEBUG build +@REM b +@REM b clean +@REM b release +@REM b release clean +@REM b -v -y build.log + +ECHO OFF +@REM Setup Build environment. Sets WORKSPACE and puts build in path +CALL ..\edksetup.bat + +@REM Set for tools chain. Currently ARMGCC +SET TARGET_TOOLS=ARMGCC +SET TARGET=DEBUG + + +@if /I "%1"=="RELEASE" ( + + @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it + + SET TARGET=RELEASE + + shift /1 + +) + + +SET BUILD_ROOT=%WORKSPACE%\Build\ArmRealViewEb\%TARGET%_%TARGET_TOOLS% + +@REM Build the ARM RealView EB firmware and creat an FD (FLASH Device) Image. +CALL build -p ArmRealViewEbPkg\ArmRealViewEbPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8 +@if ERRORLEVEL 1 goto Exit + +@if /I "%1"=="CLEAN" goto Clean + + +ECHO Patching ..\Debugger_scripts ... +SET DEBUGGER_SCRIPT=Debugger_scripts +@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do ( + @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE% +) + +:Exit +EXIT /B + +:Clean diff --git a/ArmRealViewEbPkg/build.sh b/ArmRealViewEbPkg/build.sh new file mode 100755 index 0000000000..449ed22fd8 --- /dev/null +++ b/ArmRealViewEbPkg/build.sh @@ -0,0 +1,118 @@ +#!/bin/bash +# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +set -e +shopt -s nocasematch + +function process_debug_scripts { + if [[ -d $1 ]]; then + for filename in `ls $1` + do + sed -e "s@ZZZZZZ@$BUILD_ROOT@g" -e "s@WWWWWW@$WORKSPACE@g" \ + "$1/$filename" \ + > "$BUILD_ROOT/$filename" + + #For ARMCYGWIN, we have to change /cygdrive/c to c: + if [[ $TARGET_TOOLS == RVCT31CYGWIN ]] + then + mv "$BUILD_ROOT/$filename" "$BUILD_ROOT/$filename"_temp + sed -e "s@/cygdrive/\(.\)@\1:@g" \ + "$BUILD_ROOT/$filename"_temp \ + > "$BUILD_ROOT/$filename" + rm -f "$BUILD_ROOT/$filename"_temp + fi + done + fi +} + + +# +# Setup workspace if it is not set +# +if [ -z "$WORKSPACE" ] +then + echo Initializing workspace + cd .. + export EDK_TOOLS_PATH=`pwd`/BaseTools + source edksetup.sh BaseTools +else + echo Building from: $WORKSPACE +fi + +# +# Pick a default tool type for a given OS +# +case `uname` in + CYGWIN*) + TARGET_TOOLS=RVCT31CYGWIN + ;; + Linux*) + # Not tested + TARGET_TOOLS=ARMGCC + ;; + Darwin*) + Major=$(uname -r | cut -f 1 -d '.') + if [[ $Major == 9 ]] + then + # Not supported by this open source project + TARGET_TOOLS=XCODE31 + else + TARGET_TOOLS=XCODE32 + fi + ;; +esac + +TARGET=DEBUG +for arg in "$@" +do + if [[ $arg == RELEASE ]]; + then + TARGET=RELEASE + fi +done + +BUILD_ROOT=$WORKSPACE/Build/ArmRealViewEb/"$TARGET"_"$TARGET_TOOLS" + +if [[ ! -e $EDK_TOOLS_PATH/Source/C/bin ]]; +then + # build the tools if they don't yet exist + echo Building tools: $EDK_TOOLS_PATH + make -C $EDK_TOOLS_PATH +else + echo using prebuilt tools +fi + +# +# Build the edk2 ArmEb code +# +if [[ $TARGET == RELEASE ]]; then + build -p $WORKSPACE/ArmRealViewEbPkg/ArmRealViewEbPkg.dsc -a ARM -t $TARGET_TOOLS -b $TARGET -D DEBUG_TARGET=RELEASE $2 $3 $4 $5 $6 $7 $8 +else + build -p $WORKSPACE/ArmRealViewEbPkg/ArmRealViewEbPkg.dsc -a ARM -t $TARGET_TOOLS -b $TARGET $1 $2 $3 $4 $5 $6 $7 $8 +fi + + +for arg in "$@" +do + if [[ $arg == clean ]]; then + # no need to post process if we are doing a clean + exit + elif [[ $arg == cleanall ]]; then + make -C $EDK_TOOLS_PATH clean + exit + + fi +done + + +echo Creating debugger scripts +process_debug_scripts $WORKSPACE/ArmRealViewEbPkg/Debugger_scripts + |