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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2015-12-18 06:52:09 +0000
committervanjeff <vanjeff@Edk2>2015-12-18 06:52:09 +0000
commit8bc5c95c550103317b739d3d620b189d03121062 (patch)
tree746d77be01d1e069b061e4fbd765db0e141f09dd /BaseTools/Source/C/GenFw/Elf32Convert.c
parent033469d9a9ed257afe3073e9d97ef4a85cbcf366 (diff)
downloadedk2-platforms-8bc5c95c550103317b739d3d620b189d03121062.tar.xz
BaseTools RVCT: use scatter file to enforce minimum section alignment
Up until SVN r18540, GenFw created invalid PE/COFF binaries for the ARM architecture, by allowing PE/COFF .data sections to appear at offsets that were not aligned to the global PE/COFF section alignment. The reason for this was that the relocation metadata emitted by RVCT's armlink only contains dynamic absolute relocations, so it is impossible to recalculate relative relocations between .text and .data, and so the relative offset between the two needs to be preserved. Since r18540, we do align .data to the PE/COFF section alignment, resulting in potentially corrupt PE/COFF binaries unless .data happens to appear at a 32-byte aligned offset. So let's introduce a RVCT scatter file that sets this alignment for the ELF .data section (and subsequent .bss section). At the same time, set the start offset to 0x220 bytes (which is the size of our 32-bit PE/COFF header) so that the memory layouts are identical between ELF and PE/COFF. Also add a 4 KB aligned version that can be used to build DXE_RUNTIME_DRIVER modules with runtime memory protection enabled. (Sync patch r19235 from main trunk.) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Eugene Cohen <eugene@hp.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@19382 6f19259b-4bc3-4df7-8a09-765794883524
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