diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-07-06 20:08:28 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-07-06 20:08:28 +0000 |
| commit | 7f21c4a2276901c3bfc8712eabd170a41501aa12 (patch) | |
| tree | 1cd9334fa1cb07fa2d8f748866daf58491c2bf4d /BeagleBoardPkg/Library/BeagleBoardLib | |
| parent | 803f94eef966dd952c4616106b17b5e54eb266a1 (diff) | |
| download | edk2-platforms-7f21c4a2276901c3bfc8712eabd170a41501aa12.tar.xz | |
BeagleBoardPkg: Implement ArmPlatformLib and the ARM PCDs to reuse ARM common components on the BeagleBoard.
To build the UEFI BeagleBoard firmware using this ARM framework either use ./build-next.sh
or directly call the EDK2 BaseTools with BeagleBoardPkg-next.dsc.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11998 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'BeagleBoardPkg/Library/BeagleBoardLib')
7 files changed, 748 insertions, 0 deletions
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c new file mode 100755 index 0000000000..a74b60d91a --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c @@ -0,0 +1,124 @@ +/** @file +* +* Copyright (c) 2011, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include <Library/IoLib.h> +#include <Library/ArmPlatformLib.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> + +VOID +PadConfiguration ( + VOID + ); + +VOID +ClockInit ( + VOID + ); + +/** + Return if Trustzone is supported by your platform + + A non-zero value must be returned if you want to support a Secure World on your platform. + ArmPlatformTrustzoneInit() will later set up the secure regions. + This function can return 0 even if Trustzone is supported by your processor. In this case, + the platform will continue to run in Secure World. + + @return A non-zero value if Trustzone supported. + +**/ +UINTN +ArmPlatformTrustzoneSupported ( + VOID + ) +{ + // The BeagleBoard starts in Normal World (Non Secure World) + return FALSE; +} + +/** + Initialize the Secure peripherals and memory regions + + If Trustzone is supported by your platform then this function makes the required initialization + of the secure peripherals and memory regions. + +**/ +VOID +ArmPlatformTrustzoneInit ( + VOID + ) +{ + ASSERT(FALSE); +} + +/** + Remap the memory at 0x0 + + Some platform requires or gives the ability to remap the memory at the address 0x0. + This function can do nothing if this feature is not relevant to your platform. + +**/ +VOID +ArmPlatformBootRemapping ( + VOID + ) +{ + // Do nothing for the BeagleBoard +} + +/** + Return the current Boot Mode + + This function returns the boot reason on the platform + +**/ +EFI_BOOT_MODE +ArmPlatformGetBootMode ( + VOID + ) +{ + return BOOT_WITH_FULL_CONFIGURATION; +} + +/** + Initialize controllers that must setup at the early stage + + Some peripherals must be initialized in Secure World. + For example, some L2x0 requires to be initialized in Secure World + +**/ +VOID +ArmPlatformNormalInitialize ( + VOID + ) { + //Set up Pin muxing. + PadConfiguration (); + + // Set up system clocking + ClockInit (); +} + +/** + Initialize the system (or sometimes called permanent) memory + + This memory is generally represented by the DRAM. + +**/ +VOID +ArmPlatformInitializeSystemMemory ( + VOID + ) +{ + // We do not need to initialize the System Memory on RTSM +} diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S new file mode 100755 index 0000000000..36044aaa62 --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S @@ -0,0 +1,57 @@ +// +// Copyright (c) 2011, ARM Limited. All rights reserved. +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +// + +#include <AsmMacroIoLib.h> +#include <Base.h> +#include <Library/PcdLib.h> +#include <ArmPlatform.h> +#include <AutoGen.h> + +.text +.align 3 + +GCC_ASM_EXPORT(ArmPlatformIsBootMemoryInitialized) +GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory) + +/** + Called at the early stage of the Boot phase to know if the memory has already been initialized + + Running the code from the reset vector does not mean we start from cold boot. In some case, we + can go through this code with the memory already initialized. + Because this function is called at the early stage, the implementation must not use the stack. + Its implementation must probably done in assembly to ensure this requirement. + + @return Return a non zero value if initialized + +**/ +ASM_PFX(ArmPlatformIsBootMemoryInitialized): + // The system memory is initialized by the BeagleBoard firmware + mov r0, #1 + bx lr + + +/** + Initialize the memory where the initial stacks will reside + + This memory can contain the initial stacks (Secure and Secure Monitor stacks). + In some platform, this region is already initialized and the implementation of this function can + do nothing. This memory can also represent the Secure RAM. + This function is called before the satck has been set up. Its implementation must ensure the stack + pointer is not used (probably required to use assembly language) + +**/ +ASM_PFX(ArmPlatformInitializeBootMemory): + // We must need to go into this function + bx lr + +ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm new file mode 100755 index 0000000000..9d08cd648d --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm @@ -0,0 +1,58 @@ +//
+// Copyright (c) 2011, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <ArmPlatform.h>
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ EXPORT ArmPlatformIsBootMemoryInitialized
+ EXPORT ArmPlatformInitializeBootMemory
+
+ PRESERVE8
+ AREA BeagleBoardHelper, CODE, READONLY
+
+/**
+ Called at the early stage of the Boot phase to know if the memory has already been initialized
+
+ Running the code from the reset vector does not mean we start from cold boot. In some case, we
+ can go through this code with the memory already initialized.
+ Because this function is called at the early stage, the implementation must not use the stack.
+ Its implementation must probably done in assembly to ensure this requirement.
+
+ @return Return a non zero value if initialized
+
+**/
+ArmPlatformIsBootMemoryInitialized
+ // The system memory is initialized by the BeagleBoard firmware
+ mov r0, #1
+ bx lr
+
+/**
+ Initialize the memory where the initial stacks will reside
+
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).
+ In some platform, this region is already initialized and the implementation of this function can
+ do nothing. This memory can also represent the Secure RAM.
+ This function is called before the satck has been set up. Its implementation must ensure the stack
+ pointer is not used (probably required to use assembly language)
+
+**/
+ArmPlatformInitializeBootMemory
+ // We must need to go into this function
+ bx lr
+
+ END
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf new file mode 100755 index 0000000000..d9188ad160 --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf @@ -0,0 +1,55 @@ +#/* @file +# Copyright (c) 2011, ARM Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#*/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = BeagleBoardLib + FILE_GUID = 736343a0-1d96-11e0-aaaa-0002a5d5c51b + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + Omap35xxPkg/Omap35xxPkg.dec + BeagleBoardPkg/BeagleBoardPkg.dec + +[LibraryClasses] + IoLib + ArmLib +# OmapLib + MemoryAllocationLib + +[Sources.common] + BeagleBoard.c + BeagleBoardMem.c + BeagleBoardHelper.asm | RVCT + BeagleBoardHelper.S | GCC + PadConfiguration.c + Clock.c + +[Protocols] + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdCacheEnable + +[FixedPcd] + gArmTokenSpaceGuid.PcdNormalFdBaseAddress + gArmTokenSpaceGuid.PcdNormalFdSize + + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c new file mode 100755 index 0000000000..6af30730ed --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c @@ -0,0 +1,102 @@ +/** @file
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/IoLib.h>
+
+#include <BeagleBoard.h>
+
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
+
+/**
+ Return the Virtual Memory Map of your platform
+
+ This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
+
+ @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
+ Virtual Memory mapping. This array must be ended by a zero-filled
+ entry
+
+**/
+VOID
+ArmPlatformGetVirtualMemoryMap (
+ IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
+ )
+{
+ ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
+ UINTN Index = 0;
+ ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
+
+ ASSERT(VirtualMemoryMap != NULL);
+
+ VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
+ if (VirtualMemoryTable == NULL) {
+ return;
+ }
+
+ if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;
+ } else {
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
+ }
+
+ // ReMap (Either NOR Flash or DRAM)
+ VirtualMemoryTable[Index].PhysicalBase = PcdGet32(PcdSystemMemoryBase);
+ VirtualMemoryTable[Index].VirtualBase = PcdGet32(PcdSystemMemoryBase);
+ VirtualMemoryTable[Index].Length = PcdGet32(PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes = CacheAttributes;
+
+ // SOC Registers. L3 interconnects
+ VirtualMemoryTable[++Index].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
+ VirtualMemoryTable[Index].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
+
+ // SOC Registers. L4 interconnects
+ VirtualMemoryTable[++Index].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
+ VirtualMemoryTable[Index].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
+ VirtualMemoryTable[Index].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
+
+ // End of Table
+ VirtualMemoryTable[++Index].PhysicalBase = 0;
+ VirtualMemoryTable[Index].VirtualBase = 0;
+ VirtualMemoryTable[Index].Length = 0;
+ VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+
+ ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+
+ *VirtualMemoryMap = VirtualMemoryTable;
+}
+
+/**
+ Return the EFI Memory Map of your platform
+
+ This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource
+ Descriptor HOBs used by DXE core.
+
+ @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an
+ EFI Memory region. This array must be ended by a zero-filled entry
+
+**/
+EFI_STATUS
+ArmPlatformGetAdditionalSystemMemory (
+ OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
+ )
+{
+ return EFI_UNSUPPORTED;
+}
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/Clock.c b/BeagleBoardPkg/Library/BeagleBoardLib/Clock.c new file mode 100755 index 0000000000..8de24f851c --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/Clock.c @@ -0,0 +1,70 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+
+#include <Omap3530/Omap3530.h>
+
+VOID
+ClockInit (
+ VOID
+ )
+{
+ //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
+
+ // Enable PLL5 and set to 120 MHz as a reference clock.
+ MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
+ MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
+ MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
+
+ // Turn on functional & interface clocks to the USBHOST power domain
+ MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
+ | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
+ MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
+
+ // Turn on functional & interface clocks to the USBTLL block.
+ MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
+ MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
+
+ // Turn on functional & interface clocks to MMC1 and I2C1 modules.
+ MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
+ | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);
+ MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
+ | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);
+
+ // Turn on functional & interface clocks to various Peripherals.
+ MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
+ | CM_FCLKEN_PER_EN_GPT3_ENABLE
+ | CM_FCLKEN_PER_EN_GPT4_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO2_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO3_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO4_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO5_ENABLE
+ | CM_FCLKEN_PER_EN_GPIO6_ENABLE);
+ MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
+ | CM_ICLKEN_PER_EN_GPT3_ENABLE
+ | CM_ICLKEN_PER_EN_GPT4_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO2_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO3_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO4_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO5_ENABLE
+ | CM_ICLKEN_PER_EN_GPIO6_ENABLE);
+
+ // Turn on functional & inteface clocks to various wakeup modules.
+ MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
+ | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);
+ MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
+ | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);
+}
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/PadConfiguration.c b/BeagleBoardPkg/Library/BeagleBoardLib/PadConfiguration.c new file mode 100755 index 0000000000..ddd9296120 --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/PadConfiguration.c @@ -0,0 +1,282 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+#include <Omap3530/Omap3530.h>
+
+#define NUM_PINS 238
+
+PAD_CONFIGURATION PadConfigurationTable[NUM_PINS] = {
+ //Pin, MuxMode, PullConfig, InputEnable
+ { SDRC_D0, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D1, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D2, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D3, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D4, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D5, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D6, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D7, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D8, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D9, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D10, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D11, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D12, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D13, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D14, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D15, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D16, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D17, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D18, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D19, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D20, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D21, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D22, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D23, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D24, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D25, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D26, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D27, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D28, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D29, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D30, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_D31, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_CLK, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_DQS0, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_CKE0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { SDRC_CKE1, MUXMODE7, PULL_DISABLED, INPUT },
+ { SDRC_DQS1, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_DQS2, MUXMODE0, PULL_DISABLED, INPUT },
+ { SDRC_DQS3, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_A1, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A2, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A3, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A4, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A5, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A6, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A7, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A8, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A9, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_A10, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_D0, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D1, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D2, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D3, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D4, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D5, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D6, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D7, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D8, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D9, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D10, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D11, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D12, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D13, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D14, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_D15, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NCS0, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NCS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS2, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS3, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS4, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { GPMC_NCS5, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_NCS6, MUXMODE1, PULL_DISABLED, INPUT },
+ { GPMC_NCS7, MUXMODE1, PULL_UP_SELECTED, INPUT },
+ { GPMC_CLK, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_NADV_ALE, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NOE, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NWE, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NBE0_CLE, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { GPMC_NBE1, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_NWP, MUXMODE0, PULL_DISABLED, INPUT },
+ { GPMC_WAIT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { GPMC_WAIT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { GPMC_WAIT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { GPMC_WAIT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { DSS_PCLK, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_HSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_PSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_ACBIAS, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA0, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA1, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA2, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA3, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA4, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA5, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA6, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA7, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA8, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA9, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA10, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA11, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA12, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA13, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA14, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA15, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA16, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA17, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA18, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA19, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA20, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA21, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA22, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { DSS_DATA23, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CAM_HS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { CAM_VS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { CAM_XCLKA, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CAM_PCLK, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { CAM_FLD, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { CAM_D0, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D1, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D2, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D3, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D4, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D5, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D6, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D7, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D8, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D9, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D10, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_D11, MUXMODE0, PULL_DISABLED, INPUT },
+ { CAM_XCLKB, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CAM_WEN, MUXMODE4, PULL_DISABLED, INPUT },
+ { CAM_STROBE, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { CSI2_DX0, MUXMODE0, PULL_DISABLED, INPUT },
+ { CSI2_DY0, MUXMODE0, PULL_DISABLED, INPUT },
+ { CSI2_DX1, MUXMODE0, PULL_DISABLED, INPUT },
+ { CSI2_DY1, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_FSX, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_CLKX, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_DR, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP2_DX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { MMC1_CLK, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { MMC1_CMD, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT4, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT5, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT6, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC1_DAT7, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MMC2_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_CMD, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT0, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT1, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT3, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT4, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT5, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT6, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MMC2_DAT7, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MCBSP3_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP3_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP3_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP3_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART2_CTS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { UART2_RTS, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART2_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART2_RX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART1_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART1_RTS, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART1_CTS, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART1_RX, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCBSP4_CLKX, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP4_DR, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP4_DX, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP4_FSX, MUXMODE1, PULL_DISABLED, INPUT },
+ { MCBSP1_CLKR, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_FSR, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
+ { MCBSP1_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_CLKS, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MCBSP1_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCBSP1_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { UART3_CTS_RCTX,MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { UART3_RTS_SD, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { UART3_RX_IRRX, MUXMODE0, PULL_DISABLED, INPUT },
+ { UART3_TX_IRTX, MUXMODE0, PULL_DISABLED, OUTPUT },
+ { HSUSB0_CLK, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_STP, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { HSUSB0_DIR, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_NXT, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA0, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA1, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA2, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA3, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA4, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA5, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA6, MUXMODE0, PULL_DISABLED, INPUT },
+ { HSUSB0_DATA7, MUXMODE0, PULL_DISABLED, INPUT },
+ { I2C1_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { I2C1_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { I2C2_SCL, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { I2C2_SDA, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { I2C3_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { I2C3_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { HDQ_SIO, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
+ { MCSPI1_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MCSPI1_SIMO, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { MCSPI1_SOMI, MUXMODE0, PULL_DISABLED, INPUT },
+ { MCSPI1_CS0, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { MCSPI1_CS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
+ { MCSPI1_CS2, MUXMODE4, PULL_DISABLED, OUTPUT },
+ { MCSPI1_CS3, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_CLK, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_SIMO, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_SOMI, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_CS0, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { MCSPI2_CS1, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { SYS_NIRQ, MUXMODE0, PULL_UP_SELECTED, INPUT },
+ { SYS_CLKOUT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { ETK_CLK, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_CTL, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_D0, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D1, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D2, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D3, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D4, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D5, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D6, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D7, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D8, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D9, MUXMODE4, PULL_UP_SELECTED, INPUT },
+ { ETK_D10, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_D11, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
+ { ETK_D12, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D13, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D14, MUXMODE3, PULL_UP_SELECTED, INPUT },
+ { ETK_D15, MUXMODE3, PULL_UP_SELECTED, INPUT }
+};
+
+VOID
+PadConfiguration (
+ VOID
+ )
+{
+ UINTN Index;
+ UINT16 PadConfiguration;
+ UINTN NumPinsToConfigure = sizeof(PadConfigurationTable)/sizeof(PAD_CONFIGURATION);
+
+ for (Index = 0; Index < NumPinsToConfigure; Index++) {
+ //Set up Pad configuration for particular pin.
+ PadConfiguration = (PadConfigurationTable[Index].MuxMode << MUXMODE_OFFSET);
+ PadConfiguration |= (PadConfigurationTable[Index].PullConfig << PULL_CONFIG_OFFSET);
+ PadConfiguration |= (PadConfigurationTable[Index].InputEnable << INPUTENABLE_OFFSET);
+
+ //Configure the pin with specific Pad configuration.
+ MmioWrite16(PadConfigurationTable[Index].Pin, PadConfiguration);
+ }
+}
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