diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-08-03 09:47:12 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2016-08-04 10:28:51 +0800 |
| commit | 480c39cdc0478e2e13f546aa8995a2bb59dcdc05 (patch) | |
| tree | 9b569c20c4136dafb513263a7d2b679022e22836 /BraswellPlatformPkg/Common/Feature/SmBiosMiscDxe/MiscSystemSlotDesignation.uni | |
| parent | ed11e65ed5d382a44fea8046404ec6bde3b442fc (diff) | |
| download | edk2-platforms-480c39cdc0478e2e13f546aa8995a2bb59dcdc05.tar.xz | |
BraswellPlatformPkg: Move AdvancedFeature to Common/Feature
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
Diffstat (limited to 'BraswellPlatformPkg/Common/Feature/SmBiosMiscDxe/MiscSystemSlotDesignation.uni')
| -rw-r--r-- | BraswellPlatformPkg/Common/Feature/SmBiosMiscDxe/MiscSystemSlotDesignation.uni | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/BraswellPlatformPkg/Common/Feature/SmBiosMiscDxe/MiscSystemSlotDesignation.uni b/BraswellPlatformPkg/Common/Feature/SmBiosMiscDxe/MiscSystemSlotDesignation.uni new file mode 100644 index 0000000000..ab89aa4bb9 --- /dev/null +++ b/BraswellPlatformPkg/Common/Feature/SmBiosMiscDxe/MiscSystemSlotDesignation.uni @@ -0,0 +1,31 @@ +// /** @file
+// System slot information.
+//
+// Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php.
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// **/
+
+
+/=#
+
+#langdef en-US "English"
+#string STR_MISC_SYSTEM_SLOT_PCIEX16 #language en-US "PCIE X16 SLOT"
+#string STR_MISC_SYSTEM_SLOT_PCIEX16_1 #language en-US "PCIE X16 SLOT 1"
+#string STR_MISC_SYSTEM_SLOT_PCIEX16_2 #language en-US "PCIE X16 SLOT 2"
+#string STR_MISC_SYSTEM_SLOT_PCIEX4 #language en-US "PCIE X4 SLOT"
+#string STR_MISC_SYSTEM_SLOT_PCIEX1_1 #language en-US "PCIE X1 SLOT 1"
+#string STR_MISC_SYSTEM_SLOT_PCIEX1_2 #language en-US "PCIE X1 SLOT 2"
+#string STR_MISC_SYSTEM_SLOT_PCIEX1_3 #language en-US "PCIE X1 SLOT 3"
+#string STR_MISC_SYSTEM_SLOT_PCI1 #language en-US "PCI SLOT 1"
+#string STR_MISC_SYSTEM_SLOT_PCI2 #language en-US "PCI SLOT 2"
+#string STR_MISC_SYSTEM_SLOT_PCI3 #language en-US "PCI SLOT 3"
+
+
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