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authorGuo Mang <mang.guo@intel.com>2017-04-27 11:16:08 +0800
committerGuo Mang <mang.guo@intel.com>2017-04-27 11:16:08 +0800
commit9f72a84180605527643891f5c27b8f9f31c43006 (patch)
treeeb800f7bda1432663126721b253e4bea45e77d05 /Core/IntelSiliconPkg
parentacbc8db944c2250398cffd15883a3112f3779b76 (diff)
downloadedk2-platforms-9f72a84180605527643891f5c27b8f9f31c43006.tar.xz
IntelSiliconPkg: Move to new location
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Core/IntelSiliconPkg')
-rw-r--r--Core/IntelSiliconPkg/Contributions.txt218
-rw-r--r--Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h75
-rw-r--r--Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareVersionInfo.h60
-rw-r--r--Core/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h155
-rw-r--r--Core/IntelSiliconPkg/IntelSiliconPkg.dec43
-rw-r--r--Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.c87
-rw-r--r--Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf44
-rw-r--r--Core/IntelSiliconPkg/License.txt25
8 files changed, 707 insertions, 0 deletions
diff --git a/Core/IntelSiliconPkg/Contributions.txt b/Core/IntelSiliconPkg/Contributions.txt
new file mode 100644
index 0000000000..f87cbd73c6
--- /dev/null
+++ b/Core/IntelSiliconPkg/Contributions.txt
@@ -0,0 +1,218 @@
+
+======================
+= Code Contributions =
+======================
+
+To make a contribution to a TianoCore project, follow these steps.
+1. Create a change description in the format specified below to
+ use in the source control commit log.
+2. Your commit message must include your "Signed-off-by" signature,
+ and "Contributed-under" message.
+3. Your "Contributed-under" message explicitly states that the
+ contribution is made under the terms of the specified
+ contribution agreement. Your "Contributed-under" message
+ must include the name of contribution agreement and version.
+ For example: Contributed-under: TianoCore Contribution Agreement 1.0
+ The "TianoCore Contribution Agreement" is included below in
+ this document.
+4. Submit your code to the TianoCore project using the process
+ that the project documents on its web page. If the process is
+ not documented, then submit the code on development email list
+ for the project.
+5. It is preferred that contributions are submitted using the same
+ copyright license as the base project. When that is not possible,
+ then contributions using the following licenses can be accepted:
+ * BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
+ * BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
+ * MIT: http://opensource.org/licenses/MIT
+ * Python-2.0: http://opensource.org/licenses/Python-2.0
+ * Zlib: http://opensource.org/licenses/Zlib
+
+ Contributions of code put into the public domain can also be
+ accepted.
+
+ Contributions using other licenses might be accepted, but further
+ review will be required.
+
+=====================================================
+= Change Description / Commit Message / Patch Email =
+=====================================================
+
+Your change description should use the standard format for a
+commit message, and must include your "Signed-off-by" signature
+and the "Contributed-under" message.
+
+== Sample Change Description / Commit Message =
+
+=== Start of sample patch email message ===
+
+From: Contributor Name <contributor@example.com>
+Subject: [PATCH] CodeModule: Brief-single-line-summary
+
+Full-commit-message
+
+Contributed-under: TianoCore Contribution Agreement 1.0
+Signed-off-by: Contributor Name <contributor@example.com>
+---
+
+An extra message for the patch email which will not be considered part
+of the commit message can be added here.
+
+Patch content inline or attached
+
+=== End of sample patch email message ===
+
+=== Notes for sample patch email ===
+
+* The first line of commit message is taken from the email's subject
+ line following [PATCH]. The remaining portion of the commit message
+ is the email's content until the '---' line.
+* git format-patch is one way to create this format
+
+=== Definitions for sample patch email ===
+
+* "CodeModule" is a short idenfier for the affected code. For
+ example MdePkg, or MdeModulePkg UsbBusDxe.
+* "Brief-single-line-summary" is a short summary of the change.
+* The entire first line should be less than ~70 characters.
+* "Full-commit-message" a verbose multiple line comment describing
+ the change. Each line should be less than ~70 characters.
+* "Contributed-under" explicitely states that the contribution is
+ made under the terms of the contribtion agreement. This
+ agreement is included below in this document.
+* "Signed-off-by" is the contributor's signature identifying them
+ by their real/legal name and their email address.
+
+========================================
+= TianoCore Contribution Agreement 1.0 =
+========================================
+
+INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
+INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
+PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
+TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
+TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
+REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
+CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
+OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
+BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
+AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
+AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
+USE THE CONTENT.
+
+Unless otherwise indicated, all Content made available on the TianoCore
+site is provided to you under the terms and conditions of the BSD
+License ("BSD"). A copy of the BSD License is available at
+http://opensource.org/licenses/bsd-license.php
+or when applicable, in the associated License.txt file.
+
+Certain other content may be made available under other licenses as
+indicated in or with such Content. (For example, in a License.txt file.)
+
+You accept and agree to the following terms and conditions for Your
+present and future Contributions submitted to TianoCore site. Except
+for the license granted to Intel hereunder, You reserve all right,
+title, and interest in and to Your Contributions.
+
+== SECTION 1: Definitions ==
+* "You" or "Contributor" shall mean the copyright owner or legal
+ entity authorized by the copyright owner that is making a
+ Contribution hereunder. All other entities that control, are
+ controlled by, or are under common control with that entity are
+ considered to be a single Contributor. For the purposes of this
+ definition, "control" means (i) the power, direct or indirect, to
+ cause the direction or management of such entity, whether by
+ contract or otherwise, or (ii) ownership of fifty percent (50%)
+ or more of the outstanding shares, or (iii) beneficial ownership
+ of such entity.
+* "Contribution" shall mean any original work of authorship,
+ including any modifications or additions to an existing work,
+ that is intentionally submitted by You to the TinaoCore site for
+ inclusion in, or documentation of, any of the Content. For the
+ purposes of this definition, "submitted" means any form of
+ electronic, verbal, or written communication sent to the
+ TianoCore site or its representatives, including but not limited
+ to communication on electronic mailing lists, source code
+ control systems, and issue tracking systems that are managed by,
+ or on behalf of, the TianoCore site for the purpose of
+ discussing and improving the Content, but excluding
+ communication that is conspicuously marked or otherwise
+ designated in writing by You as "Not a Contribution."
+
+== SECTION 2: License for Contributions ==
+* Contributor hereby agrees that redistribution and use of the
+ Contribution in source and binary forms, with or without
+ modification, are permitted provided that the following
+ conditions are met:
+** Redistributions of source code must retain the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer.
+** Redistributions in binary form must reproduce the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials provided
+ with the distribution.
+* Disclaimer. None of the names of Contributor, Intel, or the names
+ of their respective contributors may be used to endorse or
+ promote products derived from this software without specific
+ prior written permission.
+* Contributor grants a license (with the right to sublicense) under
+ claims of Contributor's patents that Contributor can license that
+ are infringed by the Contribution (as delivered by Contributor) to
+ make, use, distribute, sell, offer for sale, and import the
+ Contribution and derivative works thereof solely to the minimum
+ extent necessary for licensee to exercise the granted copyright
+ license; this patent license applies solely to those portions of
+ the Contribution that are unmodified. No hardware per se is
+ licensed.
+* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
+ CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
+ CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ DAMAGE.
+
+== SECTION 3: Representations ==
+* You represent that You are legally entitled to grant the above
+ license. If your employer(s) has rights to intellectual property
+ that You create that includes Your Contributions, You represent
+ that You have received permission to make Contributions on behalf
+ of that employer, that Your employer has waived such rights for
+ Your Contributions.
+* You represent that each of Your Contributions is Your original
+ creation (see Section 4 for submissions on behalf of others).
+ You represent that Your Contribution submissions include complete
+ details of any third-party license or other restriction
+ (including, but not limited to, related patents and trademarks)
+ of which You are personally aware and which are associated with
+ any part of Your Contributions.
+
+== SECTION 4: Third Party Contributions ==
+* Should You wish to submit work that is not Your original creation,
+ You may submit it to TianoCore site separately from any
+ Contribution, identifying the complete details of its source
+ and of any license or other restriction (including, but not
+ limited to, related patents, trademarks, and license agreements)
+ of which You are personally aware, and conspicuously marking the
+ work as "Submitted on behalf of a third-party: [named here]".
+
+== SECTION 5: Miscellaneous ==
+* Applicable Laws. Any claims arising under or relating to this
+ Agreement shall be governed by the internal substantive laws of
+ the State of Delaware or federal courts located in Delaware,
+ without regard to principles of conflict of laws.
+* Language. This Agreement is in the English language only, which
+ language shall be controlling in all respects, and all versions
+ of this Agreement in any other language shall be for accommodation
+ only and shall not be binding. All communications and notices made
+ or given pursuant to this Agreement, and all documentation and
+ support to be provided, unless otherwise noted, shall be in the
+ English language.
+
diff --git a/Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h b/Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h
new file mode 100644
index 0000000000..cdc080ba1b
--- /dev/null
+++ b/Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h
@@ -0,0 +1,75 @@
+/** @file
+ FirmwareInterfaceTable (FIT) related definitions.
+
+ @todo update document/spec reference
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __FIRMWARE_INTERFACE_TABLE_H__
+#define __FIRMWARE_INTERFACE_TABLE_H__
+
+//
+// FIT Entry type definitions
+//
+#define FIT_TYPE_00_HEADER 0x00
+#define FIT_TYPE_01_MICROCODE 0x01
+#define FIT_TYPE_02_STARTUP_ACM 0x02
+#define FIT_TYPE_07_BIOS_STARTUP_MODULE 0x07
+#define FIT_TYPE_08_TPM_POLICY 0x08
+#define FIT_TYPE_09_BIOS_POLICY 0x09
+#define FIT_TYPE_0A_TXT_POLICY 0x0A
+#define FIT_TYPE_0B_KEY_MANIFEST 0x0B
+#define FIT_TYPE_0C_BOOT_POLICY_MANIFEST 0x0C
+#define FIT_TYPE_10_CSE_SECURE_BOOT 0x10
+#define FIT_TYPE_2D_TXTSX_POLICY 0x2D
+#define FIT_TYPE_2F_JMP_DEBUG_POLICY 0x2F
+#define FIT_TYPE_7F_SKIP 0x7F
+
+#define FIT_POINTER_ADDRESS 0xFFFFFFC0 ///< Fixed address at 4G - 40h
+
+#define FIT_TYPE_VERSION 0x0100
+
+#define FIT_TYPE_00_SIGNATURE SIGNATURE_64 ('_', 'F', 'I', 'T', '_', ' ', ' ', ' ')
+
+#pragma pack(1)
+
+typedef struct {
+ /**
+ Address is the base address of the firmware component
+ must be aligned on 16 byte boundary
+ **/
+ UINT64 Address;
+ UINT8 Size[3]; ///< Size is the span of the component in multiple of 16 bytes
+ UINT8 Reserved; ///< Reserved must be set to 0
+ /**
+ Component's version number in binary coded decimal (BCD) format.
+ For the FIT header entry, the value in this field will indicate the revision
+ number of the FIT data structure. The upper byte of the revision field
+ indicates the major revision and the lower byte indicates the minor revision.
+ **/
+ UINT16 Version;
+ UINT8 Type : 7; ///< FIT types 0x00 to 0x7F
+ ///
+ /// Checksum Valid indicates whether component has valid checksum.
+ ///
+ UINT8 C_V : 1;
+ /**
+ Component's checksum. The modulo sum of all the bytes in the component and
+ the value in this field (Chksum) must add up to zero. This field is only
+ valid if the C_V flag is non-zero.
+ **/
+ UINT8 Chksum;
+} FIRMWARE_INTERFACE_TABLE_ENTRY;
+
+#pragma pack()
+
+#endif
diff --git a/Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareVersionInfo.h b/Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareVersionInfo.h
new file mode 100644
index 0000000000..bcb741f983
--- /dev/null
+++ b/Core/IntelSiliconPkg/Include/IndustryStandard/FirmwareVersionInfo.h
@@ -0,0 +1,60 @@
+/** @file
+ Intel Firmware Version Info (FVI) related definitions.
+
+ @todo update document/spec reference
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+@par Specification Reference:
+ System Management BIOS (SMBIOS) Reference Specification v3.0.0 dated 2015-Feb-12
+ http://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.0.0.pdf
+
+**/
+
+#ifndef __FIRMWARE_VERSION_INFO_H__
+#define __FIRMWARE_VERSION_INFO_H__
+
+#include <IndustryStandard/SmBios.h>
+
+#define INTEL_FIRMWARE_VERSION_INFO_GROUP_NAME "Firmware Version Info"
+
+#pragma pack(1)
+
+///
+/// Firmware Version Structure
+///
+typedef struct {
+ UINT8 MajorVersion;
+ UINT8 MinorVersion;
+ UINT8 Revision;
+ UINT16 BuildNumber;
+} INTEL_FIRMWARE_VERSION;
+
+///
+/// Firmware Version Info (FVI) Structure
+///
+typedef struct {
+ SMBIOS_TABLE_STRING ComponentName; ///< String Index of Component Name
+ SMBIOS_TABLE_STRING VersionString; ///< String Index of Version String
+ INTEL_FIRMWARE_VERSION Version; ///< Firmware version
+} INTEL_FIRMWARE_VERSION_INFO;
+
+///
+/// SMBIOS OEM Type Intel Firmware Version Info (FVI) Structure
+///
+typedef struct {
+ SMBIOS_STRUCTURE Header; ///< SMBIOS structure header
+ UINT8 Count; ///< Number of FVI entries in this structure
+ INTEL_FIRMWARE_VERSION_INFO Fvi[1]; ///< FVI structure(s)
+} SMBIOS_TABLE_TYPE_OEM_INTEL_FVI;
+
+#pragma pack()
+
+#endif
diff --git a/Core/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/Core/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
new file mode 100644
index 0000000000..5ce80a5be8
--- /dev/null
+++ b/Core/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
@@ -0,0 +1,155 @@
+/** @file
+ IGD OpRegion definition from Intel Integrated Graphics Device OpRegion
+ Specification.
+
+ https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf
+
+ @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to 0x46(70)
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#ifndef _IGD_OPREGION_H_
+#define _IGD_OPREGION_H_
+
+#define IGD_OPREGION_HEADER_SIGN "IntelGraphicsMem"
+#define IGD_OPREGION_HEADER_MBOX1 BIT0
+#define IGD_OPREGION_HEADER_MBOX2 BIT1
+#define IGD_OPREGION_HEADER_MBOX3 BIT2
+#define IGD_OPREGION_HEADER_MBOX4 BIT3
+#define IGD_OPREGION_HEADER_MBOX5 BIT4
+
+/**
+ OpRegion structures:
+ Sub-structures define the different parts of the OpRegion followed by the
+ main structure representing the entire OpRegion.
+
+ @note These structures are packed to 1 byte offsets because the exact
+ data location is required by the supporting design specification due to
+ the fact that the data is used by ASL and Graphics driver code compiled
+ separately.
+**/
+#pragma pack(1)
+///
+/// OpRegion Mailbox 0 Header structure. The OpRegion Header is used to
+/// identify a block of memory as the graphics driver OpRegion.
+/// Offset 0x0, Size 0x100
+///
+typedef struct {
+ CHAR8 SIGN[0x10]; ///< Offset 0x00 OpRegion Signature
+ UINT32 SIZE; ///< Offset 0x10 OpRegion Size
+ UINT32 OVER; ///< Offset 0x14 OpRegion Structure Version
+ UINT8 SVER[0x20]; ///< Offset 0x18 System BIOS Build Version
+ UINT8 VVER[0x10]; ///< Offset 0x38 Video BIOS Build Version
+ UINT8 GVER[0x10]; ///< Offset 0x48 Graphic Driver Build Version
+ UINT32 MBOX; ///< Offset 0x58 Supported Mailboxes
+ UINT32 DMOD; ///< Offset 0x5C Driver Model
+ UINT32 PCON; ///< Offset 0x60 Platform Configuration
+ CHAR16 DVER[0x10]; ///< Offset 0x64 GOP Version
+ UINT8 RM01[0x7C]; ///< Offset 0x84 Reserved Must be zero
+} IGD_OPREGION_HEADER;
+
+///
+/// OpRegion Mailbox 1 - Public ACPI Methods
+/// Offset 0x100, Size 0x100
+///
+typedef struct {
+ UINT32 DRDY; ///< Offset 0x100 Driver Readiness
+ UINT32 CSTS; ///< Offset 0x104 Status
+ UINT32 CEVT; ///< Offset 0x108 Current Event
+ UINT8 RM11[0x14]; ///< Offset 0x10C Reserved Must be Zero
+ UINT32 DIDL[8]; ///< Offset 0x120 Supported Display Devices ID List
+ UINT32 CPDL[8]; ///< Offset 0x140 Currently Attached Display Devices List
+ UINT32 CADL[8]; ///< Offset 0x160 Currently Active Display Devices List
+ UINT32 NADL[8]; ///< Offset 0x180 Next Active Devices List
+ UINT32 ASLP; ///< Offset 0x1A0 ASL Sleep Time Out
+ UINT32 TIDX; ///< Offset 0x1A4 Toggle Table Index
+ UINT32 CHPD; ///< Offset 0x1A8 Current Hotplug Enable Indicator
+ UINT32 CLID; ///< Offset 0x1AC Current Lid State Indicator
+ UINT32 CDCK; ///< Offset 0x1B0 Current Docking State Indicator
+ UINT32 SXSW; ///< Offset 0x1B4 Display Switch Notification on Sx State Resume
+ UINT32 EVTS; ///< Offset 0x1B8 Events supported by ASL
+ UINT32 CNOT; ///< Offset 0x1BC Current OS Notification
+ UINT32 NRDY; ///< Offset 0x1C0 Driver Status
+ UINT8 DID2[0x1C]; ///< Offset 0x1C4 Extended Supported Devices ID List (DOD)
+ UINT8 CPD2[0x1C]; ///< Offset 0x1E0 Extended Attached Display Devices List
+ UINT8 RM12[4]; ///< Offset 0x1FC - 0x1FF Reserved Must be zero
+} IGD_OPREGION_MBOX1;
+
+///
+/// OpRegion Mailbox 2 - Software SCI Interface
+/// Offset 0x200, Size 0x100
+///
+typedef struct {
+ UINT32 SCIC; ///< Offset 0x200 Software SCI Command / Status / Data
+ UINT32 PARM; ///< Offset 0x204 Software SCI Parameters
+ UINT32 DSLP; ///< Offset 0x208 Driver Sleep Time Out
+ UINT8 RM21[0xF4]; ///< Offset 0x20C - 0x2FF Reserved Must be zero
+} IGD_OPREGION_MBOX2;
+
+///
+/// OpRegion Mailbox 3 - BIOS/Driver Notification - ASLE Support
+/// Offset 0x300, Size 0x100
+///
+typedef struct {
+ UINT32 ARDY; ///< Offset 0x300 Driver Readiness
+ UINT32 ASLC; ///< Offset 0x304 ASLE Interrupt Command / Status
+ UINT32 TCHE; ///< Offset 0x308 Technology Enabled Indicator
+ UINT32 ALSI; ///< Offset 0x30C Current ALS Luminance Reading
+ UINT32 BCLP; ///< Offset 0x310 Requested Backlight Brightness
+ UINT32 PFIT; ///< Offset 0x314 Panel Fitting State or Request
+ UINT32 CBLV; ///< Offset 0x318 Current Brightness Level
+ UINT16 BCLM[0x14]; ///< Offset 0x31C Backlight Brightness Levels Duty Cycle Mapping Table
+ UINT32 CPFM; ///< Offset 0x344 Current Panel Fitting Mode
+ UINT32 EPFM; ///< Offset 0x348 Enabled Panel Fitting Modes
+ UINT8 PLUT[0x4A]; ///< Offset 0x34C Panel Look Up Table & Identifier
+ UINT32 PFMB; ///< Offset 0x396 PWM Frequency and Minimum Brightness
+ UINT32 CCDV; ///< Offset 0x39A Color Correction Default Values
+ UINT32 PCFT; ///< Offset 0x39E Power Conservation Features
+ UINT32 SROT; ///< Offset 0x3A2 Supported Rotation Angles
+ UINT32 IUER; ///< Offset 0x3A6 Intel Ultrabook(TM) Event Register
+ UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated for IFFS feature
+ UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer
+ UINT32 STAT; ///< Offset 0x3B6 State Indicator
+ UINT8 RM31[0x46]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero. Bug in spec 0x45(69)
+} IGD_OPREGION_MBOX3;
+
+///
+/// OpRegion Mailbox 4 - VBT Video BIOS Table
+/// Offset 0x400, Size 0x1800
+///
+typedef struct {
+ UINT8 RVBT[0x1800]; ///< Offset 0x400 - 0x1BFF Raw VBT Data
+} IGD_OPREGION_MBOX4;
+
+///
+/// OpRegion Mailbox 5 - BIOS/Driver Notification - Data storage BIOS to Driver data sync
+/// Offset 0x1C00, Size 0x400
+///
+typedef struct {
+ UINT32 PHED; ///< Offset 0x1C00 Panel Header
+ UINT8 BDDC[0x100]; ///< Offset 0x1C04 Panel EDID (DDC data)
+ UINT8 RM51[0x2FC]; ///< Offset 0x1D04 - 0x1FFF Reserved Must be zero
+} IGD_OPREGION_MBOX5;
+
+///
+/// IGD OpRegion Structure
+///
+typedef struct {
+ IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
+ IGD_OPREGION_MBOX1 MBox1; ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)
+ IGD_OPREGION_MBOX2 MBox2; ///< Mailbox 2: Software SCI Interface (Offset 0x200, Size 0x100)
+ IGD_OPREGION_MBOX3 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
+ IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
+ IGD_OPREGION_MBOX5 MBox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset 0x1C00, Size 0x400)
+} IGD_OPREGION_STRUCTURE;
+#pragma pack()
+
+#endif
diff --git a/Core/IntelSiliconPkg/IntelSiliconPkg.dec b/Core/IntelSiliconPkg/IntelSiliconPkg.dec
new file mode 100644
index 0000000000..8819cb8fed
--- /dev/null
+++ b/Core/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -0,0 +1,43 @@
+## @file
+# IntelSilicon Package
+#
+# This package provides common open source Intel silicon modules.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = IntelSiliconPkg
+ PACKAGE_GUID = F7A58914-FA0E-4F71-BD6A-220FDF824A49
+ PACKAGE_VERSION = 0.1
+
+[Includes]
+ Include
+
+[Guids]
+ ## GUID for Package token space
+ # {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735}
+ gIntelSiliconPkgTokenSpaceGuid = { 0xa9f8d54e, 0x1107, 0x4f0a, { 0xad, 0xd0, 0x45, 0x87, 0xe7, 0xa4, 0xa7, 0x35 } }
+
+ ## HOB GUID to publish SMBIOS data records from PEI phase
+ # HOB data format is same as SMBIOS records defined in SMBIOS spec or OEM defined types
+ # Generic DXE Library / Driver can locate HOB(s) and add SMBIOS records into SMBIOS table
+ gIntelSmbiosDataHobGuid = { 0x798e722e, 0x15b2, 0x4e13, { 0x8a, 0xe9, 0x6b, 0xa3, 0x0f, 0xf7, 0xf1, 0x67 }}
+
+[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
+ ## This is the GUID of the FFS which contains the Graphics Video BIOS Table (VBT)
+ # The VBT content is stored as a RAW section which is consumed by GOP PEI/UEFI driver.
+ # The default GUID can be updated by patching or runtime if platform support multiple VBT configurations.
+ # @Prompt GUID of the FFS which contains the Graphics Video BIOS Table (VBT)
+ # { 0x56752da9, 0xde6b, 0x4895, 0x88, 0x19, 0x19, 0x45, 0xb6, 0xb7, 0x6c, 0x22 }
+ gIntelSiliconPkgTokenSpaceGuid.PcdIntelGraphicsVbtFileGuid|{ 0xa9, 0x2d, 0x75, 0x56, 0x6b, 0xde, 0x95, 0x48, 0x88, 0x19, 0x19, 0x45, 0xb6, 0xb7, 0x6c, 0x22 }|VOID*|0x00000001
+
diff --git a/Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.c b/Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.c
new file mode 100644
index 0000000000..09068fdcbe
--- /dev/null
+++ b/Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.c
@@ -0,0 +1,87 @@
+/** @file
+ Library to add SMBIOS data records from HOB to SMBIOS table.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License which accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Specification Reference:
+ System Management BIOS (SMBIOS) Reference Specification v3.0.0
+ dated 2015-Feb-12 (DSP0134)
+ http://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.0.0.pdf
+
+**/
+#include <IndustryStandard/SmBios.h>
+#include <Library/UefiLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/Smbios.h>
+
+
+/**
+ Adds SMBIOS records to tables
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] SystemTable Global system service table.
+
+ @retval EFI_UNSUPPORTED - Could not locate SMBIOS protocol
+ @retval EFI_OUT_OF_RESOURCES - Failed to allocate memory for SMBIOS HOB type.
+ @retval EFI_SUCCESS - Successfully added SMBIOS records based on HOB.
+**/
+EFI_STATUS
+EFIAPI
+DxeSmbiosDataHobLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ EFI_SMBIOS_PROTOCOL *Smbios;
+ EFI_STATUS Status;
+ UINT8 *RecordPtr;
+ UINT16 RecordCount;
+
+ RecordCount = 0;
+
+ DEBUG ((DEBUG_INFO, "Adding SMBIOS records from HOB..\n"));
+
+ Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID **)&Smbios);
+ if (Smbios == NULL) {
+ DEBUG ((DEBUG_WARN, "Can't locate SMBIOS protocol\n"));
+ return EFI_UNSUPPORTED;
+ }
+
+ ///
+ /// Get SMBIOS HOB data (each hob contains one SMBIOS record)
+ ///
+ for (Hob.Raw = GetHobList (); !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
+ if ((GET_HOB_TYPE (Hob) == EFI_HOB_TYPE_GUID_EXTENSION) && (CompareGuid (&Hob.Guid->Name, &gIntelSmbiosDataHobGuid))) {
+ RecordPtr = GET_GUID_HOB_DATA (Hob.Raw);
+
+ ///
+ /// Add generic SMBIOS HOB to SMBIOS table
+ ///
+ DEBUG ((DEBUG_VERBOSE, "Add SMBIOS record type: %x\n", ((EFI_SMBIOS_TABLE_HEADER *) RecordPtr)->Type));
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ Status = Smbios->Add (Smbios, NULL, &SmbiosHandle, (EFI_SMBIOS_TABLE_HEADER *) RecordPtr);
+ if (!EFI_ERROR (Status)) {
+ RecordCount++;
+ }
+ }
+ }
+ DEBUG ((DEBUG_INFO, "Found %d Records and added to SMBIOS table.\n", RecordCount));
+
+ return EFI_SUCCESS;
+}
+
diff --git a/Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf b/Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
new file mode 100644
index 0000000000..4fb2551303
--- /dev/null
+++ b/Core/IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf
@@ -0,0 +1,44 @@
+## @file
+# Component INF file for the DxeSmbiosDataHob library.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+INF_VERSION = 0x00010017
+BASE_NAME = DxeSmbiosDataHobLib
+FILE_GUID = AF55A9B6-2AE6-4B08-8CF7-750B7CBF49D7
+MODULE_TYPE = DXE_DRIVER
+LIBRARY_CLASS = NULL|DXE_DRIVER
+CONSTRUCTOR = DxeSmbiosDataHobLibConstructor
+
+[Packages]
+MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
+
+[Sources]
+DxeSmbiosDataHobLib.c
+
+[LibraryClasses]
+DebugLib
+BaseMemoryLib
+MemoryAllocationLib
+BaseLib
+HobLib
+UefiLib
+
+[Guids]
+gIntelSmbiosDataHobGuid ## CONSUMES ## GUID
+
+[Depex]
+gEfiSmbiosProtocolGuid
+
diff --git a/Core/IntelSiliconPkg/License.txt b/Core/IntelSiliconPkg/License.txt
new file mode 100644
index 0000000000..be68999be6
--- /dev/null
+++ b/Core/IntelSiliconPkg/License.txt
@@ -0,0 +1,25 @@
+Copyright (c) 2012, Intel Corporation. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.