diff options
| author | Guo Mang <mang.guo@intel.com> | 2017-04-27 11:08:17 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-04-27 11:08:17 +0800 |
| commit | b0724f89e3b05de1d6492e79ec89f6d467cb14f0 (patch) | |
| tree | e4a9eff6dc255621c2f0a08d61d32bf95087a7a9 /Core/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm | |
| parent | c23f114d3cfbb29b8734b87213d1ec0de404197b (diff) | |
| download | edk2-platforms-b0724f89e3b05de1d6492e79ec89f6d467cb14f0.tar.xz | |
MdePkg: Move to new location
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Core/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm')
| -rw-r--r-- | Core/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/Core/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm b/Core/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm new file mode 100644 index 0000000000..76313ab607 --- /dev/null +++ b/Core/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------
+;
+; CpuFlushTlb() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ EXPORT CpuFlushTlb
+ AREA cpu_flush_tlb, CODE, READONLY
+
+;/**
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuFlushTlb (
+; VOID
+; );
+;
+CpuFlushTlb
+ MOV r0,#0
+ MCR p15,0,r0,c8,c5,0 ;Invalidate all the unlocked entried in TLB
+ BX LR
+
+ END
|