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authorJeff Fan <jeff.fan@intel.com>2017-05-10 16:32:25 +0800
committerGuo Mang <mang.guo@intel.com>2017-07-12 11:24:42 +0800
commite4bddc4d4faeb756be752d7b2a5a6dc840939d8d (patch)
tree9539a48d87a240a0cf5ab2f9676bf6192e96b295 /Core/UefiCpuPkg
parent2339dcac93638028bdcfed769e33b2cba7f5f402 (diff)
downloadedk2-platforms-e4bddc4d4faeb756be752d7b2a5a6dc840939d8d.tar.xz
UefiCpuPkg/PiSmmCpuDxeSmm: Check ProcessorId == INVALID_APIC_ID
If PcdCpuHotPlugSupport is TRUE, gSmst->NumberOfCpus will be the PcdCpuMaxLogicalProcessorNumber. If gSmst->SmmStartupThisAp() is invoked for those un-existed processors, ASSERT() happened in ConfigSmmCodeAccessCheck(). This fix is to check if ProcessorId is valid before invoke gSmst->SmmStartupThisAp() in ConfigSmmCodeAccessCheck() and to check if ProcessorId is valid in InternalSmmStartupThisAp() to avoid unexpected DEBUG error message displayed. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit b7025df8f9102a1698879aa451bf5af592c37bc1)
Diffstat (limited to 'Core/UefiCpuPkg')
-rw-r--r--Core/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c3
-rwxr-xr-xCore/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c7
2 files changed, 9 insertions, 1 deletions
diff --git a/Core/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/Core/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index e03f1e02c0..4ac5e8e264 100644
--- a/Core/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/Core/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -860,6 +860,9 @@ InternalSmmStartupThisAp (
DEBUG((DEBUG_ERROR, "CpuIndex(%d) == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu\n", CpuIndex));
return EFI_INVALID_PARAMETER;
}
+ if (gSmmCpuPrivate->ProcessorInfo[CpuIndex].ProcessorId == INVALID_APIC_ID) {
+ return EFI_INVALID_PARAMETER;
+ }
if (!(*(mSmmMpSyncData->CpuData[CpuIndex].Present))) {
if (mSmmMpSyncData->EffectiveSyncMode == SmmCpuSyncModeTradition) {
DEBUG((DEBUG_ERROR, "!mSmmMpSyncData->CpuData[%d].Present\n", CpuIndex));
diff --git a/Core/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/Core/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 2d6b572b4e..8e79642711 100755
--- a/Core/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/Core/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -1117,7 +1117,12 @@ ConfigSmmCodeAccessCheck (
//
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
if (Index != gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) {
-
+ if (gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId == INVALID_APIC_ID) {
+ //
+ // If this processor does not exist
+ //
+ continue;
+ }
//
// Acquire Config SMM Code Access Check spin lock. The AP will release the
// spin lock when it is done executing ConfigSmmCodeAccessCheckOnCurrentProcessor().