diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-12-22 17:19:19 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2016-12-26 19:14:51 +0800 |
| commit | 23dfe32e9bb520bd4b6bf439a87b4d769b75a6c6 (patch) | |
| tree | 671ad9e052c1c3c90cefe17f5f6eb1ca3cc883aa /Core | |
| parent | 2cc68ed95f4e6a5b6256a6cc1e9f6a585a7d2ba7 (diff) | |
| download | edk2-platforms-23dfe32e9bb520bd4b6bf439a87b4d769b75a6c6.tar.xz | |
IntelFrameworkPkg: Move to new location
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Core')
89 files changed, 25936 insertions, 0 deletions
diff --git a/Core/IntelFrameworkPkg/Contributions.txt b/Core/IntelFrameworkPkg/Contributions.txt new file mode 100644 index 0000000000..f87cbd73c6 --- /dev/null +++ b/Core/IntelFrameworkPkg/Contributions.txt @@ -0,0 +1,218 @@ +
+======================
+= Code Contributions =
+======================
+
+To make a contribution to a TianoCore project, follow these steps.
+1. Create a change description in the format specified below to
+ use in the source control commit log.
+2. Your commit message must include your "Signed-off-by" signature,
+ and "Contributed-under" message.
+3. Your "Contributed-under" message explicitly states that the
+ contribution is made under the terms of the specified
+ contribution agreement. Your "Contributed-under" message
+ must include the name of contribution agreement and version.
+ For example: Contributed-under: TianoCore Contribution Agreement 1.0
+ The "TianoCore Contribution Agreement" is included below in
+ this document.
+4. Submit your code to the TianoCore project using the process
+ that the project documents on its web page. If the process is
+ not documented, then submit the code on development email list
+ for the project.
+5. It is preferred that contributions are submitted using the same
+ copyright license as the base project. When that is not possible,
+ then contributions using the following licenses can be accepted:
+ * BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
+ * BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
+ * MIT: http://opensource.org/licenses/MIT
+ * Python-2.0: http://opensource.org/licenses/Python-2.0
+ * Zlib: http://opensource.org/licenses/Zlib
+
+ Contributions of code put into the public domain can also be
+ accepted.
+
+ Contributions using other licenses might be accepted, but further
+ review will be required.
+
+=====================================================
+= Change Description / Commit Message / Patch Email =
+=====================================================
+
+Your change description should use the standard format for a
+commit message, and must include your "Signed-off-by" signature
+and the "Contributed-under" message.
+
+== Sample Change Description / Commit Message =
+
+=== Start of sample patch email message ===
+
+From: Contributor Name <contributor@example.com>
+Subject: [PATCH] CodeModule: Brief-single-line-summary
+
+Full-commit-message
+
+Contributed-under: TianoCore Contribution Agreement 1.0
+Signed-off-by: Contributor Name <contributor@example.com>
+---
+
+An extra message for the patch email which will not be considered part
+of the commit message can be added here.
+
+Patch content inline or attached
+
+=== End of sample patch email message ===
+
+=== Notes for sample patch email ===
+
+* The first line of commit message is taken from the email's subject
+ line following [PATCH]. The remaining portion of the commit message
+ is the email's content until the '---' line.
+* git format-patch is one way to create this format
+
+=== Definitions for sample patch email ===
+
+* "CodeModule" is a short idenfier for the affected code. For
+ example MdePkg, or MdeModulePkg UsbBusDxe.
+* "Brief-single-line-summary" is a short summary of the change.
+* The entire first line should be less than ~70 characters.
+* "Full-commit-message" a verbose multiple line comment describing
+ the change. Each line should be less than ~70 characters.
+* "Contributed-under" explicitely states that the contribution is
+ made under the terms of the contribtion agreement. This
+ agreement is included below in this document.
+* "Signed-off-by" is the contributor's signature identifying them
+ by their real/legal name and their email address.
+
+========================================
+= TianoCore Contribution Agreement 1.0 =
+========================================
+
+INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
+INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
+PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
+TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
+TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
+REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
+CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
+OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
+BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
+AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
+AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
+USE THE CONTENT.
+
+Unless otherwise indicated, all Content made available on the TianoCore
+site is provided to you under the terms and conditions of the BSD
+License ("BSD"). A copy of the BSD License is available at
+http://opensource.org/licenses/bsd-license.php
+or when applicable, in the associated License.txt file.
+
+Certain other content may be made available under other licenses as
+indicated in or with such Content. (For example, in a License.txt file.)
+
+You accept and agree to the following terms and conditions for Your
+present and future Contributions submitted to TianoCore site. Except
+for the license granted to Intel hereunder, You reserve all right,
+title, and interest in and to Your Contributions.
+
+== SECTION 1: Definitions ==
+* "You" or "Contributor" shall mean the copyright owner or legal
+ entity authorized by the copyright owner that is making a
+ Contribution hereunder. All other entities that control, are
+ controlled by, or are under common control with that entity are
+ considered to be a single Contributor. For the purposes of this
+ definition, "control" means (i) the power, direct or indirect, to
+ cause the direction or management of such entity, whether by
+ contract or otherwise, or (ii) ownership of fifty percent (50%)
+ or more of the outstanding shares, or (iii) beneficial ownership
+ of such entity.
+* "Contribution" shall mean any original work of authorship,
+ including any modifications or additions to an existing work,
+ that is intentionally submitted by You to the TinaoCore site for
+ inclusion in, or documentation of, any of the Content. For the
+ purposes of this definition, "submitted" means any form of
+ electronic, verbal, or written communication sent to the
+ TianoCore site or its representatives, including but not limited
+ to communication on electronic mailing lists, source code
+ control systems, and issue tracking systems that are managed by,
+ or on behalf of, the TianoCore site for the purpose of
+ discussing and improving the Content, but excluding
+ communication that is conspicuously marked or otherwise
+ designated in writing by You as "Not a Contribution."
+
+== SECTION 2: License for Contributions ==
+* Contributor hereby agrees that redistribution and use of the
+ Contribution in source and binary forms, with or without
+ modification, are permitted provided that the following
+ conditions are met:
+** Redistributions of source code must retain the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer.
+** Redistributions in binary form must reproduce the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials provided
+ with the distribution.
+* Disclaimer. None of the names of Contributor, Intel, or the names
+ of their respective contributors may be used to endorse or
+ promote products derived from this software without specific
+ prior written permission.
+* Contributor grants a license (with the right to sublicense) under
+ claims of Contributor's patents that Contributor can license that
+ are infringed by the Contribution (as delivered by Contributor) to
+ make, use, distribute, sell, offer for sale, and import the
+ Contribution and derivative works thereof solely to the minimum
+ extent necessary for licensee to exercise the granted copyright
+ license; this patent license applies solely to those portions of
+ the Contribution that are unmodified. No hardware per se is
+ licensed.
+* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
+ CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
+ CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ DAMAGE.
+
+== SECTION 3: Representations ==
+* You represent that You are legally entitled to grant the above
+ license. If your employer(s) has rights to intellectual property
+ that You create that includes Your Contributions, You represent
+ that You have received permission to make Contributions on behalf
+ of that employer, that Your employer has waived such rights for
+ Your Contributions.
+* You represent that each of Your Contributions is Your original
+ creation (see Section 4 for submissions on behalf of others).
+ You represent that Your Contribution submissions include complete
+ details of any third-party license or other restriction
+ (including, but not limited to, related patents and trademarks)
+ of which You are personally aware and which are associated with
+ any part of Your Contributions.
+
+== SECTION 4: Third Party Contributions ==
+* Should You wish to submit work that is not Your original creation,
+ You may submit it to TianoCore site separately from any
+ Contribution, identifying the complete details of its source
+ and of any license or other restriction (including, but not
+ limited to, related patents, trademarks, and license agreements)
+ of which You are personally aware, and conspicuously marking the
+ work as "Submitted on behalf of a third-party: [named here]".
+
+== SECTION 5: Miscellaneous ==
+* Applicable Laws. Any claims arising under or relating to this
+ Agreement shall be governed by the internal substantive laws of
+ the State of Delaware or federal courts located in Delaware,
+ without regard to principles of conflict of laws.
+* Language. This Agreement is in the English language only, which
+ language shall be controlling in all respects, and all versions
+ of this Agreement in any other language shall be for accommodation
+ only and shall not be binding. All communications and notices made
+ or given pursuant to this Agreement, and all documentation and
+ support to be provided, unless otherwise noted, shall be in the
+ English language.
+
diff --git a/Core/IntelFrameworkPkg/FrameworkSpecConformance.txt b/Core/IntelFrameworkPkg/FrameworkSpecConformance.txt new file mode 100644 index 0000000000..36644c85be --- /dev/null +++ b/Core/IntelFrameworkPkg/FrameworkSpecConformance.txt @@ -0,0 +1,1342 @@ +##
+# This file is used to document mismatches between Intel Platform Innovation Framework specification
+# (http://www.intel.com/technology/framework/spec.htm) and data structures defind at IntelFrameworkPkg
+# package in EdkII Open Source Project (https://edk2.tianocore.org/source/browse/edk2/trunk/edk2/IntelFrameworkPkg)
+##
+
+##
+# The general consideration about keeping the mismatches in EdkII:
+# 1. Some definitions defined in Framework specification may bring a little complexity on implementation. EdkII
+# makes changes on them from the view of code development.
+# 2. Some definitions are NOT defined in Framework specification, but introduced in Edk. EdkII chooses to keep
+# them for backward-compatibility.
+# 3. The name of some definitions are NOT consistent with Framework specification. If the name doesn't bring
+# misunderstanding literally, EdkII chooses to keep them for backward-compatibility.
+# 4. Some defintitions don't exactly match Framework specification, some new field members are introduced in EdkII
+# to reflect the latest industry standard.
+#
+# Note:
+# The IntelFrameworkPkg contains Framework specification contents that were not adopted by UEFI/PI, and names may be
+# changed (such as adding "FRAMEWORK_") to avoid name collisions with approved UEFI/PI specifications.
+##
+
+##
+# Mismatch with Intel Platform Innovation Framework for DataHubSubclass Specification (Version 0.90)
+##
+ 1. Guid/DataHubRecords.h
+ #define EFI_STRING_TOKEN UINT16
+
+ This macro named "EFI_STRING_TOKEN" is *NOT* defined in Framework specification. Keeping this inconsistency
+ for backward compatibility.
+
+ 2. Guid/DataHubRecords.h
+ #pragma pack(1)
+ typedef struct {
+ UINT8 LastPciBus;
+ } EFI_MISC_LAST_PCI_BUS_DATA;
+ ...
+ typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MISC_SUBCLASS_RECORDS Record;
+ } EFI_MISC_SUBCLASS_DRIVER_DATA;
+ #pragma pack()
+
+ Section "Alignment" in DataHubSubclass specification say "Fields in a data hub record should be aligned at their
+ natural boundaries". But in EdkII, the data structures above are packed.
+ Keeping this inconsistency for backward compatibility.
+
+ 3. Guid/DataHubRecords.h
+ #define EFI_SUBCLASS_INSTANCE_RESERVED 0
+ #define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF
+
+ The symbols above are *NOT* defined in DataHubSubclass specification. But the values are defined and are meaningful.
+ According to DataHubSubclass spec, value 0 means Reserved and -1 means Not Applicable. EdkII introduces these macros
+ to faciliate user development.
+
+##
+# Mismatch with Intel Platform Innovation Framework for CacheSubclass Specification (Version 0.90)
+##
+ 1. Guid/DataHubRecords.h
+ typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;
+
+ The definition named "EFI_MAXIMUM_CACHE_SIZE_DATA" is *NOT* consistent with CacheSubclass specification, in which
+ the name should be EFI_CACHE_MAXIMUM_SIZE_DATA. Keeping this inconsistency for backward compatibility.
+
+ 2. Guid/DataHubRecords.h
+ typedef struct {
+ UINT32 Level :3;
+ UINT32 Socketed :1;
+ UINT32 Reserved2 :1;
+ UINT32 Location :2;
+ UINT32 Enable :1;
+ UINT32 OperationalMode :2;
+ UINT32 Reserved1 :22;
+ } EFI_CACHE_CONFIGURATION_DATA;
+
+ The field type of the definition is *NOT* consistent with CacheSubclass specification. Specification defines
+ them as UINT16, which is incorrect and should be UINT32 because the total width of bit-fields is 32bits width.
+
+ 3. Guid/DataHubRecords.h
+ typedef enum {
+ CacheSizeRecordType = 1,
+ MaximumSizeCacheRecordType = 2,
+ CacheSpeedRecordType = 3,
+ CacheSocketRecordType = 4,
+ CacheSramTypeRecordType = 5,
+ CacheInstalledSramTypeRecordType = 6,
+ CacheErrorTypeRecordType = 7,
+ CacheTypeRecordType = 8,
+ CacheAssociativityRecordType = 9,
+ CacheConfigRecordType = 10
+ } EFI_CACHE_VARIABLE_RECORD_TYPE;
+
+ The data structure and all enumeration fields are *NOT* defined in CacheSubclass specification, which only
+ defines the following macros to specify the record number of the data record:
+ #define EFI_CACHE_SIZE_RECORD_NUMBER 0x00000001
+ #define EFI_CACHE_MAXIMUM_SIZE_RECORD_NUMBER 0x00000002
+ #define EFI_CACHE_SPEED_RECORD_NUMBER 0x00000003
+ #define EFI_CACHE_SOCKET_RECORD_NUMBER 0x00000004
+ #define EFI_CACHE_SRAM_SUPPORT_RECORD_NUMBER 0x00000005
+ #define EFI_CACHE_SRAM_INSTALL_RECORD_NUMBER 0x00000006
+ #define EFI_CACHE_ERROR_SUPPORT_RECORD_NUMBER 0x00000007
+ #define EFI_CACHE_TYPE_RECORD_NUMBER 0x00000008
+ #define EFI_CACHE_ASSOCIATIVITY_RECORD_NUMBER 0x00000009
+ #define EFI_CACHE_CONFIGURATION_RECORD_NUMBER 0x0000000A
+ Keeping this inconsistency for backward compatibility.
+
+ 4. Guid/DataHubRecords.h
+ typedef union {
+ EFI_CACHE_SIZE_DATA CacheSize;
+ ...
+ EFI_CACHE_ASSOCIATION_DATA CacheAssociation;
+ } EFI_CACHE_VARIABLE_RECORD;
+
+ typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CACHE_VARIABLE_RECORD VariableRecord;
+ } EFI_CACHE_DATA_RECORD;
+
+ The definitions above are *NOT* defined in CacheSubclass specification. EdkII introduces them to simplify the
+ code logic. Therefore developer doesn't need to allocate memory dynamically to construct variable length data record.
+ Keeping this inconsistency for backward compatibility.
+
+##
+# Mismatch with Intel Platform Innovation Framework for ProcSubclass Specification (Version 0.90)
+##
+ 1. Guid/DataHubRecords.h
+ #define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000
+
+ The value of the definition is *NOT* consistent with ProcSubclass specification, in which the value is 0x0100.
+ Keeping this inconsistency from the perspective of binary consistency.
+
+ 2. Guid/DataHubRecords.h
+ typedef struct {
+ UINT32 ProcessorBrandIndex :8;
+ UINT32 ProcessorClflush :8;
+ UINT32 ProcessorReserved :8;
+ UINT32 ProcessorDfltApicId :8;
+ } EFI_PROCESSOR_MISC_INFO;
+
+ The definition is *NOT* consistent with ProcSubclass specification, in which the name of third field is defined
+ as "LogicalProcessorCount" rather than "ProcessorReserved".
+ Keeping this inconsistency for backward compatibility.
+
+ 3. Guid/DataHubRecords.h
+ typedef enum {
+ ...
+ EfiProcessorFamilyUltraSparcIIIi = 0x58,
+ ...
+ EfiProcessorFamilyIntelPentiumM = 0xB9,
+ EfiProcessorFamilyIntelCeleronD = 0xBA,
+ EfiProcessorFamilyIntelPentiumD = 0xBB,
+ EfiProcessorFamilyIntelPentiumEx = 0xBC,
+ EfiProcessorFamilyIntelCoreSolo = 0xBD,
+ EfiProcessorFamilyReserved = 0xBE,
+ EfiProcessorFamilyIntelCore2 = 0xBF,
+ ...
+ EfiProcessorFamilyG6 = 0xCB,
+ EfiProcessorFamilyzArchitectur = 0xCC,
+ EfiProcessorFamilyViaC7M = 0xD2,
+ EfiProcessorFamilyViaC7D = 0xD3,
+ EfiProcessorFamilyViaC7 = 0xD4,
+ EfiProcessorFamilyViaEden = 0xD5,
+ ...
+ EfiProcessorFamilyIndicatorFamily2 = 0xFE,
+ EfiProcessorFamilyReserved1 = 0xFF
+ } EFI_PROCESSOR_FAMILY_DATA;
+
+ a. In ProcSubclass specification 0.9, the field name whose value equals to 0x58 is "EfiProcessorFamilyUltraSparcIIi".
+ Due to the name has been defined in previous field, changing it to "EfiProcessorFamilyUltraSparcIIIi" to avoid
+ build break.
+ b. The other fields listed here are *NOT* defined in ProcSubclass specification 0.9. They are introduced to
+ support new processor family (type 4) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 4. Guid/DataHubRecords.h
+ typedef enum {
+ ...
+ EfiProcessorSocket939 = 0x12,
+ EfiProcessorSocketmPGA604 = 0x13,
+ EfiProcessorSocketLGA771 = 0x14,
+ EfiProcessorSocketLGA775 = 0x15
+ } EFI_PROCESSOR_SOCKET_TYPE_DATA;
+
+ The fields listed here are *NOT* defined in ProcSubclass specification 0.9. They are introduced to support
+ new processor upgrade (type 4 offset 19h) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 5. Guid/DataHubRecords.h
+ typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;
+
+ The definition name "EFI_CACHE_ASSOCIATION_DATA" is *NOT* consistent with ProcSubclass specification 0.9, in which
+ the name should be "EFI_PROCESSOR_CACHE_ASSOCIATION_DATA". Keeping this inconsistency for backward compatibility.
+
+ 6. Guid/DataHubRecords.h
+ typedef enum {
+ EfiProcessorHealthy = 1,
+ EfiProcessorPerfRestricted = 2,
+ EfiProcessorFuncRestricted = 3
+ } EFI_PROCESSOR_HEALTH_STATUS;
+
+ The structure name "EFI_PROCESSOR_HEALTH_STATUS" is *NOT* consistent with ProcSubclass specification 0.9, in which
+ the name should be "EFI_PROCESSOR_HEALTH_STATUS_DATA". Keeping this inconsistency for backward compatibility.
+
+ 7. Guid/DataHubRecords.h
+ typedef enum {
+ ProcessorCoreFrequencyRecordType = 1,
+ ProcessorFsbFrequencyRecordType = 2,
+ ProcessorVersionRecordType = 3,
+ ProcessorManufacturerRecordType = 4,
+ ProcessorSerialNumberRecordType = 5,
+ ProcessorIdRecordType = 6,
+ ProcessorTypeRecordType = 7,
+ ProcessorFamilyRecordType = 8,
+ ProcessorVoltageRecordType = 9,
+ ProcessorApicBaseAddressRecordType = 10,
+ ProcessorApicIdRecordType = 11,
+ ProcessorApicVersionNumberRecordType = 12,
+ CpuUcodeRevisionDataRecordType = 13,
+ ProcessorStatusRecordType = 14,
+ ProcessorSocketTypeRecordType = 15,
+ ProcessorSocketNameRecordType = 16,
+ CacheAssociationRecordType = 17,
+ ProcessorMaxCoreFrequencyRecordType = 18,
+ ProcessorAssetTagRecordType = 19,
+ ProcessorMaxFsbFrequencyRecordType = 20,
+ ProcessorPackageNumberRecordType = 21,
+ ProcessorCoreFrequencyListRecordType = 22,
+ ProcessorFsbFrequencyListRecordType = 23,
+ ProcessorHealthStatusRecordType = 24,
+ ProcessorCoreCountRecordType = 25,
+ ProcessorEnabledCoreCountRecordType = 26,
+ ProcessorThreadCountRecordType = 27,
+ ProcessorCharacteristicsRecordType = 28,
+ ProcessorFamily2RecordType = 29,
+ ProcessorPartNumberRecordType = 30,
+ } EFI_CPU_VARIABLE_RECORD_TYPE;
+
+ The enumeration fields from ProcessorCoreFrequencyRecordType to ProcessorHealthStatusRecordType are *NOT* defined
+ in ProcSubclass specification 0.9, which only defines the following macros to specify the record number of the data record:
+ #define EFI_PROCESSOR_FREQUENCY_RECORD_NUMBER 0x00000001
+ #define EFI_PROCESSOR_BUS_FREQUENCY_RECORD_NUMBER 0x00000002
+ #define EFI_PROCESSOR_VERSION_RECORD_NUMBER 0x00000003
+ #define EFI_PROCESSOR_MANUFACTURER_RECORD_NUMBER 0x00000004
+ #define EFI_PROCESSOR_SERIAL_NUMBER_RECORD_NUMBER 0x00000005
+ #define EFI_PROCESSOR_ID_RECORD_NUMBER 0x00000006
+ #define EFI_PROCESSOR_TYPE_RECORD_NUMBER 0x00000007
+ #define EFI_PROCESSOR_FAMILY_RECORD_NUMBER 0x00000008
+ #define EFI_PROCESSOR_VOLTAGE_RECORD_NUMBER 0x00000009
+ #define EFI_PROCESSOR_APIC_BASE_ADDRESS_RECORD_NUMBER 0x0000000A
+ #define EFI_PROCESSOR_APIC_ID_RECORD_NUMBER 0x0000000B
+ #define EFI_PROCESSOR_APIC_VER_NUMBER_RECORD_NUMBER 0x0000000C
+ #define EFI_PROCESSOR_MICROCODE_REVISION_RECORD_NUMBER 0x0000000D
+ #define EFI_PROCESSOR_STATUS_RECORD_NUMBER 0x0000000E
+ #define EFI_PROCESSOR_SOCKET_TYPE_RECORD_NUMBER 0x0000000F
+ #define EFI_PROCESSOR_SOCKET_NAME_RECORD_NUMBER 0x00000010
+ #define EFI_PROCESSOR_CACHE_ASSOCIATION_RECORD_NUMBER 0x00000011
+ #define EFI_PROCESSOR_MAX_FREQUENCY_RECORD_NUMBER 0x00000012
+ #define EFI_PROCESSOR_ASSET_TAG_RECORD_NUMBER 0x00000013
+ #define EFI_PROCESSOR_MAX_FSB_FREQUENCY_RECORD_NUMBER 0x00000014
+ #define EFI_PROCESSOR_PACKAGE_NUMBER_RECORD_NUMBER 0x00000015
+ #define EFI_PROCESSOR_FREQUENCY_LIST_RECORD_NUMBER 0x00000016
+ #define EFI_PROCESSOR_FSB_FREQUENCY_LIST_RECORD_NUMBER 0x00000017
+ #define EFI_PROCESSOR_HEALTH_STATUS_RECORD_NUMBER 0x00000018
+ Keeping this inconsistency for backward compatibility.
+
+ The enumeration fields from ProcessorCoreCountRecordType to ProcessorPartNumberRecordType are *NOT* defined
+ in ProcSubclass specification 0.9.
+ They are introduced to support new fields for type 4 defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 8. Guid/DataHubRecords.h
+ typedef union {
+ EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;
+ ...
+ EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2;
+ } EFI_CPU_VARIABLE_RECORD;
+
+ typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CPU_VARIABLE_RECORD VariableRecord;
+ } EFI_CPU_DATA_RECORD;
+
+ The definitions above are *NOT* defined in ProcSubclass specification 0.9. EdkII introduces them to simplify the
+ code logic. Therefore developer doesn't need to allocate memory dynamically to construct variable length data record.
+ Keeping this inconsistency for backward compatibility.
+
+ 9. Guid/DataHubRecords.h
+ typedef STRING_REF EFI_PROCESSOR_PART_NUMBER_DATA;
+
+ typedef enum {
+ EfiProcessorFamilySh3 = 0x104,
+ EfiProcessorFamilySh4 = 0x105,
+ EfiProcessorFamilyArm = 0x118,
+ EfiProcessorFamilyStrongArm = 0x119,
+ EfiProcessorFamily6x86 = 0x12C,
+ EfiProcessorFamilyMediaGx = 0x12D,
+ EfiProcessorFamilyMii = 0x12E,
+ EfiProcessorFamilyWinChip = 0x140,
+ EfiProcessorFamilyDsp = 0x15E,
+ EfiProcessorFamilyVideo = 0x1F4
+ } EFI_PROCESSOR_FAMILY2_DATA;
+
+ typedef UINT8 EFI_PROCESSOR_CORE_COUNT_DATA;
+
+ typedef UINT8 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA;
+
+ typedef UINT8 EFI_PROCESSOR_THREAD_COUNT_DATA;
+
+ typedef struct {
+ UINT16 Reserved :1;
+ UINT16 Unknown :1;
+ UINT16 Capable64Bit :1;
+ UINT16 Reserved2 :13;
+ } EFI_PROCESSOR_CHARACTERISTICS_DATA;
+
+ The fields listed here are *NOT* defined in ProcSubclass specification 0.9. They are introduced to support
+ new fields for type 4 defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+##
+# Mismatch with Intel Platform Innovation Framework for MemSubclass Specification (Version 0.90)
+##
+ 1. Guid/DataHubRecords.h
+ typedef enum _EFI_MEMORY_FORM_FACTOR {
+ ...
+ EfiMemoryFormFactorFbDimm = 0x0F
+ } EFI_MEMORY_FORM_FACTOR;
+
+ typedef enum _EFI_MEMORY_ARRAY_TYPE {
+ ...
+ EfiMemoryTypeDdr2 = 0x13,
+ EfiMemoryTypeDdr2FbDimm = 0x14
+ } EFI_MEMORY_ARRAY_TYPE;
+
+ typedef enum {
+ ...
+ EfiMemoryStatePartial = 6
+ } EFI_MEMORY_STATE;
+
+ The fields listed above are *NOT* defined in MemSubclass specification 0.9. They are introduced to support
+ new memory device (type 17) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 2. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ EFI_EXP_BASE10_DATA MemorySpeed;
+ ...
+ } EFI_MEMORY_ARRAY_LINK_DATA;
+
+ The field name "MemorySpeed" in the definition above is *NOT* consistent with MemSubclass specification 0.9,
+ in which it is defined as MemoryTypeSpeed. Keeping this inconsistency for backward compatibility.
+
+ 3. Guid/DataHubRecords.h
+ #define EFI_MEMORY_CONTROLLER_INFORMATION_RECORD_NUMBER 0x00000008
+
+ typedef enum {
+ EfiErrorDetectingMethodOther = 1,
+ EfiErrorDetectingMethodUnknown = 2,
+ EfiErrorDetectingMethodNone = 3,
+ EfiErrorDetectingMethodParity = 4,
+ EfiErrorDetectingMethod32Ecc = 5,
+ EfiErrorDetectingMethod64Ecc = 6,
+ EfiErrorDetectingMethod128Ecc = 7,
+ EfiErrorDetectingMethodCrc = 8
+ } EFI_MEMORY_ERROR_DETECT_METHOD_TYPE;
+
+ typedef struct {
+ UINT8 Other :1;
+ UINT8 Unknown :1;
+ UINT8 None :1;
+ UINT8 SingleBitErrorCorrect :1;
+ UINT8 DoubleBitErrorCorrect :1;
+ UINT8 ErrorScrubbing :1;
+ UINT8 Reserved :2;
+ } EFI_MEMORY_ERROR_CORRECT_CAPABILITY;
+
+ typedef enum {
+ EfiMemoryInterleaveOther = 1,
+ EfiMemoryInterleaveUnknown = 2,
+ EfiMemoryInterleaveOneWay = 3,
+ EfiMemoryInterleaveTwoWay = 4,
+ EfiMemoryInterleaveFourWay = 5,
+ EfiMemoryInterleaveEightWay = 6,
+ EfiMemoryInterleaveSixteenWay = 7
+ } EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE;
+
+ typedef struct {
+ UINT16 Other :1;
+ UINT16 Unknown :1;
+ UINT16 SeventyNs:1;
+ UINT16 SixtyNs :1;
+ UINT16 FiftyNs :1;
+ UINT16 Reserved :11;
+ } EFI_MEMORY_SPEED_TYPE;
+
+ typedef struct {
+ UINT16 Other :1;
+ UINT16 Unknown :1;
+ UINT16 Standard :1;
+ UINT16 FastPageMode:1;
+ UINT16 EDO :1;
+ UINT16 Parity :1;
+ UINT16 ECC :1;
+ UINT16 SIMM :1;
+ UINT16 DIMM :1;
+ UINT16 BurstEdo :1;
+ UINT16 SDRAM :1;
+ UINT16 Reserved :5;
+ } EFI_MEMORY_SUPPORTED_TYPE;
+
+ typedef struct {
+ UINT8 Five :1;
+ UINT8 Three :1;
+ UINT8 Two :1;
+ UINT8 Reserved:5;
+ } EFI_MEMORY_MODULE_VOLTAGE_TYPE;
+
+ typedef struct {
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;
+ UINT8 MaxMemoryModuleSize;
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;
+ UINT8 NumberofMemorySlot;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;
+ UINT16 *MemoryModuleConfigHandles;
+ } EFI_MEMORY_CONTROLLER_INFORMATION;
+
+ typedef struct {
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;
+ UINT8 MaxMemoryModuleSize;
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;
+ UINT8 NumberofMemorySlot;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;
+ EFI_INTER_LINK_DATA MemoryModuleConfig[1];
+ } EFI_MEMORY_CONTROLLER_INFORMATION_DATA;
+
+ The definitions above are *NOT* defined in MemSubclass specification 0.9. They are introduced to support
+ new memory controller information (type 5) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 4. Guid/DataHubRecords.h
+ #define EFI_MEMORY_32BIT_ERROR_INFORMATION_RECORD_NUMBER 0x00000009
+
+ typedef enum {
+ EfiMemoryErrorOther = 1,
+ EfiMemoryErrorUnknown = 2,
+ EfiMemoryErrorOk = 3,
+ EfiMemoryErrorBadRead = 4,
+ EfiMemoryErrorParity = 5,
+ EfiMemoryErrorSigleBit = 6,
+ EfiMemoryErrorDoubleBit = 7,
+ EfiMemoryErrorMultiBit = 8,
+ EfiMemoryErrorNibble = 9,
+ EfiMemoryErrorChecksum = 10,
+ EfiMemoryErrorCrc = 11,
+ EfiMemoryErrorCorrectSingleBit = 12,
+ EfiMemoryErrorCorrected = 13,
+ EfiMemoryErrorUnCorrectable = 14
+ } EFI_MEMORY_ERROR_TYPE;
+
+ typedef enum {
+ EfiMemoryGranularityOther = 1,
+ EfiMemoryGranularityOtherUnknown = 2,
+ EfiMemoryGranularityDeviceLevel = 3,
+ EfiMemoryGranularityMemPartitionLevel = 4
+ } EFI_MEMORY_ERROR_GRANULARITY_TYPE;
+
+ typedef enum {
+ EfiMemoryErrorOperationOther = 1,
+ EfiMemoryErrorOperationUnknown = 2,
+ EfiMemoryErrorOperationRead = 3,
+ EfiMemoryErrorOperationWrite = 4,
+ EfiMemoryErrorOperationPartialWrite = 5
+ } EFI_MEMORY_ERROR_OPERATION_TYPE;
+
+ typedef struct {
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;
+ UINT32 VendorSyndrome;
+ UINT32 MemoryArrayErrorAddress;
+ UINT32 DeviceErrorAddress;
+ UINT32 DeviceErrorResolution;
+ } EFI_MEMORY_32BIT_ERROR_INFORMATION;
+
+ The definitions above are *NOT* defined in MemSubclass specification 0.9. They are introduced to support
+ new 32-bit memory error information (type 18) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 5. Guid/DataHubRecords.h
+ #define EFI_MEMORY_64BIT_ERROR_INFORMATION_RECORD_NUMBER 0x0000000A
+
+ typedef struct {
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;
+ UINT32 VendorSyndrome;
+ UINT64 MemoryArrayErrorAddress;
+ UINT64 DeviceErrorAddress;
+ UINT32 DeviceErrorResolution;
+ } EFI_MEMORY_64BIT_ERROR_INFORMATION;
+
+ The definitions above are *NOT* defined in MemSubclass specification 0.9. They are introduced to support
+ new 64-bit memory error information (type 33) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 6. Guid/DataHubRecords.h
+ typedef union _EFI_MEMORY_SUBCLASS_RECORDS {
+ EFI_MEMORY_SIZE_DATA SizeData;
+ ...
+ EFI_MEMORY_64BIT_ERROR_INFORMATION Memory64bitErrorInfo;
+ } EFI_MEMORY_SUBCLASS_RECORDS;
+
+ typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MEMORY_SUBCLASS_RECORDS Record;
+ } EFI_MEMORY_SUBCLASS_DRIVER_DATA;
+
+ The definitions above are *NOT* defined in MemSubclass specification 0.9. EdkII introduces them to simplify the
+ code logic. Therefore developer doesn't need to allocate memory dynamically to construct variable length data record.
+ Keeping this inconsistency for backward compatibility.
+
+##
+# Mismatch with Intel Platform Innovation Framework for MiscSubclass Specification (Version 0.90)
+##
+ 1. Guid/DataHubRecords.h
+ #pragma pack(1)
+ typedef struct _USB_PORT_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } USB_PORT_DEVICE_PATH;
+
+ typedef struct _IDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } IDE_DEVICE_PATH;
+
+ typedef struct _RMC_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } RMC_CONN_DEVICE_PATH;
+
+ typedef struct _RIDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } RIDE_DEVICE_PATH;
+
+ typedef struct _GB_NIC_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } GB_NIC_DEVICE_PATH;
+
+ typedef struct _PS2_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } PS2_CONN_DEVICE_PATH;
+
+ typedef struct _SERIAL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } SERIAL_CONN_DEVICE_PATH;
+
+ typedef struct _PARALLEL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } PARALLEL_CONN_DEVICE_PATH;
+
+ typedef struct _FLOOPY_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+ } FLOOPY_CONN_DEVICE_PATH;
+
+ typedef union _EFI_MISC_PORT_DEVICE_PATH {
+ USB_PORT_DEVICE_PATH UsbDevicePath;
+ IDE_DEVICE_PATH IdeDevicePath;
+ RMC_CONN_DEVICE_PATH RmcConnDevicePath;
+ RIDE_DEVICE_PATH RideDevicePath;
+ GB_NIC_DEVICE_PATH GbNicDevicePath;
+ PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;
+ SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;
+ PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;
+ FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;
+ } EFI_MISC_PORT_DEVICE_PATH;
+ #pragma pack()
+
+ a. The definitions above are *NOT* defined in MiscSubclass specifications 0.9. EdkII introduces them to simplify the
+ code logic. Therefore developer doesn't need to allocate memory dynamically to construct variable length device
+ path for various device.
+ Keeping this inconsistency for backward compatibility.
+
+ b. The definitions above are packed. This way violates the rule of alignment defined in DataHubSubclass specification.
+ Section "Alignment" in DataHubSubclass specification say "Fields in a data hub record should be aligned at their
+ natural boundaries". Keeping this inconsistency for backward compatibility.
+
+ 2. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ EFI_MISC_PORT_DEVICE_PATH PortPath;
+ } EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;
+
+ The definition is *NOT* consistent with MiscSubclass specification, in which the type of last field is defined as
+ "EFI_DEVICE_PATH_PROTOCOL". The definition in Specification may bring a little complexity on implementation. User
+ have to allocate variable length memory to contain device path info and free them finially.
+ EdkII introduced an union type named EFI_MISC_PORT_DEVICE_PATH to avoid the logic above.
+
+ 3. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ UINT8 BiosMajorRelease;
+ UINT8 BiosMinorRelease;
+ UINT8 BiosEmbeddedFirmwareMajorRelease;
+ UINT8 BiosEmbeddedFirmwareMinorRelease;
+ } EFI_MISC_BIOS_VENDOR_DATA;
+
+ The fields listed above are *NOT* defined in MiscSubclass specification 0.9. They are introduced to support
+ new bios information (type 0) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 4. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ STRING_REF SystemSKUNumber;
+ STRING_REF SystemFamily;
+ } EFI_MISC_SYSTEM_MANUFACTURER_DATA;
+
+ The fields listed above are *NOT* defined in MiscSubclass specification 0.9. They are introduced to support
+ new system information (type 1) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 5. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ EFI_INTER_LINK_DATA ManagementDeviceThresholdLink;
+ UINT8 ComponentType;
+ } EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;
+
+ a. The field "ManagementDeviceThresholdLink" above is *NOT* defined in MiscSubclass specification 0.9. It is introduced to support
+ new management device component (type 35) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+ b. The field "ComponentType" above is *NOT* defined in MiscSubclass specifications 0.9. It's implementation-specific to simplify the code logic.
+ Keeping this inconsistency for backward compatibility.
+
+ 6. Guid/DataHubRecords.h
+ typedef struct {
+ UINT32 ChassisType :16;
+ UINT32 ChassisLockPresent:1;
+ UINT32 Reserved :15;
+ } EFI_MISC_CHASSIS_STATUS;
+
+ The definition is *NOT* consistent with MiscSubclass specification 0.9, in which the first field is assigned a wrong field
+ name "EFI_MISC_CHASSIS_TYPE". Due to EFI_MISC_CHASSIS_TYPE has been declared as a data type, it can not be used as a
+ field name again. EdkII changes its name to "ChassisType" to pass build.
+
+ 7. Guid/DataHubRecords.h
+ typedef enum {
+ ...
+ EfiSlotTypeAgp2X = 0x10,
+ ...
+ EfiSlotTypePciExpress = 0xA5,
+ EfiSlotTypePciExpressX1 = 0xA6,
+ EfiSlotTypePciExpressX2 = 0xA7,
+ EfiSlotTypePciExpressX4 = 0xA8,
+ EfiSlotTypePciExpressX8 = 0xA9,
+ EfiSlotTypePciExpressX16 = 0xAA
+ } EFI_MISC_SLOT_TYPE;
+
+ a. The field name "EfiSlotTypeAgp2X" is *NOT* consistent with MiscSubclass specification 0.9, in which it is named
+ "EfiSlotTypeApg2X".
+ From its literal sense, this field represents a AGP type display card, so it should be named as "EfiSlotTypeAgp2X".
+ b. The enumeration fields from "EfiSlotTypePciExpress" to "EfiSlotTypePciExpressX16" are *NOT* defined in MiscSubclass specification 0.9.
+ They are introduced to support new system slots (type 9) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 8. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;
+ ...
+ } EFI_MISC_ONBOARD_DEVICE_DATA;
+
+ The definition is *NOT* consistent with MiscSubclass specification 0.9, in which the field "OnBoardDeviceStatus" is
+ named as "OnBoardDeviceType". Keeping this inconsistency for backward compatibility.
+
+ 9. Guid/DataHubRecords.h
+ #define EFI_MISC_PORTABLE_BATTERY_RECORD_NUMBER 0x00000010
+
+ The name of the definition is *NOT* consistent with MiscSubclass specification 0.9, in which it is defined as
+ "EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER". Keeping this inconsistency for backward compatibility.
+
+ 10. Guid/DataHubRecords.h
+ typedef enum {
+ EfiPortableBatteryDeviceChemistryOther = 1,
+ EfiPortableBatteryDeviceChemistryUnknown = 2,
+ EfiPortableBatteryDeviceChemistryLeadAcid = 3,
+ EfiPortableBatteryDeviceChemistryNickelCadmium = 4,
+ EfiPortableBatteryDeviceChemistryNickelMetalHydride = 5,
+ EfiPortableBatteryDeviceChemistryLithiumIon = 6,
+ EfiPortableBatteryDeviceChemistryZincAir = 7,
+ EfiPortableBatteryDeviceChemistryLithiumPolymer = 8
+ } EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY;
+
+ The name of the definition is *NOT* consistent with MiscSubclass specification, in which it is defined as
+ "EFI_MISC_BATTERY_DEVICE_CHEMISTRY". And all field names have a redundant "Portable" string compared with MisSubclass
+ specification 0.9.
+ Keeping this inconsistency for backward compatibility.
+
+ 11. Guid/DataHubRecords.h
+ typedef struct {
+ STRING_REF Location;
+ STRING_REF Manufacturer;
+ STRING_REF ManufactureDate;
+ STRING_REF SerialNumber;
+ STRING_REF DeviceName;
+ EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY DeviceChemistry;
+ UINT16 DesignCapacity;
+ UINT16 DesignVoltage;
+ STRING_REF SBDSVersionNumber;
+ UINT8 MaximumError;
+ UINT16 SBDSSerialNumber;
+ UINT16 SBDSManufactureDate;
+ STRING_REF SBDSDeviceChemistry;
+ UINT8 DesignCapacityMultiplier;
+ UINT32 OEMSpecific;
+ UINT8 BatteryNumber;
+ BOOLEAN Valid;
+ } EFI_MISC_PORTABLE_BATTERY;
+
+ The definition is *NOT* consistent with MiscSubclass specification 0.9, in which the structure name is defined as
+ "EFI_MISC_BATTERY_LOCATION_DATA". Moreover, the name and the order of all fields are also different with MiscSubclass
+ specification 0.9. Keeping this inconsistency for backward compatibility.
+
+ 12. Guid/DataHubRecords.h
+ typedef enum {
+ ...
+ } EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
+
+ The name of the definition is *NOT* consistent with MiscSubclass specification 0.9, in which it is defined as
+ "EFI_MISC_BOOT_INFORMATION_STATUS_TYPE". Keeping this inconsistency for backward compatibility.
+
+ 13. Guid/DataHubRecords.h
+ typedef struct {
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;
+ ...
+ } EFI_MISC_BOOT_INFORMATION_STATUS_DATA;
+
+ The definition is *NOT* consistent with MiscSubclass specification 0.9, in which the type of the first field is
+ "EFI_MISC_BOOT_INFORMATION_STATUS_TYPE". Keeping this inconsistency for backward compatibility.
+
+ 14. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ } EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;
+
+ The name of the definition is *NOT* consistent with MiscSubclass specification 0.9, in which it is defined as
+ "EFI_MISC_POWER_SUPPLY_UNIT_GROUP_DATA". Keeping this inconsistency for backward compatibility.
+
+ 15. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ } SMBIOS_STRUCTURE_HDR;
+
+ The name of the definition is *NOT* consistent with MiscSubclass specification 0.9, in which the structure name
+ is defined as "EFI_SMBIOS_STRUCTURE_HDR". Due to this structure is commonly used by vendor to construct SmBios
+ type 0x80~0xFF table, Keeping this inconsistency for backward compatibility.
+
+ 16. Guid/DataHubRecords.h
+ typedef struct {
+ SMBIOS_STRUCTURE_HDR Header;
+ ...
+ } EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;
+
+ The definition is *NOT* consistent with MiscSubclass specification 0.9, in which the type of the first field is
+ "EFI_SMBIOS_STRUCTURE_HDR". Keeping this inconsistency for backward compatibility.
+
+ 17. Guid/DataHubRecords.h
+ typedef struct {
+ UINT16 PowerSupplyHotReplaceable:1;
+ UINT16 PowerSupplyPresent :1;
+ UINT16 PowerSupplyUnplugged :1;
+ UINT16 InputVoltageRangeSwitch :4;
+ UINT16 PowerSupplyStatus :3;
+ UINT16 PowerSupplyType :4;
+ UINT16 Reserved :2;
+ } EFI_MISC_POWER_SUPPLY_CHARACTERISTICS;
+
+ all field type in the definition are *NOT* consistent with MiscSubclass specification 0.9, in which it is defined as
+ "UINT32" and the total width of bit-fields is 32bits width.
+ Keeping this inconsistency for backward compatibility.
+
+ 18. Guid/DataHubRecords.h
+ #define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x00000020
+
+ typedef struct {
+ UINT16 LogAreaLength;
+ UINT16 LogHeaderStartOffset;
+ UINT16 LogDataStartOffset;
+ UINT8 AccessMethod;
+ UINT8 LogStatus;
+ UINT32 LogChangeToken;
+ UINT32 AccessMethodAddress;
+ UINT8 LogHeaderFormat;
+ UINT8 NumberOfSupportedLogType;
+ UINT8 LengthOfLogDescriptor;
+ } EFI_MISC_SYSTEM_EVENT_LOG_DATA;
+
+ #define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00
+ #define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01
+ #define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02
+ #define ACCESS_MEMORY_MAPPED 0x03
+ #define ACCESS_GPNV 0x04
+
+ The definitions listed above are *NOT* defined in MiscSubclass specification 0.9. It is introduced to support
+ new system event log (type 15) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 19. Guid/DataHubRecords.h
+ #define EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD_RECORD_NUMBER 0x00000021
+
+ typedef struct {
+ UINT16 LowerThresNonCritical;
+ UINT16 UpperThresNonCritical;
+ UINT16 LowerThresCritical;
+ UINT16 UpperThresCritical;
+ UINT16 LowerThresNonRecover;
+ UINT16 UpperThresNonRecover;
+ } EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD;
+
+ The definitions listed above are *NOT* defined in MiscSubclass specification 0.9. It is introduced to support
+ new management device threshold data (type 36) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 20. Guid/DataHubRecords.h
+ typedef union {
+ EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;
+ ...
+ EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD MiscManagementDeviceThreshold;
+ } EFI_MISC_SUBCLASS_RECORDS;
+
+ typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MISC_SUBCLASS_RECORDS Record;
+ } EFI_MISC_SUBCLASS_DRIVER_DATA;
+
+ The definitions above are *NOT* defined in MemSubclass specification 0.9. EdkII introduces them to simplify the
+ code logic. Therefore developer doesn't need to allocate memory dynamically to construct variable length data record.
+ Keeping this inconsistency for backward compatibility.
+
+ 21. Guid/DataHubRecords.h
+ typedef struct {
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;
+ UINT8 CoolingDeviceUnitGroup;
+ UINT16 CoolingDeviceNominalSpeed;
+ UINT32 CoolingDeviceOemDefined;
+ } EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;
+
+ The "CoolingDeviceUnitGroup" field and "CoolingDeviceNominalSpeed" field are *NOT* consistent with
+ MiscSubclass specification 0.9. These fields are aligned with SMBIOS 2.6 specification. And user can easily
+ assign any value to CoolingDeviceNominalSpeed.
+
+ 22. Guid/DataHubRecords.h
+ typedef enum {
+ ...
+ EfiSlotDataBusWidth1xOrx1 = 0x8,
+ EfiSlotDataBusWidth2xOrx2 = 0x9,
+ EfiSlotDataBusWidth4xOrx4 = 0xA,
+ EfiSlotDataBusWidth8xOrx8 = 0xB,
+ EfiSlotDataBusWidth12xOrx12 = 0xC,
+ EfiSlotDataBusWidth16xOrx16 = 0xD,
+ EfiSlotDataBusWidth32xOrx32 = 0xE
+ } EFI_MISC_SLOT_DATA_BUS_WIDTH;
+
+ The enumeration fields from "EfiSlotDataBusWidth1xOrx1" to "EfiSlotDataBusWidth32xOrx32" are *NOT* defined in MiscSubclass specification 0.9.
+ They are introduced to support new system slots (type 9) defined in SmBios 2.6 specification.
+ Keeping this inconsistency to reflect the latest industry standard.
+
+ 23. Guid/DataHubRecords.h
+ typedef struct {
+ ...
+ UINT16 TemperatureProbeMaximumValue;
+ UINT16 TemperatureProbeMinimumValue;
+ UINT16 TemperatureProbeResolution;
+ UINT16 TemperatureProbeTolerance;
+ UINT16 TemperatureProbeAccuracy;
+ UINT16 TemperatureProbeNominalValue;
+ UINT16 MDLowerNoncriticalThreshold;
+ UINT16 MDUpperNoncriticalThreshold;
+ UINT16 MDLowerCriticalThreshold;
+ UINT16 MDUpperCriticalThreshold;
+ UINT16 MDLowerNonrecoverableThreshold;
+ UINT16 MDUpperNonrecoverableThreshold;
+ ...
+ } EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;
+
+ The structure fields from "TemperatureProbeMaximumValue" to "MDUpperNonrecoverableThreshold" are *NOT* consistent with MiscSubclass specification 0.9.
+ The specification defines the fields type as EFI_EXP_BASE10_DATA. In fact, they should be UINT16 type because they refer to 16bit width data.
+ Keeping this inconsistency for backward compatibility.
+
+ 24. Guid/DataHubRecords.h
+ #define EFI_MISC_IPMI_INTERFACE_TYPE_DATA_RECORD_NUMBER EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER
+
+ The definition above is *NOT* defined in MiscSubclass specifications 0.9. It's defined for backward compatibility.
+
+##
+# Mismatch with Intel Platform Innovation Framework for Status Codes Specification (Version 0.92)
+##
+ 1. Include/Framework/StatusCode.h
+ #define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+ #define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+ #define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+ #define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+ #define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+ #define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+ #define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+ #define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+
+ #define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+ #define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+ #define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+ #define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+ #define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+ #define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+
+ #define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+ The definitions above are *NOT* defined in Framework StatusCodes specification 0.92. But these subclass-specific error code
+ operations are needed for EdkII implementation.
+ Keeping this inconsistency for backward compatibility.
+
+ 2. Include/Framework/StatusCode.h
+ typedef union {
+ CHAR8 *Ascii;
+ CHAR16 *Unicode;
+ ...
+ } EFI_STATUS_CODE_STRING;
+
+ The definition is *NOT* consistent with Framework SatausCodes specification 0.92, in which the first field is defined as "CHAR8 Ascii[]"
+ and the second field is defined as "CHAR16 Unicode[]". Keeping this inconsistency for backward compatibility.
+
+ 3. Include/Framework/StatusCode.h
+ #define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
+ #define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
+ #define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
+ #define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
+ #define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
+ #define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
+ #define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
+ #define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
+ #define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
+ #define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
+ #define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
+ #define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
+ #define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
+ #define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
+ #define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
+ #define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
+ #define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
+
+ The definitions are *NOT* defined in Framework StatusCodes specification 0.92, in which IA32 and IPF exception subclass error code definitions
+ are defined but omit the corresponding definitions for X64. EdkII introduce these definitions for implementation.
+
+##
+# Mismatch with Intel Platform Innovation Framework for EFI Boot Script Specification (Version 0.91)
+##
+ 1. Include/Protocol/BootScriptSave.h
+ #define EFI_BOOT_SCRIPT_SAVE_PROTOCOL_GUID \
+ { \
+ 0x470e1529, 0xb79e, 0x4e32, {0xa0, 0xfe, 0x6a, 0x15, 0x6d, 0x29, 0xf9, 0xb2 } \
+ }
+
+ The macro name "EFI_BOOT_SCRIPT_SAVE_PROTOCOL_GUID" is *NOT* consistent with Framework BootScript specification 0.91,
+ in which it's defined as "EFI_BOOT_SCRIPT_SAVE_GUID". Keeping this inconsistency for backward compatibility.
+
+ 2. Include/Protocol/BootScriptSave.h
+ EFI_STATUS
+ EFI_BOOTSERVICE
+ (EFIAPI *EFI_BOOT_SCRIPT_WRITE) (
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ ...
+ );
+
+ The first parameter's type is *NOT* consistent with Framework BootScript specification 0.91, in which it's defined as
+ "struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL". Keeping this inconsistency for backward compatibility.
+
+ 3. Include/Framework/BootScript.h
+ #define EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
+ #define EFI_BOOT_SCRIPT_INFORMATION_OPCODE 0x0A
+ #define EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE 0x0B
+ #define EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE 0x0C
+ #define EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x0D
+
+ The OPCODEs above are not defined in Framework BootScript Specification 0.91, but adopted by PI 1.0 Spec. And they
+ are needed for EdkII implementation.
+
+ 4. Include/Framework/BootScript.h
+ #define EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
+ #define EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
+
+ The two OPCODEs are *NOT* defined in Framework BootScript specification 0.91. EdkII introduces them to indicate the start
+ or end of the boot script table.
+ Keeping this inconsistency for backward compatibility.
+
+ 5. Include/Protocol/BootScriptSave.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_BOOT_SCRIPT_CLOSE_TABLE) (
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ ...
+ );
+
+ The first parameter's type is *NOT* consistent with BootScript specification, in which it's defined as
+ "struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL". Keeping this inconsistency for backward compatibility.
+
+ 6. Include/Include/BootScriptExecuter.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_PEI_BOOT_SCRIPT_EXECUTE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI *This,
+ ...
+ );
+
+ The second parameter's type is *NOT* consistent with BootScript specification, in which it's defined as
+ "struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI". Keeping this inconsistency for backward compatibility.
+
+##
+# Mismatch with Intel Platform Innovation Framework for EFI DXE CIS (Version 0.91)
+##
+ 1. Include/Framework/DxeCis.h
+ EFI_STATUS_CODE_ARCH_PROTOCOL is removed.
+
+ EdkII doesn't provide EFI_STATUS_CODE_ARCH_PROTOCOL definition due to ReportStatusCode() field has been
+ removed from EFI Runtime Service Table of PI specification. EFI_STATUS_CODE_ARCH_PROTOCOL is *NOT* required,
+ and is replaced with EFI_STATUS_CODE_RUNTIME_PROTOCOL.
+
+##
+# Mismatch with Intel Platform Innovation Framework for EFI Firmware Volume Specification (Version 0.9)
+##
+ 1. Include/Framework/FirmwareVolumeImageFormat.h
+ #define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
+ #define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
+
+ The two macros are *NOT* defined in Framework FV specification 0.9. EdkII introduces them as a mask to calculate the
+ value of authentication status.
+
+##
+# Mismatch with Intel Platform Innovation Framework for EFI Human Interface Infrastructure Specification (Version 0.92)
+##
+ 1. Include/Protocol/FrameworkHii.h
+ #define EFI_HII_PROTOCOL_GUID \
+ { \
+ 0xd7ad636e, 0xb997, 0x459b, {0xbf, 0x3f, 0x88, 0x46, 0x89, 0x79, 0x80, 0xe1} \
+ }
+
+ The Framework HII specification 0.92 changed part of HII interfaces but did not update the protocol GUID.
+ This change should cause a change of GUID in both of code and HII spec. EdkII updates the GUID in code,
+ but the Framework HII specification 0.92 is not updated. This is a known issue.
+
+ 2. Include/Protocol/FrameworkHii.h
+ typedef struct {
+ ...
+ EFI_HANDLE COBExportHandle;
+ } EFI_HII_HANDLE_PACK;
+
+ The last field "COBExportHandle" of EFI_HII_HANDLE_PACK is *NOT* defined in the Framework HII specification
+ 0.92. Keeping this inconsistency for backward compatibility.
+
+ 3. Include/Protocol/FrameworkHii.h
+ typedef struct {
+ UINTN NumberOfPackages;
+ EFI_GUID *GuidId;
+ } EFI_HII_PACKAGES;
+
+ The definition is *NOT* consistent with Framework HII specification 0.92, in which a field "HandlePack" is defined.
+ EdkII changes the EFI_HII_PACKAGES to contain various number of packages of different types just after the structure
+ as inline data, which will bring the flexibility on development.
+
+ 4. Include/Protocol/FrameworkHii.h
+ struct _EFI_HII_PROTOCOL {
+ ...
+ EFI_HII_RESET_STRINGS ResetStrings;
+ ...
+ };
+
+ The field listed above is *NOT* defined in Framework HII specification 0.92. EdkII adds this field to provide
+ an ability of removing any new strings that were added after the initial string export for this handle.
+
+ 5. Include/Protocol/FrameworkHii.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_HII_GLYPH_TO_BLT)(
+ ...
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL Foreground,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background,
+ ...
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer
+ );
+
+ The type of the parameters listed above are *NOT* consistent with Framework HII specification 0.92, in which
+ the type of these parameters is EFI_UGA_PIXEL. Here the definition uses the EFI_GRAPHICS_OUTPUT_BLT_PIXEL which
+ defined in UEFI2.1 spec. Keeping this inconsistency for backward compatibility.
+
+ 6. Include/Protocol/FrameworkHii.h
+ typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+ } EFI_IFR_SUPPRESS;
+
+ typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+ } EFI_IFR_GRAY_OUT;
+
+ typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Popup;
+ UINT8 Flags;
+ } EFI_IFR_INCONSISTENT;
+
+ typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId;
+ UINT8 Width;
+ UINT16 Value;
+ } FRAMEWORK_EFI_IFR_EQ_ID_VAL;
+
+ typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId;
+ UINT8 Width;
+ UINT16 ListLength;
+ UINT16 ValueList[1];
+ } FRAMEWORK_EFI_IFR_EQ_ID_LIST;
+
+ typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId1;
+ UINT8 Width;
+ UINT16 QuestionId2;
+ } FRAMEWORK_EFI_IFR_EQ_ID_ID;
+
+ typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 VariableId;
+ UINT16 Value;
+ } EFI_IFR_EQ_VAR_VAL;
+
+ The defintions are not complied with Framework HII spec 0.92. Keeping the inconsistent for implementation needed.
+
+ 7. Include/Protocol/FrameworkFormCallback.h
+ #define RESET_REQUIRED 1
+ #define EXIT_REQUIRED 2
+ #define SAVE_REQUIRED 4
+ #define NV_CHANGED 8
+ #define NV_NOT_CHANGED 16
+
+ These macros are *NOT* defined in the Framework HII specification 0.92. These Flags are introduced to describe
+ the standard behavior of the browser after the callback.
+ Keeping this inconsistency for backward compatibility.
+
+ 8. Include/Protocol/FrameworkFormCallback.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_NV_WRITE)(
+ ...
+ IN UINT32 Attributes,
+ ...
+ );
+
+ The definition is *NOT* consistent with Framework HII specification 0.92, in which the type of Attributes
+ parameter is defined as "UINT32 *". EdkII changes the type of Attributes from UINT32 * to UINT32 because
+ the input paramter is not necessary to use pointer date type.
+
+##
+# Mismatch with Intel Platform Innovation Framework for PEI CIS Specification (Version 0.91)
+##
+ 1. Include/Ppi/ReadOnlyVariable.h
+ #define EFI_VARIABLE_READ_ONLY 0x00000008
+
+ In Framework PeiCis specification 0.91, neither the macro or its value is defined.
+ Keeping this inconsistency for backward compatibility.
+
+ 2. Include/Ppi/FindFv.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_PEI_FIND_FV_FINDFV)(
+ IN EFI_PEI_FIND_FV_PPI *This,
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT8 *FvNumber,
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **FVAddress
+ );
+
+ The definition is *NOT* consistent with Framework PeiCis specification 0.91. Compared with spec, the order
+ of the first and second parameters is reversed. Keeping this inconsistency for backward compatibility.
+
+##
+# Mismatch with Intel Platform Innovation Framework for EFI SMM CIS (Version 0.91)
+##
+ 1. Include/Guid/SmramMemoryReserve.h
+ typedef struct {
+ UINT32 NumberOfSmmReservedRegions;
+ ...
+ } EFI_SMRAM_HOB_DESCRIPTOR_BLOCK;
+
+ 1) The name of the definition is *NOT* consistent with Framework SmmCis specification 0.91, in which it's
+ defined as "EFI_HOB_SMRAM_DESCRIPTOR_BLOCK" rather than "EFI_SMRAM_HOB_DESCRIPTOR_BLOCK".
+ Keeping this inconsistency for backward compatibility.
+
+ 2) The definition of NumberOfSmmReservedRegions is *NOT* consistent with Framework SmmCis specification 0.91,
+ in which the type of this field is defined as UINTN. However, HOBs are supposed to be CPU neutral, so UINTN
+ is incorrect and UINT32 should be used.
+
+ 2. Include/Guid/SmramMemoryReserve.h
+ typedef enum {
+ ...
+ IchnIoTrap3,
+ IchnIoTrap2,
+ IchnIoTrap1,
+ IchnIoTrap0,
+ IchnPciExpress,
+ IchnMonitor,
+ IchnSpi,
+ IchnQRT,
+ IchnGpioUnlock,
+ ...
+ } EFI_SMM_ICHN_SMI_TYPE;
+
+ The enumeration fields listed above are *NOT* defined in Framework SmmCis specification 0.91. EdkII introduces
+ these fields to support new SMI types.
+
+ 3. Include/Framework/SmmCis.h
+ typedef union {
+ ///
+ /// The processor save-state information for IA-32 processors.
+ ///
+ EFI_SMI_CPU_SAVE_STATE Ia32SaveState;
+ ///
+ /// Note: Inconsistency with the Framework SMM CIS spec - Itanium save state not included.
+ ///
+ /// The processor save-state information for Itanium processors.
+ ///
+ /// EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;
+ } EFI_SMM_CPU_SAVE_STATE;
+
+##
+# Mismatch with Intel Platform Innovation Framework for EFI S3 Resume Boot Path Specification (Version 0.9)
+##
+ 1. Include/Protocol/AcpiS3Save.h
+ typedef
+ EFI_STATUS
+ EFI_BOOTSERVICE
+ (EFIAPI *EFI_ACPI_GET_LEGACY_MEMORY_SIZE) (
+ IN EFI_ACPI_S3_SAVE_PROTOCOL *This,
+ OUT UINTN *Size
+ );
+
+ The first parameter's type is *NOT* consistent with Framework S3Resume specification, in which it's defined as
+ "struct _EFI_ACPI_S3_SAVE_PROTOCOL". Keeping this inconsistency for backward compatibility.
+
+ 2. Include/Protocol/AcpiS3Save.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_ACPI_S3_SAVE) (
+ IN EFI_ACPI_S3_SAVE_PROTOCOL *This,
+ IN VOID *LegacyMemoryAddress
+ );
+
+ The first parameter's type is *NOT* consistent with Framework S3Resume specification, in which it's defined as
+ "struct _EFI_ACPI_S3_SAVE_PROTOCOL". Also the EFI_BOOTSERVICE modifier is removed from the function declaration.
+
+ 3. Include/Protocol/AcpiS3Save.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_ACPI_GET_LEGACY_MEMORY_SIZE)(
+ IN EFI_ACPI_S3_SAVE_PROTOCOL *This,
+ OUT UINTN *Size
+ );
+
+ The first parameter's type is *NOT* consistent with Framework S3Resume specification, in which it's defined as
+ "struct _EFI_ACPI_S3_SAVE_PROTOCOL". Also the EFI_BOOTSERVICE modifier is removed from the function declaration.
+
+##
+# Mismatch with Intel Platform Innovation Framework for EFI ACPI Specification (Version 0.91)
+##
+ 1. Include/Protocol/AcpiSupport.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_ACPI_GET_ACPI_TABLE)(
+ ...
+ );
+
+ The function modifier is *NOT* consistent with Framework Acpi specification. The EFI_BOOTSERVICE modifier
+ is removed from the function declaration.
+
+ 2. Include/Protocol/AcpiSupport.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_ACPI_SET_ACPI_TABLE)(
+ ...
+ );
+
+ The function modifier is *NOT* consistent with Framework Acpi specification. The EFI_BOOTSERVICE modifier
+ is removed from the function declaration.
+
+ 3. Include/Protocol/AcpiSupport.h
+ typedef
+ EFI_STATUS
+ (EFIAPI *EFI_ACPI_PUBLISH_TABLES)(
+ ...
+ );
+
+ The function modifier is *NOT* consistent with Framework Acpi specification. The EFI_BOOTSERVICE modifier
+ is removed from the function declaration.
diff --git a/Core/IntelFrameworkPkg/Include/Framework/BootScript.h b/Core/IntelFrameworkPkg/Include/Framework/BootScript.h new file mode 100644 index 0000000000..9a16d722ee --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/BootScript.h @@ -0,0 +1,47 @@ +/** @file
+ This file contains the boot script defintions that are shared between the
+ Boot Script Executor PPI and the Boot Script Save Protocol.
+
+Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _BOOT_SCRIPT_H_
+#define _BOOT_SCRIPT_H_
+
+#include <PiDxe.h>
+///
+/// The framework implementation defines follow opcode that are different from the PI specification:
+/// Add FRAMEWORK_ prefix to avoid naming conflict.
+///
+/// S3 Boot Script Table identifier.
+///
+#define FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
+///
+/// The opcode is used to add a record for memory reads of the memory location and continues when the
+/// exit criteria is satisfied, or after a defined duration.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
+///
+/// The opcode is used to add a record for dispatching specified arbitrary code into a specified
+/// boot script table.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x0D
+///
+/// The opcode indicates the start of the boot script table.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
+///
+/// The opcode indicates the end of the boot script table.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
+
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Framework/DxeCis.h b/Core/IntelFrameworkPkg/Include/Framework/DxeCis.h new file mode 100644 index 0000000000..0f1b737ac1 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/DxeCis.h @@ -0,0 +1,176 @@ +/** @file
+ Include file for definitions in the Intel Platform Innovation Framework for EFI
+ Driver Execution Environment Core Interface Specification (DXE CIS) Version 0.91.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _DXECIS_H_
+#define _DXECIS_H_
+
+#include <Protocol/StatusCode.h>
+
+/**
+ Functions of this type are used with the Framework MP Services Protocol and
+ the SMM Services Table to execute a procedure on enabled APs. The context
+ the AP should use durng execution is specified by Buffer.
+
+ @param[in] Buffer The pointer to the procedure's argument.
+
+**/
+typedef
+VOID
+(EFIAPI *FRAMEWORK_EFI_AP_PROCEDURE)(
+ IN VOID *Buffer
+ );
+
+///
+/// The Framework EFI Runtime Services Table as an extension to the EFI 1.10 Runtime Services Table.
+///
+typedef struct {
+ //
+ // Table header for the Framework EFI Runtime Services Table
+ //
+ EFI_TABLE_HEADER Hdr;
+ //
+ // Time services
+ //
+ EFI_GET_TIME GetTime;
+ EFI_SET_TIME SetTime;
+ EFI_GET_WAKEUP_TIME GetWakeupTime;
+ EFI_SET_WAKEUP_TIME SetWakeupTime;
+ //
+ // Virtual memory services
+ //
+ EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
+ EFI_CONVERT_POINTER ConvertPointer;
+ //
+ // Variable services
+ //
+ EFI_GET_VARIABLE GetVariable;
+ EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
+ EFI_SET_VARIABLE SetVariable;
+ //
+ // Misc
+ //
+ EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
+ EFI_RESET_SYSTEM ResetSystem;
+ ///
+ /// A Framework extension to the EFI 1.10 runtime table.
+ /// It was moved to a protocol to avoid conflict with UEFI 2.0.
+ ///
+ EFI_REPORT_STATUS_CODE ReportStatusCode;
+} FRAMEWORK_EFI_RUNTIME_SERVICES;
+
+///
+/// The Framework EFI Boot Services Table. Complies with the DxeCis specification.
+///
+typedef struct {
+ ///
+ /// The table header for the EFI Boot Services Table.
+ ///
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // Task Priority Services
+ //
+ EFI_RAISE_TPL RaiseTPL;
+ EFI_RESTORE_TPL RestoreTPL;
+
+ //
+ // Memory Services
+ //
+ EFI_ALLOCATE_PAGES AllocatePages;
+ EFI_FREE_PAGES FreePages;
+ EFI_GET_MEMORY_MAP GetMemoryMap;
+ EFI_ALLOCATE_POOL AllocatePool;
+ EFI_FREE_POOL FreePool;
+
+ //
+ // Event & Timer Services
+ //
+ EFI_CREATE_EVENT CreateEvent;
+ EFI_SET_TIMER SetTimer;
+ EFI_WAIT_FOR_EVENT WaitForEvent;
+ EFI_SIGNAL_EVENT SignalEvent;
+ EFI_CLOSE_EVENT CloseEvent;
+ EFI_CHECK_EVENT CheckEvent;
+
+ //
+ // Protocol Handler Services
+ //
+ EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
+ EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
+ EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
+ EFI_HANDLE_PROTOCOL HandleProtocol;
+ EFI_HANDLE_PROTOCOL PcHandleProtocol;
+ EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
+ EFI_LOCATE_HANDLE LocateHandle;
+ EFI_LOCATE_DEVICE_PATH LocateDevicePath;
+ EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
+
+ //
+ // Image Services
+ //
+ EFI_IMAGE_LOAD LoadImage;
+ EFI_IMAGE_START StartImage;
+ EFI_EXIT Exit;
+ EFI_IMAGE_UNLOAD UnloadImage;
+ EFI_EXIT_BOOT_SERVICES ExitBootServices;
+
+ //
+ // Miscellaneous Services
+ //
+ EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
+ EFI_STALL Stall;
+ EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
+
+ //
+ // DriverSupport Services
+ //
+ EFI_CONNECT_CONTROLLER ConnectController;
+ EFI_DISCONNECT_CONTROLLER DisconnectController;
+
+ //
+ // Open and Close Protocol Services
+ //
+ EFI_OPEN_PROTOCOL OpenProtocol;
+ EFI_CLOSE_PROTOCOL CloseProtocol;
+ EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
+
+ //
+ // Library Services
+ //
+ EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
+ EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
+ EFI_LOCATE_PROTOCOL LocateProtocol;
+ EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
+ EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
+
+ //
+ // 32-bit CRC Services
+ //
+ EFI_CALCULATE_CRC32 CalculateCrc32;
+
+ //
+ // Miscellaneous Services
+ //
+ EFI_COPY_MEM CopyMem;
+ EFI_SET_MEM SetMem;
+} FRAMEWORK_EFI_BOOT_SERVICES;
+
+#define EFI_EVENT_RUNTIME_CONTEXT 0x20000000
+#define EFI_EVENT_NOTIFY_SIGNAL_ALL 0x00000400
+#define EFI_EVENT_SIGNAL_READY_TO_BOOT 0x00000203
+#define EFI_EVENT_SIGNAL_LEGACY_BOOT 0x00000204
+
+#endif
+
diff --git a/Core/IntelFrameworkPkg/Include/Framework/FirmwareVolumeHeader.h b/Core/IntelFrameworkPkg/Include/Framework/FirmwareVolumeHeader.h new file mode 100644 index 0000000000..7b471f1c75 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/FirmwareVolumeHeader.h @@ -0,0 +1,85 @@ +/** @file
+ Defines the data structure that is the volume header found at the beginning of
+ all firmware volumes that are either memory mapped or have an
+ associated FirmwareVolumeBlock protocol.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ These definitions are from the Firmware Volume Block Spec 0.9.
+
+**/
+
+#ifndef __EFI_FIRMWARE_VOLUME_HEADER_H__
+#define __EFI_FIRMWARE_VOLUME_HEADER_H__
+
+///
+/// Firmware Volume Block Attributes bit definitions.
+///@{
+#define EFI_FVB_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB_READ_STATUS 0x00000004
+
+#define EFI_FVB_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB_WRITE_STATUS 0x00000020
+
+#define EFI_FVB_LOCK_CAP 0x00000040
+#define EFI_FVB_LOCK_STATUS 0x00000080
+
+#define EFI_FVB_STICKY_WRITE 0x00000200
+#define EFI_FVB_MEMORY_MAPPED 0x00000400
+#define EFI_FVB_ERASE_POLARITY 0x00000800
+
+#define EFI_FVB_ALIGNMENT_CAP 0x00008000
+#define EFI_FVB_ALIGNMENT_2 0x00010000
+#define EFI_FVB_ALIGNMENT_4 0x00020000
+#define EFI_FVB_ALIGNMENT_8 0x00040000
+#define EFI_FVB_ALIGNMENT_16 0x00080000
+#define EFI_FVB_ALIGNMENT_32 0x00100000
+#define EFI_FVB_ALIGNMENT_64 0x00200000
+#define EFI_FVB_ALIGNMENT_128 0x00400000
+#define EFI_FVB_ALIGNMENT_256 0x00800000
+#define EFI_FVB_ALIGNMENT_512 0x01000000
+#define EFI_FVB_ALIGNMENT_1K 0x02000000
+#define EFI_FVB_ALIGNMENT_2K 0x04000000
+#define EFI_FVB_ALIGNMENT_4K 0x08000000
+#define EFI_FVB_ALIGNMENT_8K 0x10000000
+#define EFI_FVB_ALIGNMENT_16K 0x20000000
+#define EFI_FVB_ALIGNMENT_32K 0x40000000
+#define EFI_FVB_ALIGNMENT_64K 0x80000000
+///@}
+
+/// This is a simple macro defined as the set of all FV Block Attributes signifying capabilities.
+#define EFI_FVB_CAPABILITIES ( EFI_FVB_READ_DISABLED_CAP | \
+ EFI_FVB_READ_ENABLED_CAP | \
+ EFI_FVB_WRITE_DISABLED_CAP | \
+ EFI_FVB_WRITE_ENABLED_CAP | \
+ EFI_FVB_LOCK_CAP \
+ )
+
+/** A parameterized macro defining a boolean expression that tests the state of a particular bit.
+ *
+ * @param FvbAttributes Indicates a test for CLEAR if EFI_FVB_ERASE_POLARITY is 1, else test for SET.
+ *
+ * @param TestAttributes The set of bits to test.
+ *
+ * @param Bit A value indicating the bit(s) to test.
+ * If multiple bits are set, the logical OR of their tests is the expression's value.
+**/
+#define EFI_TEST_FFS_ATTRIBUTES_BIT( FvbAttributes, TestAttributes, Bit) \
+ ((BOOLEAN) \
+ ((FvbAttributes & EFI_FVB_ERASE_POLARITY) ? (((~TestAttributes) & Bit) == Bit) : ((TestAttributes & Bit) == Bit)) \
+ )
+
+/// A simple macro defined as the set of all FV Block Attribute bits that indicate status.
+#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
+
+#endif /* __EFI_FIRMWARE_VOLUME_HEADER_H__ */
diff --git a/Core/IntelFrameworkPkg/Include/Framework/FirmwareVolumeImageFormat.h b/Core/IntelFrameworkPkg/Include/Framework/FirmwareVolumeImageFormat.h new file mode 100644 index 0000000000..81a9045e6f --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/FirmwareVolumeImageFormat.h @@ -0,0 +1,38 @@ +/** @file
+ This file defines the data structures that are architecturally defined for file
+ images loaded via the FirmwareVolume protocol. The Firmware Volume specification
+ is the basis for these definitions.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ These definitions are from the Firmware Volume Spec 0.9.
+
+**/
+
+#ifndef __FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+#define __FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+
+//
+// Bit values for AuthenticationStatus
+//
+#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
+#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
+#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
+#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
+#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
+
+#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
+#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
+#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
+#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
+#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Framework/FrameworkInternalFormRepresentation.h b/Core/IntelFrameworkPkg/Include/Framework/FrameworkInternalFormRepresentation.h new file mode 100644 index 0000000000..61d020ec37 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/FrameworkInternalFormRepresentation.h @@ -0,0 +1,403 @@ +/** @file
+ This file defines the encoding for the VFR (Visual Form Representation) language.
+ Framework IFR is primarily consumed by the EFI presentation engine, and produced by EFI
+ internal application and drivers as well as all add-in card option-ROM drivers
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ These definitions are from the Framework Specification HII 0.92.
+
+**/
+
+#ifndef __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
+#define __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
+
+typedef UINT16 STRING_REF;
+
+//
+// IFR Op codes
+//
+#define FRAMEWORK_EFI_IFR_FORM_OP 0x01
+#define FRAMEWORK_EFI_IFR_SUBTITLE_OP 0x02
+#define FRAMEWORK_EFI_IFR_TEXT_OP 0x03
+#define EFI_IFR_GRAPHIC_OP 0x04
+#define FRAMEWORK_EFI_IFR_ONE_OF_OP 0x05
+#define FRAMEWORK_EFI_IFR_CHECKBOX_OP 0x06
+#define FRAMEWORK_EFI_IFR_NUMERIC_OP 0x07
+#define FRAMEWORK_EFI_IFR_PASSWORD_OP 0x08
+#define FRAMEWORK_EFI_IFR_ONE_OF_OPTION_OP 0x09 ///< ONEOF OPTION field.
+#define FRAMEWORK_EFI_IFR_SUPPRESS_IF_OP 0x0A
+#define EFI_IFR_END_FORM_OP 0x0B
+#define EFI_IFR_HIDDEN_OP 0x0C
+#define EFI_IFR_END_FORM_SET_OP 0x0D
+#define FRAMEWORK_EFI_IFR_FORM_SET_OP 0x0E
+#define FRAMEWORK_EFI_IFR_REF_OP 0x0F
+#define EFI_IFR_END_ONE_OF_OP 0x10
+#define FRAMEWORK_EFI_IFR_END_OP EFI_IFR_END_ONE_OF_OP
+#define FRAMEWORK_EFI_IFR_INCONSISTENT_IF_OP 0x11
+#define FRAMEWORK_EFI_IFR_EQ_ID_VAL_OP 0x12
+#define FRAMEWORK_EFI_IFR_EQ_ID_ID_OP 0x13
+#define FRAMEWORK_EFI_IFR_EQ_ID_LIST_OP 0x14
+#define FRAMEWORK_EFI_IFR_AND_OP 0x15
+#define FRAMEWORK_EFI_IFR_OR_OP 0x16
+#define FRAMEWORK_EFI_IFR_NOT_OP 0x17
+#define EFI_IFR_END_IF_OP 0x18 ///< For endif of inconsistentif, suppressif, grayoutif.
+#define EFI_IFR_GRAYOUT_IF_OP 0x19
+#define FRAMEWORK_EFI_IFR_DATE_OP 0x1A
+#define FRAMEWORK_EFI_IFR_TIME_OP 0x1B
+#define FRAMEWORK_EFI_IFR_STRING_OP 0x1C
+#define EFI_IFR_LABEL_OP 0x1D
+#define EFI_IFR_SAVE_DEFAULTS_OP 0x1E
+#define EFI_IFR_RESTORE_DEFAULTS_OP 0x1F
+#define EFI_IFR_BANNER_OP 0x20
+#define EFI_IFR_INVENTORY_OP 0x21
+#define EFI_IFR_EQ_VAR_VAL_OP 0x22
+#define FRAMEWORK_EFI_IFR_ORDERED_LIST_OP 0x23
+#define FRAMEWORK_EFI_IFR_VARSTORE_OP 0x24
+#define EFI_IFR_VARSTORE_SELECT_OP 0x25
+#define EFI_IFR_VARSTORE_SELECT_PAIR_OP 0x26
+#define EFI_IFR_LAST_OPCODE EFI_IFR_VARSTORE_SELECT_PAIR_OP
+#define EFI_IFR_OEM_OP 0xFE
+#define EFI_IFR_NV_ACCESS_COMMAND 0xFF
+
+//
+// Define values for the flags fields in some VFR opcodes. These are
+// bitmasks.
+//
+#define EFI_IFR_FLAG_DEFAULT 0x01
+#define EFI_IFR_FLAG_MANUFACTURING 0x02
+#define EFI_IFR_FLAG_INTERACTIVE 0x04
+#define EFI_IFR_FLAG_NV_ACCESS 0x08
+#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
+#define EFI_IFR_FLAG_LATE_CHECK 0x20
+
+#define EFI_NON_DEVICE_CLASS 0x00 ///< Useful when you do not want something in the Device Manager.
+#define EFI_DISK_DEVICE_CLASS 0x01
+#define EFI_VIDEO_DEVICE_CLASS 0x02
+#define EFI_NETWORK_DEVICE_CLASS 0x04
+#define EFI_INPUT_DEVICE_CLASS 0x08
+#define EFI_ON_BOARD_DEVICE_CLASS 0x10
+#define EFI_OTHER_DEVICE_CLASS 0x20
+
+#define EFI_SETUP_APPLICATION_SUBCLASS 0x00
+#define EFI_GENERAL_APPLICATION_SUBCLASS 0x01
+#define EFI_FRONT_PAGE_SUBCLASS 0x02
+#define EFI_SINGLE_USE_SUBCLASS 0x03 ///< Used to display a single entity ,and then exit.
+
+///
+/// Used to flag dynamically created op-codes. This is meaningful to the IFR Library set
+/// and the browser because we need to distinguish between compiled NV map data and created data.
+/// We do not allow new entries to be created in the NV map dynamically, but we do need
+/// to display this information correctly. To dynamically create op-codes and assume that their
+/// data will be saved, ensure that the NV starting location they refer to is pre-defined in the
+/// NV map.
+///
+#define EFI_IFR_FLAG_CREATED 128
+
+
+#pragma pack(1)
+//
+// IFR Structure definitions
+//
+typedef struct {
+ UINT8 OpCode;
+ UINT8 Length;
+} FRAMEWORK_EFI_IFR_OP_HEADER;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid;
+ STRING_REF FormSetTitle;
+ STRING_REF Help;
+ EFI_PHYSICAL_ADDRESS CallbackHandle;
+ UINT16 Class;
+ UINT16 SubClass;
+ UINT16 NvDataSize; ///< Set once; the size of the NV data as defined in the script.
+} FRAMEWORK_EFI_IFR_FORM_SET;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF FormTitle;
+} FRAMEWORK_EFI_IFR_FORM;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 LabelId;
+} EFI_IFR_LABEL;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF SubTitle;
+} FRAMEWORK_EFI_IFR_SUBTITLE;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Help;
+ STRING_REF Text;
+ STRING_REF TextTwo;
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_TEXT;
+
+//
+// goto
+//
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF Prompt;
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_REF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_FORM;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_FORM_SET;
+
+//
+// Also notice that the IFR_ONE_OF and IFR_CHECK_BOX are identical in structure......
+// code assumes this to be true, if this ever changes we need to revisit the InitializeTagStructures code
+//
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+} FRAMEWORK_EFI_IFR_ONE_OF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The offset in NV for storage of the data.
+ UINT8 MaxEntries; ///< The maximum number of options in the ordered list (=size of NVStore).
+ STRING_REF Prompt; ///< The string token for the prompt.
+ STRING_REF Help; ///< The string token for the context-help.
+} FRAMEWORK_EFI_IFR_ORDERED_LIST;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< If non-zero, it means that it is the default option.
+ UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_CHECKBOX, EFI_IFR_CHECK_BOX;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Option; ///< The string token describing the option.
+ UINT16 Value; ///< The value associated with this option that is stored in the NVRAM.
+ UINT8 Flags; ///< If non-zero, it means that it is the default option.
+ UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_ONE_OF_OPTION;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
+ UINT16 Minimum;
+ UINT16 Maximum;
+ UINT16 Step; ///< Zero means manual input. Otherwise, arrow selection is called for.
+ UINT16 Default;
+} FRAMEWORK_EFI_IFR_NUMERIC;
+
+//
+// There is an interesting twist with regards to Time and Date. This is one of the few items which can accept input
+// from a user, and may or may not need to use storage in the NVRAM space. The decided method for determining
+// if NVRAM space will be used (only for a TimeOp or DateOp) is: If .QuestionId == 0 && .Width == 0 (normally an
+// impossibility) then use system resources to store the data away and not NV resources. In other words, the setup
+// engine will call gRT->SetTime, and gRT->SetDate for the saving of data, and the values displayed will be from the
+// gRT->GetXXXX series of calls.
+//
+typedef struct {
+ FRAMEWORK_EFI_IFR_NUMERIC Hour;
+ FRAMEWORK_EFI_IFR_NUMERIC Minute;
+ FRAMEWORK_EFI_IFR_NUMERIC Second;
+} FRAMEWORK_EFI_IFR_TIME;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_NUMERIC Year;
+ FRAMEWORK_EFI_IFR_NUMERIC Month;
+ FRAMEWORK_EFI_IFR_NUMERIC Day;
+} FRAMEWORK_EFI_IFR_DATE;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId;///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
+ UINT8 MinSize; ///< Minimum allowable sized password.
+ UINT8 MaxSize; ///< Maximum allowable sized password.
+ UINT16 Encoding;
+} FRAMEWORK_EFI_IFR_PASSWORD;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
+ UINT8 MinSize; ///< Minimum allowable sized password.
+ UINT8 MaxSize; ///< Maximum allowable sized password.
+} FRAMEWORK_EFI_IFR_STRING;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_ONE_OF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 Value;
+ UINT16 Key;
+} EFI_IFR_HIDDEN;
+
+///
+/// Inconsistent with specification here:
+/// The following defintion may not comply with Framework Specification HII 0.92. To
+/// keep the inconsistant is for implementation needed.
+///@{
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+} EFI_IFR_SUPPRESS;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+} EFI_IFR_GRAY_OUT;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Popup;
+ UINT8 Flags;
+} EFI_IFR_INCONSISTENT;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The offset into variable storage.
+ UINT8 Width; ///< The size of variable storage.
+ UINT16 Value; ///< The value to compare against.
+} FRAMEWORK_EFI_IFR_EQ_ID_VAL;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The offset into variable storage.
+ UINT8 Width; ///< The size of variable storage.
+ UINT16 ListLength;
+ UINT16 ValueList[1];
+} FRAMEWORK_EFI_IFR_EQ_ID_LIST;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId1; ///< The offset into variable storage for first value to compare.
+ UINT8 Width; ///< The size of variable storage (must be same for both).
+ UINT16 QuestionId2; ///< The offset into variable storage for second value to compare.
+} FRAMEWORK_EFI_IFR_EQ_ID_ID;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 VariableId; ///< The offset into variable storage.
+ UINT16 Value; ///< The value to compare against.
+} EFI_IFR_EQ_VAR_VAL;
+///@}
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} FRAMEWORK_EFI_IFR_AND;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} FRAMEWORK_EFI_IFR_OR;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} FRAMEWORK_EFI_IFR_NOT;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_EXPR, EFI_IFR_END_IF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF Prompt;
+ STRING_REF Help;
+ UINT8 Flags;
+ UINT16 Key;
+} EFI_IFR_SAVE_DEFAULTS;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Help;
+ STRING_REF Text;
+ STRING_REF TextTwo; ///< Optional text.
+} EFI_IFR_INVENTORY;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid; ///< GUID for the variable.
+ UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
+ UINT16 Size; ///< The size of the variable storage.
+} FRAMEWORK_EFI_IFR_VARSTORE;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
+} EFI_IFR_VARSTORE_SELECT;
+
+///
+/// Used for the ideqid VFR statement where two variable stores may be referenced in the
+/// same VFR statement.
+/// A browser should treat this as an FRAMEWORK_EFI_IFR_VARSTORE_SELECT statement and assume that all following
+/// IFR opcodes use the VarId as defined here.
+///
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
+ UINT16 SecondaryVarId; ///< The variable store ID, as referenced elsewhere in the form.
+} EFI_IFR_VARSTORE_SELECT_PAIR;
+
+///
+/// Save defaults and restore defaults have same structure.
+///
+#define EFI_IFR_RESTORE_DEFAULTS EFI_IFR_SAVE_DEFAULTS
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Title; ///< The string token for the banner title.
+ UINT16 LineNumber; ///< 1-based line number.
+ UINT8 Alignment; ///< Left, center, or right-aligned.
+} EFI_IFR_BANNER;
+
+#define EFI_IFR_BANNER_ALIGN_LEFT 0
+#define EFI_IFR_BANNER_ALIGN_CENTER 1
+#define EFI_IFR_BANNER_ALIGN_RIGHT 2
+#define EFI_IFR_BANNER_TIMEOUT 0xFF
+
+#pragma pack()
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Framework/Hob.h b/Core/IntelFrameworkPkg/Include/Framework/Hob.h new file mode 100644 index 0000000000..070a23d192 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/Hob.h @@ -0,0 +1,34 @@ +/** @file
+ This file defines the data structures per HOB specification v0.9.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ These definitions are from the HOB Spec 0.9 that were not adopted by the PI specifications.
+
+**/
+
+#ifndef _HOB_H_
+#define _HOB_H_
+
+///
+/// Capsule volume HOB -- identical to a firmware volume.
+/// This macro is defined to comply with the hob Framework Spec. And the marco was
+/// retired in the PI1.0 specification.
+///
+#define EFI_HOB_TYPE_CV 0x0008
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+} EFI_HOB_CAPSULE_VOLUME;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Framework/PeiCis.h b/Core/IntelFrameworkPkg/Include/Framework/PeiCis.h new file mode 100644 index 0000000000..d823339eee --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/PeiCis.h @@ -0,0 +1,211 @@ +/** @file
+ The Include file for definitions in the Intel Platform Innovation Framework for EFI
+ Pre-EFI Initialization Core Interface Specification (PEI CIS) Version 0.91.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PEICIS_H__
+#define __PEICIS_H__
+
+#include <Ppi/PciCfg.h>
+//
+// Framework PEI Specification Revision information
+//
+#define FRAMEWORK_PEI_SPECIFICATION_MAJOR_REVISION 0
+#define FRAMEWORK_PEI_SPECIFICATION_MINOR_REVISION 91
+
+
+//
+// PEI services signature and Revision defined in Framework PEI spec
+//
+#define FRAMEWORK_PEI_SERVICES_SIGNATURE 0x5652455320494550ULL
+#define FRAMEWORK_PEI_SERVICES_REVISION ((FRAMEWORK_PEI_SPECIFICATION_MAJOR_REVISION<<16) | (FRAMEWORK_PEI_SPECIFICATION_MINOR_REVISION))
+
+
+
+typedef struct _FRAMEWORK_EFI_PEI_SERVICES FRAMEWORK_EFI_PEI_SERVICES;
+
+/**
+ The PEI Dispatcher will invoke each PEIM one time. During this pass, the PEI
+ Dispatcher will pass control to the PEIM at the AddressOfEntryPoint in the PE Header.
+
+ @param FfsHeader The pointer to the FFS file header.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEIM_ENTRY_POINT)(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+/**
+ This service abstracts the capability of the PEI
+ Foundation to discover instances of firmware volumes in the system.
+ Given the input file pointer, this service searches for the next
+ matching file in the Firmware File System (FFS) volume.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+ @param Instance This instance of the firmware volume to find. The value 0 is the Boot Firmware Volume (BFV).
+ @param FwVolHeader The pointer to the firmware volume header of the volume to return.
+
+ @retval EFI_SUCCESS The volume was found.
+ @retval EFI_NOT_FOUND The volume was not found.
+ @retval EFI_INVALID_PARAMETER FwVolHeader is NULL
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FFS_FIND_NEXT_VOLUME)(
+ IN FRAMEWORK_EFI_PEI_SERVICES **PeiServices,
+ IN UINTN Instance,
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **FwVolHeader
+ );
+
+/**
+ This service abstracts the capability of the PEI
+ Foundation to discover instances of firmware files in the system.
+ Given the input file pointer, this service searches for the next matching
+ file in the Firmware File System (FFS) volume.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+ @param SearchType A filter to find files only of this type.
+ @param FwVolHeader The pointer to the firmware volume header of the volume to search. This parameter
+ must point to a valid FFS volume.
+ @param FileHeader The pointer to the current file from which to begin searching. Upon return this pointer will be
+ updated to reflect the file found.
+
+ @retval EFI_SUCCESS The file was found.
+ @retval EFI_NOT_FOUND The file was not found.
+ @retval EFI_NOT_FOUND The header checksum was not zero.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FFS_FIND_NEXT_FILE)(
+ IN FRAMEWORK_EFI_PEI_SERVICES **PeiServices,
+ IN EFI_FV_FILETYPE SearchType,
+ IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader,
+ IN OUT EFI_FFS_FILE_HEADER **FileHeader
+ );
+
+/**
+ Given the input file pointer, this service searches for the next
+ matching file in the Firmware File System (FFS) volume.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+ @param SectionType The value of the section type to find.
+ @param FfsFileHeader A pointer to the file header that contains the set of sections to be searched.
+ @param SectionData A pointer to the discovered section, if successful.
+
+ @retval EFI_SUCCESS The section was found.
+ @retval EFI_NOT_FOUND The section was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FFS_FIND_SECTION_DATA)(
+ IN FRAMEWORK_EFI_PEI_SERVICES **PeiServices,
+ IN EFI_SECTION_TYPE SectionType,
+ IN EFI_FFS_FILE_HEADER *FfsFileHeader,
+ IN OUT VOID **SectionData
+ );
+
+///
+/// FRAMEWORK_EFI_PEI_SERVICES is a collection of functions whose implementation is provided by the PEI
+/// Foundation. The table may be located in the temporary or permanent memory, depending upon the capabilities
+/// and phase of execution of PEI.
+///
+/// These services fall into various classes, including the following:
+/// - Managing the boot mode.
+/// - Allocating both early and permanent memory.
+/// - Supporting the Firmware File System (FFS).
+/// - Abstracting the PPI database abstraction.
+/// - Creating Hand-Off Blocks (HOBs).
+///
+struct _FRAMEWORK_EFI_PEI_SERVICES {
+ EFI_TABLE_HEADER Hdr;
+ //
+ // PPI Functions
+ //
+ EFI_PEI_INSTALL_PPI InstallPpi;
+ EFI_PEI_REINSTALL_PPI ReInstallPpi;
+ EFI_PEI_LOCATE_PPI LocatePpi;
+ EFI_PEI_NOTIFY_PPI NotifyPpi;
+ //
+ // Boot Mode Functions
+ //
+ EFI_PEI_GET_BOOT_MODE GetBootMode;
+ EFI_PEI_SET_BOOT_MODE SetBootMode;
+ //
+ // HOB Functions
+ //
+ EFI_PEI_GET_HOB_LIST GetHobList;
+ EFI_PEI_CREATE_HOB CreateHob;
+ //
+ // Firmware Volume Functions
+ //
+ EFI_PEI_FFS_FIND_NEXT_VOLUME FfsFindNextVolume;
+ EFI_PEI_FFS_FIND_NEXT_FILE FfsFindNextFile;
+ EFI_PEI_FFS_FIND_SECTION_DATA FfsFindSectionData;
+ //
+ // PEI Memory Functions
+ //
+ EFI_PEI_INSTALL_PEI_MEMORY InstallPeiMemory;
+ EFI_PEI_ALLOCATE_PAGES AllocatePages;
+ EFI_PEI_ALLOCATE_POOL AllocatePool;
+ EFI_PEI_COPY_MEM CopyMem;
+ EFI_PEI_SET_MEM SetMem;
+ //
+ // (the following interfaces are installed by publishing PEIM)
+ // Status Code
+ //
+ EFI_PEI_REPORT_STATUS_CODE ReportStatusCode;
+ //
+ // Reset
+ //
+ EFI_PEI_RESET_SYSTEM ResetSystem;
+ ///
+ /// Inconsistent with specification here:
+ /// In Framework Spec, PeiCis0.91, CpuIo and PciCfg are NOT pointers.
+ ///
+
+ //
+ // I/O Abstractions
+ //
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+ EFI_PEI_PCI_CFG_PPI *PciCfg;
+};
+///
+/// Enumeration of reset types defined in the Framework Specification PeiCis.
+///
+typedef enum {
+ ///
+ /// Used to induce a system-wide reset. This sets all circuitry within the
+ /// system to its initial state. This type of reset is asynchronous to system
+ /// operation and operates withgout regard to cycle boundaries. EfiColdReset
+ /// is tantamount to a system power cycle.
+ ///
+ EfiPeiResetCold,
+ ///
+ /// Used to induce a system-wide initialization. The processors are set to their
+ /// initial state, and pending cycles are not corrupted. If the system does
+ /// not support this reset type, then an EfiResetCold must be performed.
+ ///
+ EfiPeiResetWarm,
+} EFI_PEI_RESET_TYPE;
+
+#endif
+
diff --git a/Core/IntelFrameworkPkg/Include/Framework/SmmCis.h b/Core/IntelFrameworkPkg/Include/Framework/SmmCis.h new file mode 100644 index 0000000000..7aefd5b41d --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/SmmCis.h @@ -0,0 +1,557 @@ +/** @file
+ Include file for definitions in the Intel Platform Innovation Framework for EFI
+ System Management Mode Core Interface Specification (SMM CIS) version 0.91.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SMM_CIS_H_
+#define _SMM_CIS_H_
+
+//
+// Share some common definitions with PI SMM
+//
+#include <Pi/PiSmmCis.h>
+#include <Protocol/SmmCpuIo.h>
+
+typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;
+
+//
+// SMM Base specification constant and types
+//
+#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)
+
+/**
+ Allocates pool memory from SMRAM for IA-32, or runtime memory for
+ the Itanium processor family.
+
+ @param PoolType The type of pool to allocate. The only supported type
+ is EfiRuntimeServicesData.
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer A pointer to a pointer to the allocated buffer if the
+ call succeeds. Otherwise, undefined.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+ @retval EFI_UNSUPPORTED In runtime.
+ @note Inconsistent with specification here:
+ In Framework Spec, this definition is named EFI_SMM_ALLOCATE_POOL.
+ To avoid a naming conflict, the definition is renamed.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ );
+
+/**
+ Returns pool memory to the system.
+
+ @param Buffer The pointer to the buffer to free.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+ @retval EFI_INVALID_PARAMETER Buffer was invalid.
+ @retval EFI_UNSUPPORTED In runtime.
+ @note Inconsistent with specification here:
+ In Framework Spec, this definition is named EFI_SMM_FREE_POOL.
+ To avoid a naming conflict, the definition is renamed.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_POOL)(
+ IN VOID *Buffer
+ );
+
+/**
+ Allocates memory pages from the system.
+
+ @param Type The type of allocation to perform.
+ @param MemoryType The only supported type is EfiRuntimeServicesData.
+ @param NumberofPages The number of contiguous 4 KB pages to allocate.
+ @param Memory Pointer to a physical address. On input, the way in which
+ the address is used depends on the value of Type. On output, the address
+ is set to the base of the page range that was allocated.
+
+ @retval EFI_SUCCESS The requested pages were allocated.
+ @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.
+ @retval EFI_NOT_FOUND The requested pages could not be found.
+ @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress
+ or AllocateAddress. Or, MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.
+ @note Inconsistent with specification here:
+ In the Framework Spec, this definition is named EFI_SMM_ALLOCATE_PAGES.
+ To avoid a naming conflict, the definition here is renamed.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN NumberOfPages,
+ OUT EFI_PHYSICAL_ADDRESS *Memory
+ );
+
+/**
+ Frees memory pages for the system.
+
+ @param Memory The base physical address of the pages to be freed.
+ @param NumberOfPages The number of contiguous 4 KB pages to free.
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+ @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.
+ @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().
+
+ @note Inconsistent with specification here:
+ In the Framework Spec, this definition is named EFI_SMM_FREE_PAGES.
+ To avoid a naming conflict, the definition here is renamed.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_PAGES)(
+ IN EFI_PHYSICAL_ADDRESS Memory,
+ IN UINTN NumberOfPages
+ );
+
+///
+/// The processor save-state information for IA-32 processors. This information is important in that the
+/// SMM drivers may need to ascertain the state of the processor before invoking the SMI.
+///
+typedef struct {
+ ///
+ /// Reserved for future processors. As such, software should not attempt to interpret or
+ /// write to this region.
+ ///
+ UINT8 Reserved1[248];
+ ///
+ /// The location of the processor SMBASE, which is the location where the processor
+ /// will pass control upon receipt of an SMI.
+ ///
+ UINT32 SMBASE;
+ ///
+ /// The revision of the SMM save state. This value is set by the processor.
+ ///
+ UINT32 SMMRevId;
+ ///
+ /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.
+ ///
+ UINT16 IORestart;
+ ///
+ /// Describes behavior that should be commenced in response to a halt instruction.
+ ///
+ UINT16 AutoHALTRestart;
+ ///
+ /// Reserved for future processors. As such, software should not attempt to interpret or
+ /// write to this region.
+ ///
+ UINT8 Reserved2[164];
+
+ //
+ // Registers in IA-32 processors.
+ //
+ UINT32 ES;
+ UINT32 CS;
+ UINT32 SS;
+ UINT32 DS;
+ UINT32 FS;
+ UINT32 GS;
+ UINT32 LDTBase;
+ UINT32 TR;
+ UINT32 DR7;
+ UINT32 DR6;
+ UINT32 EAX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 EBX;
+ UINT32 ESP;
+ UINT32 EBP;
+ UINT32 ESI;
+ UINT32 EDI;
+ UINT32 EIP;
+ UINT32 EFLAGS;
+ UINT32 CR3;
+ UINT32 CR0;
+} EFI_SMI_CPU_SAVE_STATE;
+
+///
+/// The processor save-state information for the Itanium processor family. This information is
+/// important in that the SMM drivers may need to ascertain the state of the processor before invoking
+/// the PMI. This structure is mandatory and must be 512 byte aligned.
+///
+typedef struct {
+ UINT64 reserved;
+ UINT64 r1;
+ UINT64 r2;
+ UINT64 r3;
+ UINT64 r4;
+ UINT64 r5;
+ UINT64 r6;
+ UINT64 r7;
+ UINT64 r8;
+ UINT64 r9;
+ UINT64 r10;
+ UINT64 r11;
+ UINT64 r12;
+ UINT64 r13;
+ UINT64 r14;
+ UINT64 r15;
+ UINT64 r16;
+ UINT64 r17;
+ UINT64 r18;
+ UINT64 r19;
+ UINT64 r20;
+ UINT64 r21;
+ UINT64 r22;
+ UINT64 r23;
+ UINT64 r24;
+ UINT64 r25;
+ UINT64 r26;
+ UINT64 r27;
+ UINT64 r28;
+ UINT64 r29;
+ UINT64 r30;
+ UINT64 r31;
+
+ UINT64 pr;
+
+ UINT64 b0;
+ UINT64 b1;
+ UINT64 b2;
+ UINT64 b3;
+ UINT64 b4;
+ UINT64 b5;
+ UINT64 b6;
+ UINT64 b7;
+
+ // application registers
+ UINT64 ar_rsc;
+ UINT64 ar_bsp;
+ UINT64 ar_bspstore;
+ UINT64 ar_rnat;
+
+ UINT64 ar_fcr;
+
+ UINT64 ar_eflag;
+ UINT64 ar_csd;
+ UINT64 ar_ssd;
+ UINT64 ar_cflg;
+ UINT64 ar_fsr;
+ UINT64 ar_fir;
+ UINT64 ar_fdr;
+
+ UINT64 ar_ccv;
+
+ UINT64 ar_unat;
+
+ UINT64 ar_fpsr;
+
+ UINT64 ar_pfs;
+ UINT64 ar_lc;
+ UINT64 ar_ec;
+
+ // control registers
+ UINT64 cr_dcr;
+ UINT64 cr_itm;
+ UINT64 cr_iva;
+ UINT64 cr_pta;
+ UINT64 cr_ipsr;
+ UINT64 cr_isr;
+ UINT64 cr_iip;
+ UINT64 cr_ifa;
+ UINT64 cr_itir;
+ UINT64 cr_iipa;
+ UINT64 cr_ifs;
+ UINT64 cr_iim;
+ UINT64 cr_iha;
+
+ // debug registers
+ UINT64 dbr0;
+ UINT64 dbr1;
+ UINT64 dbr2;
+ UINT64 dbr3;
+ UINT64 dbr4;
+ UINT64 dbr5;
+ UINT64 dbr6;
+ UINT64 dbr7;
+
+ UINT64 ibr0;
+ UINT64 ibr1;
+ UINT64 ibr2;
+ UINT64 ibr3;
+ UINT64 ibr4;
+ UINT64 ibr5;
+ UINT64 ibr6;
+ UINT64 ibr7;
+
+ // virtual registers
+ UINT64 int_nat; // nat bits for R1-R31
+
+} EFI_PMI_SYSTEM_CONTEXT;
+
+///
+/// The processor save-state information for IA-32 and Itanium processors. This information is
+/// important in that the SMM drivers may need to ascertain the state of the processor before invoking
+/// the SMI or PMI.
+///
+typedef union {
+ ///
+ /// The processor save-state information for IA-32 processors.
+ ///
+ EFI_SMI_CPU_SAVE_STATE Ia32SaveState;
+ ///
+ /// Note: Inconsistency with the Framework SMM CIS spec - Itanium save state not included.
+ ///
+ /// The processor save-state information for Itanium processors.
+ ///
+ /// EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;
+} EFI_SMM_CPU_SAVE_STATE;
+
+///
+/// The optional floating point save-state information for IA-32 processors. If the optional floating
+/// point save is indicated for any handler, the following data structure must be preserved.
+///
+typedef struct {
+ UINT16 Fcw;
+ UINT16 Fsw;
+ UINT16 Ftw;
+ UINT16 Opcode;
+ UINT32 Eip;
+ UINT16 Cs;
+ UINT16 Rsvd1;
+ UINT32 DataOffset;
+ UINT16 Ds;
+ UINT8 Rsvd2[10];
+ UINT8 St0Mm0[10], Rsvd3[6];
+ UINT8 St0Mm1[10], Rsvd4[6];
+ UINT8 St0Mm2[10], Rsvd5[6];
+ UINT8 St0Mm3[10], Rsvd6[6];
+ UINT8 St0Mm4[10], Rsvd7[6];
+ UINT8 St0Mm5[10], Rsvd8[6];
+ UINT8 St0Mm6[10], Rsvd9[6];
+ UINT8 St0Mm7[10], Rsvd10[6];
+ UINT8 Rsvd11[22*16];
+} EFI_SMI_OPTIONAL_FPSAVE_STATE;
+
+///
+/// The optional floating point save-state information for the Itanium processor family. If the optional
+/// floating point save is indicated for any handler, then this data structure must be preserved.
+///
+typedef struct {
+ UINT64 f2[2];
+ UINT64 f3[2];
+ UINT64 f4[2];
+ UINT64 f5[2];
+ UINT64 f6[2];
+ UINT64 f7[2];
+ UINT64 f8[2];
+ UINT64 f9[2];
+ UINT64 f10[2];
+ UINT64 f11[2];
+ UINT64 f12[2];
+ UINT64 f13[2];
+ UINT64 f14[2];
+ UINT64 f15[2];
+ UINT64 f16[2];
+ UINT64 f17[2];
+ UINT64 f18[2];
+ UINT64 f19[2];
+ UINT64 f20[2];
+ UINT64 f21[2];
+ UINT64 f22[2];
+ UINT64 f23[2];
+ UINT64 f24[2];
+ UINT64 f25[2];
+ UINT64 f26[2];
+ UINT64 f27[2];
+ UINT64 f28[2];
+ UINT64 f29[2];
+ UINT64 f30[2];
+ UINT64 f31[2];
+} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;
+
+///
+/// The processor save-state information for IA-32 and Itanium processors. If the optional floating
+/// point save is indicated for any handler, then this data structure must be preserved.
+///
+typedef union {
+ ///
+ /// The optional floating point save-state information for IA-32 processors.
+ ///
+ EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;
+ ///
+ /// The optional floating point save-state information for Itanium processors.
+ ///
+ EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;
+} EFI_SMM_FLOATING_POINT_SAVE_STATE;
+
+/**
+ This function is the main entry point for an SMM handler dispatch
+ or communicate-based callback.
+
+ @param SmmImageHandle A unique value returned by the SMM infrastructure
+ in response to registration for a communicate-based callback or dispatch.
+ @param CommunicationBuffer
+ An optional buffer that will be populated
+ by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)
+ invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.
+ @param SourceSize If CommunicationBuffer is non-NULL, this field
+ indicates the size of the data payload in this buffer.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(
+ IN EFI_HANDLE SmmImageHandle,
+ IN OUT VOID *CommunicationBuffer OPTIONAL,
+ IN OUT UINTN *SourceSize OPTIONAL
+ );
+
+/**
+ The SmmInstallConfigurationTable() function is used to maintain the list
+ of configuration tables that are stored in the System Management System
+ Table. The list is stored as an array of (GUID, Pointer) pairs. The list
+ must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.
+
+ @param SystemTable A pointer to the SMM System Table.
+ @param Guid A pointer to the GUID for the entry to add, update, or remove.
+ @param Table A pointer to the buffer of the table to add.
+ @param TableSize The size of the table to install.
+
+ @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.
+ @retval EFI_INVALID_PARAMETER Guid is not valid.
+ @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(
+ IN EFI_SMM_SYSTEM_TABLE *SystemTable,
+ IN EFI_GUID *Guid,
+ IN VOID *Table,
+ IN UINTN TableSize
+ );
+
+//
+// System Management System Table (SMST)
+//
+struct _EFI_SMM_SYSTEM_TABLE {
+ ///
+ /// The table header for the System Management System Table (SMST).
+ ///
+ EFI_TABLE_HEADER Hdr;
+
+ ///
+ /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is
+ /// permissible for this pointer to be NULL.
+ ///
+ CHAR16 *SmmFirmwareVendor;
+ ///
+ /// The particular revision of the firmware.
+ ///
+ UINT32 SmmFirmwareRevision;
+
+ ///
+ /// Adds, updates, or removes a configuration table entry from the SMST.
+ ///
+ EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;
+
+ //
+ // I/O Services
+ //
+ ///
+ /// A GUID that designates the particular CPU I/O services.
+ ///
+ EFI_GUID EfiSmmCpuIoGuid;
+ ///
+ /// Provides the basic memory and I/O interfaces that are used to abstract accesses to
+ /// devices.
+ ///
+ EFI_SMM_CPU_IO_INTERFACE SmmIo;
+
+ //
+ // Runtime memory service
+ //
+ ///
+ ///
+ /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the
+ /// Itanium processor family.
+ ///
+ EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;
+ ///
+ /// Returns pool memory to the system.
+ ///
+ EFI_SMMCORE_FREE_POOL SmmFreePool;
+ ///
+ /// Allocates memory pages from the system.
+ ///
+ EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;
+ ///
+ /// Frees memory pages for the system.
+ ///
+ EFI_SMMCORE_FREE_PAGES SmmFreePages;
+
+ //
+ // MP service
+ //
+
+ /// Inconsistent with specification here:
+ /// In Framework Spec, this definition does not exist. This method is introduced in PI1.1 specification for
+ /// the implementation needed.
+ EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;
+
+ //
+ // CPU information records
+ //
+ ///
+ /// A 1-relative number between 1 and the NumberOfCpus field. This field designates
+ /// which processor is executing the SMM infrastructure. This number also serves as an
+ /// index into the CpuSaveState and CpuOptionalFloatingPointState
+ /// fields.
+ ///
+ UINTN CurrentlyExecutingCpu;
+ ///
+ /// The number of EFI Configuration Tables in the buffer
+ /// SmmConfigurationTable.
+ ///
+ UINTN NumberOfCpus;
+ ///
+ /// A pointer to the EFI Configuration Tables. The number of entries in the table is
+ /// NumberOfTableEntries.
+ ///
+ EFI_SMM_CPU_SAVE_STATE *CpuSaveState;
+ ///
+ /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.
+ /// The size of this entire table is NumberOfCpus* size of the
+ /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if
+ /// there is at least one SMM driver that has registered for a callback with the
+ /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.
+ ///
+ EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;
+
+ //
+ // Extensibility table
+ //
+ ///
+ /// The number of EFI Configuration Tables in the buffer
+ /// SmmConfigurationTable.
+ ///
+ UINTN NumberOfTableEntries;
+ ///
+ /// A pointer to the EFI Configuration Tables. The number of entries in the table is
+ /// NumberOfTableEntries.
+ ///
+ EFI_CONFIGURATION_TABLE *SmmConfigurationTable;
+};
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Framework/StatusCode.h b/Core/IntelFrameworkPkg/Include/Framework/StatusCode.h new file mode 100644 index 0000000000..e237b15b90 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Framework/StatusCode.h @@ -0,0 +1,161 @@ +/** @file
+ Status Code Definitions, according to Intel Platform Innovation Framework
+ for EFI Status Codes Specification
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ Intel Platform Innovation Framework for EFI Status Codes Specification
+ Version 0.92.
+
+**/
+
+#ifndef _FRAMEWORK_STATUS_CODE_H_
+#define _FRAMEWORK_STATUS_CODE_H_
+
+//
+// Required for X64 defines for CPU exception types
+//
+#include <Protocol/DebugSupport.h>
+
+///
+/// Software Class DXE BS Driver Subclass Progress Code definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+///@}
+
+///
+/// Software Class DXE RT Driver Subclass Progress Code definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+///@}
+
+///
+/// Software Subclass definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
+
+///
+/// Software Class X64 Exception Subclass Error Code definitions.
+/// These exceptions are derived from the debug protocol definitions in the EFI
+/// specification.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
+#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
+#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
+#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
+#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
+#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
+#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
+#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
+#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
+#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
+#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
+#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
+#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
+#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
+#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
+#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
+#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
+///@}
+
+///
+/// Software Class EFI After Life Subclass Progress Code definitions.
+///
+///@{
+#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+///@}
+
+///
+/// Software Class DXE Core Subclass Error Code definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+///
+/// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
+///
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+///@}
+
+///
+/// IO Bus Class ATA/ATAPI Subclass Error Code definitions.
+///
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+///@}
+
+///
+/// The reason that the processor was disabled.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_CPU_CAUSE_NOT_DISABLED 0x0000
+///@}
+
+///
+/// Software Class PEI Module Subclass Progress Code definitions.
+///
+///@{
+#define EFI_SW_PEIM_PC_RECOVERY_BEGIN EFI_SW_PEI_PC_RECOVERY_BEGIN
+#define EFI_SW_PEIM_PC_CAPSULE_LOAD EFI_SW_PEI_PC_CAPSULE_LOAD
+#define EFI_SW_PEIM_PC_CAPSULE_START EFI_SW_PEI_PC_CAPSULE_START
+#define EFI_SW_PEIM_PC_RECOVERY_USER EFI_SW_PEI_PC_RECOVERY_USER
+#define EFI_SW_PEIM_PC_RECOVERY_AUTO EFI_SW_PEI_PC_RECOVERY_AUTO
+///@}
+
+///
+/// Software Class PEI Core Subclass Error Code definitions.
+///
+///@{
+#define EFI_SW_PEIM_CORE_EC_DXE_CORRUPT EFI_SW_PEI_CORE_EC_DXE_CORRUPT
+#define EFI_SW_PEIM_CORE_EC_DXEIPL_NOT_FOUND EFI_SW_PEI_CORE_EC_DXEIPL_NOT_FOUND
+///@}
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/FrameworkDxe.h b/Core/IntelFrameworkPkg/Include/FrameworkDxe.h new file mode 100644 index 0000000000..23ad62a41b --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/FrameworkDxe.h @@ -0,0 +1,32 @@ +/** @file
+ The root header file that provides Framework extension to UEFI/PI for modules. It can be included by
+ DXE, RUNTIME and SMM type modules that use Framework definitions.
+
+
+ This header file includes Framework extension definitions common to DXE
+ modules.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _FRAMEWORK_DXE_H_
+#define _FRAMEWORK_DXE_H_
+
+#include <PiDxe.h>
+
+#include <Framework/FrameworkInternalFormRepresentation.h>
+#include <Framework/FirmwareVolumeImageFormat.h>
+#include <Framework/FirmwareVolumeHeader.h>
+#include <Framework/Hob.h>
+#include <Framework/BootScript.h>
+#include <Framework/StatusCode.h>
+#include <Framework/DxeCis.h>
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/FrameworkPei.h b/Core/IntelFrameworkPkg/Include/FrameworkPei.h new file mode 100644 index 0000000000..e053feb7d5 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/FrameworkPei.h @@ -0,0 +1,30 @@ +/** @file
+ Header file that support Framework extension to UEFI/PI for PEI modules.
+
+ This header file must include Framework extension definitions common to PEI
+ modules.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _FRAMEWORK_PEI_H_
+#define _FRAMEWORK_PEI_H_
+
+#include <PiPei.h>
+
+#include <Framework/FirmwareVolumeImageFormat.h>
+#include <Framework/FirmwareVolumeHeader.h>
+#include <Framework/Hob.h>
+#include <Framework/StatusCode.h>
+#include <Framework/BootScript.h>
+#include <Framework/PeiCis.h>
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/FrameworkSmm.h b/Core/IntelFrameworkPkg/Include/FrameworkSmm.h new file mode 100644 index 0000000000..6a12f9f196 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/FrameworkSmm.h @@ -0,0 +1,24 @@ +/** @file
+ Header file that support Framework extensions to UEFI/PI for SMM modules.
+
+ This header file must include Framework extension definitions common to DXE
+ modules.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _FRAMEWORK_SMM_H_
+#define _FRAMEWORK_SMM_H_
+
+#include <FrameworkDxe.h>
+#include <Framework/SmmCis.h>
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Guid/BlockIo.h b/Core/IntelFrameworkPkg/Include/Guid/BlockIo.h new file mode 100644 index 0000000000..8f3fc7feaf --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Guid/BlockIo.h @@ -0,0 +1,51 @@ +/** @file
+ This file declares the hardware-device class GUIDs that may be used by the
+ PEIM that produces the Virtual Block I/O PPI.
+
+ These GUIDs are hardware-device class GUIDs that would be imported only by the
+ Virtual Block I/O PEIM. This virtual PEIM imports only the actual Block I/O
+ PPIs from the device-class ones listed here and published a single instance of
+ the Block I/O PPI for consumption by the File System PEIM. In the parlance of
+ the Framework DXE software stack, this Virtual Block I/O PEIM is actually
+ embodying the functionality of the partition driver. Thsi Virtual Block I/O
+ PEIM has to multiple the multiple possible instances of Block I/O and also know
+ how to parse at least El Torito for CD-ROM, and perhaps Master Boot Record(MBR)
+ and GUID Partition Table(GPT) in the future.
+
+Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ These GUIDs are defined in Framework Recovery Specification Version 0.9
+
+**/
+
+#ifndef _PEI_BLOCK_IO_GUID_H_
+#define _PEI_BLOCK_IO_GUID_H_
+
+///
+/// Global ID for an IDE class recovery device.
+///
+#define EFI_PEI_IDE_BLOCK_IO_PPI \
+ { \
+ 0x0964e5b22, 0x6459, 0x11d2, { 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+///
+/// Global ID for a Floppy class recovery device.
+///
+#define EFI_PEI_144_FLOPPY_BLOCK_IO_PPI \
+ { \
+ 0xda6855bd, 0x07b7, 0x4c05, { 0x9e, 0xd8, 0xe2, 0x59, 0xfd, 0x36, 0x0e, 0x22 } \
+ }
+
+extern EFI_GUID gEfiPeiIdeBlockIoPpiGuid;
+extern EFI_GUID gEfiPei144FloppyBlockIoPpiGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Guid/Capsule.h b/Core/IntelFrameworkPkg/Include/Guid/Capsule.h new file mode 100644 index 0000000000..b565b14171 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Guid/Capsule.h @@ -0,0 +1,147 @@ +/** @file
+ Framework Capule related Definition.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ Capsule Spec Version 0.9
+**/
+
+#ifndef _CAPSULE_GUID_H__
+#define _CAPSULE_GUID_H__
+
+//
+// This is the GUID of the capsule header of the image on disk.
+//
+#define EFI_CAPSULE_GUID \
+ { \
+ 0x3B6686BD, 0x0D76, 0x4030, {0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 } \
+ }
+
+//
+// This is the GUID of the configuration results file created by the capsule
+// application.
+//
+#define EFI_CONFIG_FILE_NAME_GUID \
+ { \
+ 0x98B8D59B, 0xE8BA, 0x48EE, {0x98, 0xDD, 0xC2, 0x95, 0x39, 0x2F, 0x1E, 0xDB } \
+ }
+
+///
+/// Bits in the flags field of the capsule header.
+/// This flag is set if the capsule can support setup changes, and cleared if it cannot.
+///
+#define EFI_CAPSULE_HEADER_FLAG_SETUP 0x00000001
+
+#define CAPSULE_BLOCK_DESCRIPTOR_SIGNATURE SIGNATURE_32 ('C', 'B', 'D', 'S')
+
+//
+// An array of these structs describe the blocks that make up a capsule for
+// a capsule update.
+//
+typedef struct {
+ UINT64 Length; ///< Length of the data block.
+ EFI_PHYSICAL_ADDRESS Data; ///< Physical address of the data block.
+ UINT32 Signature; ///< CBDS.
+ UINT32 CheckSum; ///< To sum this structure to 0.
+} FRAMEWORK_EFI_CAPSULE_BLOCK_DESCRIPTOR;
+
+typedef struct {
+ EFI_GUID OemGuid;
+ UINT32 HeaderSize;
+ //
+ // UINT8 OemHdrData[];
+ //
+} EFI_CAPSULE_OEM_HEADER;
+
+typedef struct {
+ ///
+ /// A defined GUID that indicates the start of a capsule.
+ ///
+ EFI_GUID CapsuleGuid;
+ ///
+ /// The size of the EFI_CAPSULE_HEADER structure.
+ ///
+ UINT32 HeaderSize;
+ ///
+ /// A bit-mapped list describing the capsule's attributes.
+ /// All undefined bits should be written as zero (0).
+ ///
+ UINT32 Flags;
+ ///
+ /// The length in bytes (27,415 for an image containing 27,415 bytes) of the entire image
+ /// including all headers. If this value is greater than the size of the data presented in
+ /// the capsule body, the image is separated across multiple media. If this
+ /// value is less than the size of the data, it is an error.
+ ///
+ UINT32 CapsuleImageSize;
+ ///
+ /// A zero-based number that enables a capsule to be split into pieces and then
+ /// recombined for easier transfer across media with limited size. The lower the
+ /// SequenceNumber, the earlier in the final image that the part of the capsule is to
+ /// appear. In capsules that are not split, this value shall be zero.
+ ///
+ UINT32 SequenceNumber;
+ ///
+ /// Used to group the various pieces of a split capsule to ensure that they comprise the
+ /// same base image. It is valid for this item to be zero, in which case the capsule cannot
+ /// be split into components.
+ ///
+ EFI_GUID InstanceId;
+ ///
+ /// The offset in bytes from the beginning of the header to the start of an EFI string that
+ /// contains a description of the identity of the subcapsules that make up the capsule. If
+ /// the capsule is not split, this value should be zero. The same string should be
+ /// presented for all subcapsules that constitute the same capsule.
+ ///
+ UINT32 OffsetToSplitInformation;
+ ///
+ /// The offset in bytes from the beginning of the header to the start of the part of the
+ /// capsule that is to be transferred to DXE.
+ ///
+ UINT32 OffsetToCapsuleBody;
+ ///
+ /// The offset in bytes from the beginning of the header to the start of the OEM-defined
+ /// header. This value must be less than OffsetToCapsuleBody.
+ ///
+ UINT32 OffsetToOemDefinedHeader;
+ ///
+ /// The offset in bytes from the beginning of the header to the start of human-readable
+ /// text that describes the entity that created the capsule. This value must be less than OffsetToCapsuleBody.
+ ///
+ UINT32 OffsetToAuthorInformation;
+ ///
+ /// The offset in bytes from the beginning of the header to the start of human-readable
+ /// text that describes the revision of the capsule and/or the capsule's contents. This
+ /// value must be less than OffsetToCapsuleBody.
+ ///
+ UINT32 OffsetToRevisionInformation;
+ ///
+ /// The offset in bytes from the beginning of the header to the start of a one-line (less
+ /// than 40 Unicode characters in any language) description of the capsule. It is intended
+ /// to be used by OS-present applications when providing a list of capsules from which
+ /// the user can choose. This value must be less than OffsetToCapsuleBody.
+ ///
+ UINT32 OffsetToShortDescription;
+ ///
+ /// The offset in bytes from the beginning of the header to the start of an EFI string
+ ///
+ UINT32 OffsetToLongDescription;
+ ///
+ /// This field is reserved for future use by this specification. For future compatibility,
+ /// this field must be set to zero
+ ///
+ UINT32 OffsetToApplicableDevices;
+} FRAMEWORK_EFI_CAPSULE_HEADER;
+
+extern EFI_GUID gEfiCapsuleGuid;
+extern EFI_GUID gEfiConfigFileNameGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Guid/DataHubRecords.h b/Core/IntelFrameworkPkg/Include/Guid/DataHubRecords.h new file mode 100644 index 0000000000..05b393b5e8 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Guid/DataHubRecords.h @@ -0,0 +1,2935 @@ +/** @file
+ DataHubRecord.h includes all data hub subclass GUID definitions.
+
+ This file includes all data hub sub class defitions from
+ Cache subclass specification 0.9, DataHub SubClass specification 0.9, Memory SubClass Spec 0.9,
+ Processor Subclass specification 0.9, and Misc SubClass specification 0.9.
+
+Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#ifndef _DATAHUB_RECORDS_GUID_H_
+#define _DATAHUB_RECORDS_GUID_H_
+
+//
+// The include is required to retrieve type EFI_EXP_BASE10_DATA
+//
+#include <Guid/StatusCodeDataTypeId.h>
+
+#define EFI_PROCESSOR_SUBCLASS_GUID \
+ { 0x26fdeb7e, 0xb8af, 0x4ccf, {0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 } }
+
+extern EFI_GUID gEfiProcessorSubClassGuid;
+
+
+#define EFI_CACHE_SUBCLASS_GUID \
+ { 0x7f0013a7, 0xdc79, 0x4b22, {0x80, 0x99, 0x11, 0xf7, 0x5f, 0xdc, 0x82, 0x9d } }
+
+extern EFI_GUID gEfiCacheSubClassGuid;
+
+///
+/// The memory subclass belongs to the data class and is identified as the memory
+/// subclass by the GUID.
+///
+#define EFI_MEMORY_SUBCLASS_GUID \
+ {0x4E8F4EBB, 0x64B9, 0x4e05, {0x9B, 0x18, 0x4C, 0xFE, 0x49, 0x23, 0x50, 0x97} }
+
+extern EFI_GUID gEfiMemorySubClassGuid;
+
+#define EFI_MISC_SUBCLASS_GUID \
+ { 0x772484B2, 0x7482, 0x4b91, {0x9F, 0x9A, 0xAD, 0x43, 0xF8, 0x1C, 0x58, 0x81 } }
+
+extern EFI_GUID gEfiMiscSubClassGuid;
+
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the value is 0x0100.
+/// Keep it unchanged from the perspective of binary consistency.
+///
+#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000
+
+#pragma pack(1)
+
+typedef struct _USB_PORT_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} USB_PORT_DEVICE_PATH;
+
+//
+// IDE
+//
+typedef struct _IDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} IDE_DEVICE_PATH;
+
+//
+// RMC Connector
+//
+typedef struct _RMC_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RMC_CONN_DEVICE_PATH;
+
+//
+// RIDE
+//
+typedef struct _RIDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RIDE_DEVICE_PATH;
+
+//
+// Gigabit NIC
+//
+typedef struct _GB_NIC_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} GB_NIC_DEVICE_PATH;
+
+//
+// P/S2 Connector
+//
+typedef struct _PS2_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PS2_CONN_DEVICE_PATH;
+
+//
+// Serial Port Connector
+//
+typedef struct _SERIAL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} SERIAL_CONN_DEVICE_PATH;
+
+//
+// Parallel Port Connector
+//
+typedef struct _PARALLEL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PARALLEL_CONN_DEVICE_PATH;
+
+//
+// Floopy Connector
+//
+typedef struct _FLOOPY_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} FLOOPY_CONN_DEVICE_PATH;
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+/// It's implementation-specific to simplify the code logic.
+///
+typedef union _EFI_MISC_PORT_DEVICE_PATH {
+ USB_PORT_DEVICE_PATH UsbDevicePath;
+ IDE_DEVICE_PATH IdeDevicePath;
+ RMC_CONN_DEVICE_PATH RmcConnDevicePath;
+ RIDE_DEVICE_PATH RideDevicePath;
+ GB_NIC_DEVICE_PATH GbNicDevicePath;
+ PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;
+ SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;
+ PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;
+ FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;
+} EFI_MISC_PORT_DEVICE_PATH;
+
+#pragma pack()
+
+///
+/// String Token Definition
+///
+/// Inconsistent with specification here:
+/// The macro isn't defined by any specification.
+/// Keep it unchanged for backward compatibility.
+///
+#define EFI_STRING_TOKEN UINT16
+
+///
+/// Each data record that is a member of some subclass starts with a standard
+/// header of type EFI_SUBCLASS_TYPE1_HEADER.
+/// This header is only a guideline and applicable only to a data
+/// subclass that is producing SMBIOS data records. A subclass can start with a
+/// different header if needed.
+///
+typedef struct {
+ ///
+ /// The version of the specification to which a specific subclass data record adheres.
+ ///
+ UINT32 Version;
+ ///
+ /// The size in bytes of this data class header.
+ ///
+ UINT32 HeaderSize;
+ ///
+ /// The instance number of the subclass with the same ProducerName. This number is
+ /// applicable in cases where multiple subclass instances that were produced by the same
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not
+ /// Applicable. All data consumer drivers should be able to handle all the possible values
+ /// of Instance, including Not Applicable and Reserved.
+ ///
+ UINT16 Instance;
+ ///
+ /// The instance number of the RecordType for the same Instance. This number is
+ /// applicable in cases where multiple instances of the RecordType exist for a specific
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable.
+ /// All data consumer drivers should be able to handle all the possible values of
+ /// SubInstance, including Not Applicable and Reserved.
+ ///
+ UINT16 SubInstance;
+ ///
+ /// The record number for the data record being specified. The numbering scheme and
+ /// definition is defined in the specific subclass specification.
+ ///
+ UINT32 RecordType;
+} EFI_SUBCLASS_TYPE1_HEADER;
+
+///
+/// This structure is used to link data records in the same subclasses. A data record is
+/// defined as a link to another data record in the same subclass using this structure.
+///
+typedef struct {
+ ///
+ /// An EFI_GUID that identifies the component that produced this data record. Type
+ /// EFI_GUID is defined in InstallProtocolInterface() in the EFI 1.10 Specification.
+ ///
+ EFI_GUID ProducerName;
+ ///
+ /// The instance number of the subclass with the same ProducerName. This number is
+ /// applicable in cases where multiple subclass instances that were produced by the same
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not
+ /// Applicable. All data consumer drivers should be able to handle all the possible values
+ /// of Instance, including Not Applicable and Reserved.
+ ///
+ UINT16 Instance;
+ /// The instance number of the RecordType for the same Instance. This number is
+ /// applicable in cases where multiple instances of the RecordType exist for a specific
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable.
+ /// All data consumer drivers should be able to handle all the possible values of
+ /// SubInstance, including Not Applicable and Reserved.
+ UINT16 SubInstance;
+} EFI_INTER_LINK_DATA;
+
+//
+// EXP data
+//
+///
+/// This macro provides a calculation for base-10 representations. Value and Exponent are each
+/// INT16. It is signed to cover negative values and is 16 bits wide (15 bits for data and 1 bit
+/// for the sign).
+///
+typedef struct {
+ ///
+ /// The INT16 number by which to multiply the base-10 representation.
+ ///
+ UINT16 Value;
+ ///
+ /// The INT16 number by which to raise the base-10 calculation.
+ ///
+ UINT16 Exponent;
+} EFI_EXP_BASE2_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;
+
+///
+/// This data record refers to the list of frequencies that the processor core supports. The list of
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example,
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data
+/// record is in Hertz. For asynchronous processors, the content of this data record is zero.
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means
+/// that the processor/driver supports automatic frequency selection.
+///
+/// Inconsistent with specification here:
+/// According to MiscSubclass 0.9 specification, it should be a pointer since it refers to a list of frequencies.
+///
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;
+
+///
+/// This data record refers to the list of supported frequencies of the processor external bus. The list of
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example,
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data
+/// record is in Hertz. For asynchronous processors, the content of this data record is NULL.
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means
+/// that the processor/driver supports automatic frequency selection.
+///
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;
+typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;
+typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA;
+typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA;
+typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA;
+typedef STRING_REF EFI_PROCESSOR_PART_NUMBER_DATA;
+
+typedef struct {
+ UINT32 ProcessorSteppingId:4;
+ UINT32 ProcessorModel: 4;
+ UINT32 ProcessorFamily: 4;
+ UINT32 ProcessorType: 2;
+ UINT32 ProcessorReserved1: 2;
+ UINT32 ProcessorXModel: 4;
+ UINT32 ProcessorXFamily: 8;
+ UINT32 ProcessorReserved2: 4;
+} EFI_PROCESSOR_SIGNATURE;
+
+
+///
+/// Inconsistent with specification here:
+/// The name of third field in ProcSubClass specification 0.9 is LogicalProcessorCount.
+/// Keep it unchanged for backward compatibility.
+///
+typedef struct {
+ UINT32 ProcessorBrandIndex :8;
+ UINT32 ProcessorClflush :8;
+ UINT32 ProcessorReserved :8;
+ UINT32 ProcessorDfltApicId :8;
+} EFI_PROCESSOR_MISC_INFO;
+
+typedef struct {
+ UINT32 ProcessorFpu: 1;
+ UINT32 ProcessorVme: 1;
+ UINT32 ProcessorDe: 1;
+ UINT32 ProcessorPse: 1;
+ UINT32 ProcessorTsc: 1;
+ UINT32 ProcessorMsr: 1;
+ UINT32 ProcessorPae: 1;
+ UINT32 ProcessorMce: 1;
+ UINT32 ProcessorCx8: 1;
+ UINT32 ProcessorApic: 1;
+ UINT32 ProcessorReserved1: 1;
+ UINT32 ProcessorSep: 1;
+ UINT32 ProcessorMtrr: 1;
+ UINT32 ProcessorPge: 1;
+ UINT32 ProcessorMca: 1;
+ UINT32 ProcessorCmov: 1;
+ UINT32 ProcessorPat: 1;
+ UINT32 ProcessorPse36: 1;
+ UINT32 ProcessorPsn: 1;
+ UINT32 ProcessorClfsh: 1;
+ UINT32 ProcessorReserved2: 1;
+ UINT32 ProcessorDs: 1;
+ UINT32 ProcessorAcpi: 1;
+ UINT32 ProcessorMmx: 1;
+ UINT32 ProcessorFxsr: 1;
+ UINT32 ProcessorSse: 1;
+ UINT32 ProcessorSse2: 1;
+ UINT32 ProcessorSs: 1;
+ UINT32 ProcessorReserved3: 1;
+ UINT32 ProcessorTm: 1;
+ UINT32 ProcessorReserved4: 2;
+} EFI_PROCESSOR_FEATURE_FLAGS;
+
+///
+/// This data record refers to the unique ID that identifies a set of processors. This data record is 16
+/// bytes in length. The data in this structure is processor specific and reserved values can be defined
+/// for future use. The consumer of this data should not make any assumption and should use this data
+/// with respect to the processor family defined in the Family record number.
+///
+typedef struct {
+ ///
+ /// Identifies the processor.
+ ///
+ EFI_PROCESSOR_SIGNATURE Signature;
+ ///
+ /// Provides additional processor information.
+ ///
+ EFI_PROCESSOR_MISC_INFO MiscInfo;
+ ///
+ /// Reserved for future use.
+ ///
+ UINT32 Reserved;
+ ///
+ /// Provides additional processor information.
+ ///
+ EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;
+} EFI_PROCESSOR_ID_DATA;
+
+///
+/// This data record refers to the general classification of the processor. This data record is 4 bytes in
+/// length.
+///
+typedef enum {
+ EfiProcessorOther = 1,
+ EfiProcessorUnknown = 2,
+ EfiCentralProcessor = 3,
+ EfiMathProcessor = 4,
+ EfiDspProcessor = 5,
+ EfiVideoProcessor = 6
+} EFI_PROCESSOR_TYPE_DATA;
+
+///
+/// This data record refers to the family of the processor as defined by the DMTF.
+/// This data record is 4 bytes in length.
+///
+typedef enum {
+ EfiProcessorFamilyOther = 0x01,
+ EfiProcessorFamilyUnknown = 0x02,
+ EfiProcessorFamily8086 = 0x03,
+ EfiProcessorFamily80286 = 0x04,
+ EfiProcessorFamilyIntel386 = 0x05,
+ EfiProcessorFamilyIntel486 = 0x06,
+ EfiProcessorFamily8087 = 0x07,
+ EfiProcessorFamily80287 = 0x08,
+ EfiProcessorFamily80387 = 0x09,
+ EfiProcessorFamily80487 = 0x0A,
+ EfiProcessorFamilyPentium = 0x0B,
+ EfiProcessorFamilyPentiumPro = 0x0C,
+ EfiProcessorFamilyPentiumII = 0x0D,
+ EfiProcessorFamilyPentiumMMX = 0x0E,
+ EfiProcessorFamilyCeleron = 0x0F,
+ EfiProcessorFamilyPentiumIIXeon = 0x10,
+ EfiProcessorFamilyPentiumIII = 0x11,
+ EfiProcessorFamilyM1 = 0x12,
+ EfiProcessorFamilyM2 = 0x13,
+ EfiProcessorFamilyM1Reserved2 = 0x14,
+ EfiProcessorFamilyM1Reserved3 = 0x15,
+ EfiProcessorFamilyM1Reserved4 = 0x16,
+ EfiProcessorFamilyM1Reserved5 = 0x17,
+ EfiProcessorFamilyAmdDuron = 0x18,
+ EfiProcessorFamilyK5 = 0x19,
+ EfiProcessorFamilyK6 = 0x1A,
+ EfiProcessorFamilyK6_2 = 0x1B,
+ EfiProcessorFamilyK6_3 = 0x1C,
+ EfiProcessorFamilyAmdAthlon = 0x1D,
+ EfiProcessorFamilyAmd29000 = 0x1E,
+ EfiProcessorFamilyK6_2Plus = 0x1F,
+ EfiProcessorFamilyPowerPC = 0x20,
+ EfiProcessorFamilyPowerPC601 = 0x21,
+ EfiProcessorFamilyPowerPC603 = 0x22,
+ EfiProcessorFamilyPowerPC603Plus = 0x23,
+ EfiProcessorFamilyPowerPC604 = 0x24,
+ EfiProcessorFamilyPowerPC620 = 0x25,
+ EfiProcessorFamilyPowerPCx704 = 0x26,
+ EfiProcessorFamilyPowerPC750 = 0x27,
+ EfiProcessorFamilyAlpha3 = 0x30,
+ EfiProcessorFamilyAlpha21064 = 0x31,
+ EfiProcessorFamilyAlpha21066 = 0x32,
+ EfiProcessorFamilyAlpha21164 = 0x33,
+ EfiProcessorFamilyAlpha21164PC = 0x34,
+ EfiProcessorFamilyAlpha21164a = 0x35,
+ EfiProcessorFamilyAlpha21264 = 0x36,
+ EfiProcessorFamilyAlpha21364 = 0x37,
+ EfiProcessorFamilyMips = 0x40,
+ EfiProcessorFamilyMIPSR4000 = 0x41,
+ EfiProcessorFamilyMIPSR4200 = 0x42,
+ EfiProcessorFamilyMIPSR4400 = 0x43,
+ EfiProcessorFamilyMIPSR4600 = 0x44,
+ EfiProcessorFamilyMIPSR10000 = 0x45,
+ EfiProcessorFamilySparc = 0x50,
+ EfiProcessorFamilySuperSparc = 0x51,
+ EfiProcessorFamilymicroSparcII = 0x52,
+ EfiProcessorFamilymicroSparcIIep = 0x53,
+ EfiProcessorFamilyUltraSparc = 0x54,
+ EfiProcessorFamilyUltraSparcII = 0x55,
+ EfiProcessorFamilyUltraSparcIIi = 0x56,
+ EfiProcessorFamilyUltraSparcIII = 0x57,
+ ///
+ /// Inconsistent with specification here:
+ /// This field in ProcSubClass specification 0.9 is defined as EfiProcessorFamilyUltraSparcIIi.
+ /// Change it to EfiProcessorFamilyUltraSparcIIIi to avoid build break.
+ ///
+ EfiProcessorFamilyUltraSparcIIIi = 0x58,
+ EfiProcessorFamily68040 = 0x60,
+ EfiProcessorFamily68xxx = 0x61,
+ EfiProcessorFamily68000 = 0x62,
+ EfiProcessorFamily68010 = 0x63,
+ EfiProcessorFamily68020 = 0x64,
+ EfiProcessorFamily68030 = 0x65,
+ EfiProcessorFamilyHobbit = 0x70,
+ EfiProcessorFamilyCrusoeTM5000 = 0x78,
+ EfiProcessorFamilyCrusoeTM3000 = 0x79,
+ EfiProcessorFamilyEfficeonTM8000 = 0x7A,
+ EfiProcessorFamilyWeitek = 0x80,
+ EfiProcessorFamilyItanium = 0x82,
+ EfiProcessorFamilyAmdAthlon64 = 0x83,
+ EfiProcessorFamilyAmdOpteron = 0x84,
+ EfiProcessorFamilyAmdSempron = 0x85,
+ EfiProcessorFamilyAmdTurion64Mobile = 0x86,
+ EfiProcessorFamilyDualCoreAmdOpteron = 0x87,
+ EfiProcessorFamilyAmdAthlon64X2DualCore = 0x88,
+ EfiProcessorFamilyAmdTurion64X2Mobile = 0x89,
+ EfiProcessorFamilyPARISC = 0x90,
+ EfiProcessorFamilyPaRisc8500 = 0x91,
+ EfiProcessorFamilyPaRisc8000 = 0x92,
+ EfiProcessorFamilyPaRisc7300LC = 0x93,
+ EfiProcessorFamilyPaRisc7200 = 0x94,
+ EfiProcessorFamilyPaRisc7100LC = 0x95,
+ EfiProcessorFamilyPaRisc7100 = 0x96,
+ EfiProcessorFamilyV30 = 0xA0,
+ EfiProcessorFamilyPentiumIIIXeon = 0xB0,
+ EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,
+ EfiProcessorFamilyPentium4 = 0xB2,
+ EfiProcessorFamilyIntelXeon = 0xB3,
+ EfiProcessorFamilyAS400 = 0xB4,
+ EfiProcessorFamilyIntelXeonMP = 0xB5,
+ EfiProcessorFamilyAMDAthlonXP = 0xB6,
+ EfiProcessorFamilyAMDAthlonMP = 0xB7,
+ EfiProcessorFamilyIntelItanium2 = 0xB8,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelPentiumM = 0xB9,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelCeleronD = 0xBA,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelPentiumD = 0xBB,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelPentiumEx = 0xBC,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelCoreSolo = 0xBD,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyReserved = 0xBE,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelCore2 = 0xBF,
+ EfiProcessorFamilyIBM390 = 0xC8,
+ EfiProcessorFamilyG4 = 0xC9,
+ EfiProcessorFamilyG5 = 0xCA,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyG6 = 0xCB,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyzArchitectur = 0xCC,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaC7M = 0xD2,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaC7D = 0xD3,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaC7 = 0xD4,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaEden = 0xD5,
+ EfiProcessorFamilyi860 = 0xFA,
+ EfiProcessorFamilyi960 = 0xFB,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIndicatorFamily2 = 0xFE,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyReserved1 = 0xFF
+} EFI_PROCESSOR_FAMILY_DATA;
+
+typedef enum {
+ EfiProcessorFamilySh3 = 0x104,
+ EfiProcessorFamilySh4 = 0x105,
+ EfiProcessorFamilyArm = 0x118,
+ EfiProcessorFamilyStrongArm = 0x119,
+ EfiProcessorFamily6x86 = 0x12C,
+ EfiProcessorFamilyMediaGx = 0x12D,
+ EfiProcessorFamilyMii = 0x12E,
+ EfiProcessorFamilyWinChip = 0x140,
+ EfiProcessorFamilyDsp = 0x15E,
+ EfiProcessorFamilyVideo = 0x1F4
+} EFI_PROCESSOR_FAMILY2_DATA;
+
+///
+/// This data record refers to the core voltage of the processor being defined. The unit of measurement
+/// of this data record is in volts.
+///
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;
+
+///
+/// This data record refers to the base address of the APIC of the processor being defined. This data
+/// record is a physical address location.
+///
+typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;
+
+///
+/// This data record refers to the ID of the APIC of the processor being defined. This data record is a
+/// 4-byte entry.
+///
+typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;
+
+///
+/// This data record refers to the version number of the APIC of the processor being defined. This data
+/// record is a 4-byte entry.
+///
+typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;
+
+typedef enum {
+ EfiProcessorIa32Microcode = 1,
+ EfiProcessorIpfPalAMicrocode = 2,
+ EfiProcessorIpfPalBMicrocode = 3
+} EFI_PROCESSOR_MICROCODE_TYPE;
+
+///
+/// This data record refers to the revision of the processor microcode that is loaded in the processor.
+/// This data record is a 4-byte entry.
+///
+typedef struct {
+ ///
+ /// Identifies what type of microcode the data is.
+ ///
+ EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;
+ ///
+ /// Indicates the revision number of this microcode.
+ ///
+ UINT32 ProcessorMicrocodeRevisionNumber;
+} EFI_PROCESSOR_MICROCODE_REVISION_DATA;
+
+///
+/// This data record refers to the status of the processor.
+///
+typedef struct {
+ UINT32 CpuStatus :3; ///< Indicates the status of the processor.
+ UINT32 Reserved1 :3; ///< Reserved for future use. Should be set to zero.
+ UINT32 SocketPopulated :1; ///< Indicates if the processor is socketed or not.
+ UINT32 Reserved2 :1; ///< Reserved for future use. Should be set to zero.
+ UINT32 ApicEnable :1; ///< Indicates if the APIC is enabled or not.
+ UINT32 BootApplicationProcessor :1; ///< Indicates if this processor is the boot processor.
+ UINT32 Reserved3 :22;///< Reserved for future use. Should be set to zero.
+} EFI_PROCESSOR_STATUS_DATA;
+
+typedef enum {
+ EfiCpuStatusUnknown = 0,
+ EfiCpuStatusEnabled = 1,
+ EfiCpuStatusDisabledByUser = 2,
+ EfiCpuStatusDisabledbyBios = 3,
+ EfiCpuStatusIdle = 4,
+ EfiCpuStatusOther = 7
+} EFI_CPU_STATUS;
+
+typedef enum {
+ EfiProcessorSocketOther = 1,
+ EfiProcessorSocketUnknown = 2,
+ EfiProcessorSocketDaughterBoard = 3,
+ EfiProcessorSocketZIF = 4,
+ EfiProcessorSocketReplacePiggyBack = 5,
+ EfiProcessorSocketNone = 6,
+ EfiProcessorSocketLIF = 7,
+ EfiProcessorSocketSlot1 = 8,
+ EfiProcessorSocketSlot2 = 9,
+ EfiProcessorSocket370Pin = 0xA,
+ EfiProcessorSocketSlotA = 0xB,
+ EfiProcessorSocketSlotM = 0xC,
+ EfiProcessorSocket423 = 0xD,
+ EfiProcessorSocketA462 = 0xE,
+ EfiProcessorSocket478 = 0xF,
+ EfiProcessorSocket754 = 0x10,
+ EfiProcessorSocket940 = 0x11,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocket939 = 0x12,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocketmPGA604 = 0x13,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocketLGA771 = 0x14,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocketLGA775 = 0x15
+
+} EFI_PROCESSOR_SOCKET_TYPE_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_CACHE_ASSOCIATION_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;
+
+///
+/// This data record refers to the health status of the processor.
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_HEALTH_STATUS_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef enum {
+ EfiProcessorHealthy = 1,
+ EfiProcessorPerfRestricted = 2,
+ EfiProcessorFuncRestricted = 3
+} EFI_PROCESSOR_HEALTH_STATUS;
+
+///
+/// This data record refers to the package number of this processor. Multiple logical processors can
+/// exist in a system and each logical processor can be correlated to the physical processor using this
+/// record type.
+///
+typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;
+
+typedef UINT8 EFI_PROCESSOR_CORE_COUNT_DATA;
+typedef UINT8 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA;
+typedef UINT8 EFI_PROCESSOR_THREAD_COUNT_DATA;
+
+typedef struct {
+ UINT16 Reserved :1;
+ UINT16 Unknown :1;
+ UINT16 Capable64Bit :1;
+ UINT16 Reserved2 :13;
+} EFI_PROCESSOR_CHARACTERISTICS_DATA;
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the enumeration type data structure is NOT defined.
+/// The equivalent in specification is
+/// #define EFI_PROCESSOR_FREQUENCY_RECORD_NUMBER 0x00000001
+/// #define EFI_PROCESSOR_BUS_FREQUENCY_RECORD_NUMBER 0x00000002
+/// #define EFI_PROCESSOR_VERSION_RECORD_NUMBER 0x00000003
+/// #define EFI_PROCESSOR_MANUFACTURER_RECORD_NUMBER 0x00000004
+/// #define EFI_PROCESSOR_SERIAL_NUMBER_RECORD_NUMBER 0x00000005
+/// #define EFI_PROCESSOR_ID_RECORD_NUMBER 0x00000006
+/// #define EFI_PROCESSOR_TYPE_RECORD_NUMBER 0x00000007
+/// #define EFI_PROCESSOR_FAMILY_RECORD_NUMBER 0x00000008
+/// #define EFI_PROCESSOR_VOLTAGE_RECORD_NUMBER 0x00000009
+/// #define EFI_PROCESSOR_APIC_BASE_ADDRESS_RECORD_NUMBER 0x0000000A
+/// #define EFI_PROCESSOR_APIC_ID_RECORD_NUMBER 0x0000000B
+/// #define EFI_PROCESSOR_APIC_VER_NUMBER_RECORD_NUMBER 0x0000000C
+/// #define EFI_PROCESSOR_MICROCODE_REVISION_RECORD_NUMBER 0x0000000D
+/// #define EFI_PROCESSOR_STATUS_RECORD_NUMBER 0x0000000E
+/// #define EFI_PROCESSOR_SOCKET_TYPE_RECORD_NUMBER 0x0000000F
+/// #define EFI_PROCESSOR_SOCKET_NAME_RECORD_NUMBER 0x00000010
+/// #define EFI_PROCESSOR_CACHE_ASSOCIATION_RECORD_NUMBER 0x00000011
+/// #define EFI_PROCESSOR_MAX_FREQUENCY_RECORD_NUMBER 0x00000012
+/// #define EFI_PROCESSOR_ASSET_TAG_RECORD_NUMBER 0x00000013
+/// #define EFI_PROCESSOR_MAX_FSB_FREQUENCY_RECORD_NUMBER 0x00000014
+/// #define EFI_PROCESSOR_PACKAGE_NUMBER_RECORD_NUMBER 0x00000015
+/// #define EFI_PROCESSOR_FREQUENCY_LIST_RECORD_NUMBER 0x00000016
+/// #define EFI_PROCESSOR_FSB_FREQUENCY_LIST_RECORD_NUMBER 0x00000017
+/// #define EFI_PROCESSOR_HEALTH_STATUS_RECORD_NUMBER 0x00000018
+///
+/// Keep the definition unchanged for backward compatibility.
+typedef enum {
+ ProcessorCoreFrequencyRecordType = 1,
+ ProcessorFsbFrequencyRecordType = 2,
+ ProcessorVersionRecordType = 3,
+ ProcessorManufacturerRecordType = 4,
+ ProcessorSerialNumberRecordType = 5,
+ ProcessorIdRecordType = 6,
+ ProcessorTypeRecordType = 7,
+ ProcessorFamilyRecordType = 8,
+ ProcessorVoltageRecordType = 9,
+ ProcessorApicBaseAddressRecordType = 10,
+ ProcessorApicIdRecordType = 11,
+ ProcessorApicVersionNumberRecordType = 12,
+ CpuUcodeRevisionDataRecordType = 13,
+ ProcessorStatusRecordType = 14,
+ ProcessorSocketTypeRecordType = 15,
+ ProcessorSocketNameRecordType = 16,
+ CacheAssociationRecordType = 17,
+ ProcessorMaxCoreFrequencyRecordType = 18,
+ ProcessorAssetTagRecordType = 19,
+ ProcessorMaxFsbFrequencyRecordType = 20,
+ ProcessorPackageNumberRecordType = 21,
+ ProcessorCoreFrequencyListRecordType = 22,
+ ProcessorFsbFrequencyListRecordType = 23,
+ ProcessorHealthStatusRecordType = 24,
+ ProcessorCoreCountRecordType = 25,
+ ProcessorEnabledCoreCountRecordType = 26,
+ ProcessorThreadCountRecordType = 27,
+ ProcessorCharacteristicsRecordType = 28,
+ ProcessorFamily2RecordType = 29,
+ ProcessorPartNumberRecordType = 30,
+} EFI_CPU_VARIABLE_RECORD_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the union type data structure is NOT defined.
+/// It's implementation-specific to simplify the code logic.
+///
+typedef union {
+ EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;
+ EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList;
+ EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber;
+ EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency;
+ EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency;
+ EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency;
+ EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency;
+ EFI_PROCESSOR_VERSION_DATA ProcessorVersion;
+ EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer;
+ EFI_PROCESSOR_ID_DATA ProcessorId;
+ EFI_PROCESSOR_TYPE_DATA ProcessorType;
+ EFI_PROCESSOR_FAMILY_DATA ProcessorFamily;
+ EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage;
+ EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase;
+ EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId;
+ EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber;
+ EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData;
+ EFI_PROCESSOR_STATUS_DATA ProcessorStatus;
+ EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType;
+ EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName;
+ EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag;
+ EFI_PROCESSOR_PART_NUMBER_DATA ProcessorPartNumber;
+ EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus;
+ EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;
+ EFI_PROCESSOR_CORE_COUNT_DATA ProcessorCoreCount;
+ EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA ProcessorEnabledCoreCount;
+ EFI_PROCESSOR_THREAD_COUNT_DATA ProcessorThreadCount;
+ EFI_PROCESSOR_CHARACTERISTICS_DATA ProcessorCharacteristics;
+ EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2;
+} EFI_CPU_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CPU_VARIABLE_RECORD VariableRecord;
+} EFI_CPU_DATA_RECORD;
+
+#define EFI_CACHE_SUBCLASS_VERSION 0x00010000
+
+typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA;
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass specification 0.9, the naming is EFI_CACHE_MAXIMUM_SIZE_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA;
+typedef STRING_REF EFI_CACHE_SOCKET_DATA;
+
+typedef struct {
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 NonBurst :1;
+ UINT32 Burst :1;
+ UINT32 PipelineBurst :1;
+ ///
+ /// Inconsistent between CacheSubclass 0.9 and SMBIOS specifications here:
+ /// In CacheSubclass specification 0.9, the sequence of Asynchronous and Synchronous fileds
+ /// are opposite to SMBIOS specification.
+ ///
+ UINT32 Asynchronous :1;
+ UINT32 Synchronous :1;
+ UINT32 Reserved :25;
+} EFI_CACHE_SRAM_TYPE_DATA;
+
+typedef EFI_CACHE_SRAM_TYPE_DATA EFI_CACHE_SRAM_INSTALL_DATA;
+
+typedef enum {
+ EfiCacheErrorOther = 1,
+ EfiCacheErrorUnknown = 2,
+ EfiCacheErrorNone = 3,
+ EfiCacheErrorParity = 4,
+ EfiCacheErrorSingleBit = 5,
+ EfiCacheErrorMultiBit = 6
+} EFI_CACHE_ERROR_TYPE_DATA;
+
+typedef enum {
+ EfiCacheTypeOther = 1,
+ EfiCacheTypeUnknown = 2,
+ EfiCacheTypeInstruction = 3,
+ EfiCacheTypeData = 4,
+ EfiCacheTypeUnified = 5
+} EFI_CACHE_TYPE_DATA;
+
+typedef enum {
+ EfiCacheAssociativityOther = 1,
+ EfiCacheAssociativityUnknown = 2,
+ EfiCacheAssociativityDirectMapped = 3,
+ EfiCacheAssociativity2Way = 4,
+ EfiCacheAssociativity4Way = 5,
+ EfiCacheAssociativityFully = 6,
+ EfiCacheAssociativity8Way = 7,
+ EfiCacheAssociativity16Way = 8
+} EFI_CACHE_ASSOCIATIVITY_DATA;
+
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass 0.9 specification. It defines the field type as UINT16.
+/// In fact, it should be UINT32 type because it refers to a 32bit width data.
+///
+typedef struct {
+ UINT32 Level :3;
+ UINT32 Socketed :1;
+ UINT32 Reserved2 :1;
+ UINT32 Location :2;
+ UINT32 Enable :1;
+ UINT32 OperationalMode :2;
+ UINT32 Reserved1 :22;
+} EFI_CACHE_CONFIGURATION_DATA;
+
+#define EFI_CACHE_L1 1
+#define EFI_CACHE_L2 2
+#define EFI_CACHE_L3 3
+#define EFI_CACHE_L4 4
+#define EFI_CACHE_LMAX EFI_CACHE_L4
+
+#define EFI_CACHE_SOCKETED 1
+#define EFI_CACHE_NOT_SOCKETED 0
+
+typedef enum {
+ EfiCacheInternal = 0,
+ EfiCacheExternal = 1,
+ EfiCacheReserved = 2,
+ EfiCacheUnknown = 3
+} EFI_CACHE_LOCATION;
+
+#define EFI_CACHE_ENABLED 1
+#define EFI_CACHE_DISABLED 0
+
+typedef enum {
+ EfiCacheWriteThrough = 0,
+ EfiCacheWriteBack = 1,
+ EfiCacheDynamicMode = 2,
+ EfiCacheUnknownMode = 3
+} EFI_CACHE_OPERATIONAL_MODE;
+
+
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass specification 0.9, the enumeration type data structure is NOT defined.
+/// The equivalent in specification is
+/// #define EFI_CACHE_SIZE_RECORD_NUMBER 0x00000001
+/// #define EFI_CACHE_MAXIMUM_SIZE_RECORD_NUMBER 0x00000002
+/// #define EFI_CACHE_SPEED_RECORD_NUMBER 0x00000003
+/// #define EFI_CACHE_SOCKET_RECORD_NUMBER 0x00000004
+/// #define EFI_CACHE_SRAM_SUPPORT_RECORD_NUMBER 0x00000005
+/// #define EFI_CACHE_SRAM_INSTALL_RECORD_NUMBER 0x00000006
+/// #define EFI_CACHE_ERROR_SUPPORT_RECORD_NUMBER 0x00000007
+/// #define EFI_CACHE_TYPE_RECORD_NUMBER 0x00000008
+/// #define EFI_CACHE_ASSOCIATIVITY_RECORD_NUMBER 0x00000009
+/// #define EFI_CACHE_CONFIGURATION_RECORD_NUMBER 0x0000000A
+/// Keep the definition unchanged for backward compatibility.
+///
+typedef enum {
+ CacheSizeRecordType = 1,
+ MaximumSizeCacheRecordType = 2,
+ CacheSpeedRecordType = 3,
+ CacheSocketRecordType = 4,
+ CacheSramTypeRecordType = 5,
+ CacheInstalledSramTypeRecordType = 6,
+ CacheErrorTypeRecordType = 7,
+ CacheTypeRecordType = 8,
+ CacheAssociativityRecordType = 9,
+ CacheConfigRecordType = 10
+} EFI_CACHE_VARIABLE_RECORD_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass specification 0.9, the union type data structure is NOT defined.
+/// It's implementation-specific to simplify the code logic.
+///
+typedef union {
+ EFI_CACHE_SIZE_DATA CacheSize;
+ EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize;
+ EFI_CACHE_SPEED_DATA CacheSpeed;
+ EFI_CACHE_SOCKET_DATA CacheSocket;
+ EFI_CACHE_SRAM_TYPE_DATA CacheSramType;
+ EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType;
+ EFI_CACHE_ERROR_TYPE_DATA CacheErrorType;
+ EFI_CACHE_TYPE_DATA CacheType;
+ EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity;
+ EFI_CACHE_CONFIGURATION_DATA CacheConfig;
+ EFI_CACHE_ASSOCIATION_DATA CacheAssociation;
+} EFI_CACHE_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CACHE_VARIABLE_RECORD VariableRecord;
+} EFI_CACHE_DATA_RECORD;
+
+#define EFI_MEMORY_SUBCLASS_VERSION 0x0100
+#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001
+
+typedef enum _EFI_MEMORY_REGION_TYPE {
+ EfiMemoryRegionMemory = 0x01,
+ EfiMemoryRegionReserved = 0x02,
+ EfiMemoryRegionAcpi = 0x03,
+ EfiMemoryRegionNvs = 0x04
+} EFI_MEMORY_REGION_TYPE;
+
+///
+/// This data record refers to the size of a memory region. The regions that are
+/// described can refer to physical memory, memory-mapped I/O, or reserved BIOS memory regions.
+/// The unit of measurement of this data record is in bytes.
+///
+typedef struct {
+ ///
+ /// A zero-based value that indicates which processor(s) can access the memory region.
+ /// A value of 0xFFFF indicates the region is accessible by all processors.
+ ///
+ UINT32 ProcessorNumber;
+ ///
+ /// A zero-based value that indicates the starting bus that can access the memory region.
+ ///
+ UINT16 StartBusNumber;
+ ///
+ /// A zero-based value that indicates the ending bus that can access the memory region.
+ /// A value of 0xFF for a PCI system indicates the region is accessible by all buses and
+ /// is global in scope. An example of the EndBusNumber not being 0xFF is a system
+ /// with two or more peer-to-host PCI bridges.
+ ///
+ UINT16 EndBusNumber;
+ ///
+ /// The type of memory region from the operating system's point of view.
+ /// MemoryRegionType values are equivalent to the legacy INT 15 AX = E820 BIOS
+ /// command values.
+ ///
+ EFI_MEMORY_REGION_TYPE MemoryRegionType;
+ ///
+ /// The size of the memory region in bytes.
+ ///
+ EFI_EXP_BASE2_DATA MemorySize;
+ ///
+ /// The starting physical address of the memory region.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryStartAddress;
+} EFI_MEMORY_SIZE_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002
+
+typedef enum _EFI_MEMORY_ARRAY_LOCATION {
+ EfiMemoryArrayLocationOther = 0x01,
+ EfiMemoryArrayLocationUnknown = 0x02,
+ EfiMemoryArrayLocationSystemBoard = 0x03,
+ EfiMemoryArrayLocationIsaAddonCard = 0x04,
+ EfiMemoryArrayLocationEisaAddonCard = 0x05,
+ EfiMemoryArrayLocationPciAddonCard = 0x06,
+ EfiMemoryArrayLocationMcaAddonCard = 0x07,
+ EfiMemoryArrayLocationPcmciaAddonCard = 0x08,
+ EfiMemoryArrayLocationProprietaryAddonCard = 0x09,
+ EfiMemoryArrayLocationNuBus = 0x0A,
+ EfiMemoryArrayLocationPc98C20AddonCard = 0xA0,
+ EfiMemoryArrayLocationPc98C24AddonCard = 0xA1,
+ EfiMemoryArrayLocationPc98EAddonCard = 0xA2,
+ EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3
+} EFI_MEMORY_ARRAY_LOCATION;
+
+typedef enum _EFI_MEMORY_ARRAY_USE {
+ EfiMemoryArrayUseOther = 0x01,
+ EfiMemoryArrayUseUnknown = 0x02,
+ EfiMemoryArrayUseSystemMemory = 0x03,
+ EfiMemoryArrayUseVideoMemory = 0x04,
+ EfiMemoryArrayUseFlashMemory = 0x05,
+ EfiMemoryArrayUseNonVolatileRam = 0x06,
+ EfiMemoryArrayUseCacheMemory = 0x07
+} EFI_MEMORY_ARRAY_USE;
+
+typedef enum _EFI_MEMORY_ERROR_CORRECTION {
+ EfiMemoryErrorCorrectionOther = 0x01,
+ EfiMemoryErrorCorrectionUnknown = 0x02,
+ EfiMemoryErrorCorrectionNone = 0x03,
+ EfiMemoryErrorCorrectionParity = 0x04,
+ EfiMemoryErrorCorrectionSingleBitEcc = 0x05,
+ EfiMemoryErrorCorrectionMultiBitEcc = 0x06,
+ EfiMemoryErrorCorrectionCrc = 0x07
+} EFI_MEMORY_ERROR_CORRECTION;
+
+///
+/// This data record refers to the physical memory array. This data record is a structure.
+/// The type definition structure for EFI_MEMORY_ARRAY_LOCATION_DATA is in SMBIOS 2.3.4:
+/// - Table 3.3.17.1, Type 16, Offset 0x4
+/// - Table 3.3.17.2, Type 16, Offset 0x5
+/// - Table 3.3.17.3, Type 16, with the following offsets:
+/// -- Offset 0x6
+/// -- Offset 0x7
+/// -- Offset 0xB
+/// -- Offset 0xD
+///
+typedef struct {
+ ///
+ /// The physical location of the memory array.
+ ///
+ EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;
+ ///
+ /// The memory array usage.
+ ///
+ EFI_MEMORY_ARRAY_USE MemoryArrayUse;
+ ///
+ /// The primary error correction or detection supported by this memory array.
+ ///
+ EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;
+ ///
+ /// The maximum memory capacity size in kilobytes. If capacity is unknown, then
+ /// values of MaximumMemoryCapacity.Value = 0x00 and
+ /// MaximumMemoryCapacity.Exponent = 0x8000 are used.
+ ///
+ EFI_EXP_BASE2_DATA MaximumMemoryCapacity;
+ ///
+ /// The number of memory slots or sockets that are available for memory devices
+ /// in this array.
+ ///
+ UINT16 NumberMemoryDevices;
+} EFI_MEMORY_ARRAY_LOCATION_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003
+
+typedef enum _EFI_MEMORY_FORM_FACTOR {
+ EfiMemoryFormFactorOther = 0x01,
+ EfiMemoryFormFactorUnknown = 0x02,
+ EfiMemoryFormFactorSimm = 0x03,
+ EfiMemoryFormFactorSip = 0x04,
+ EfiMemoryFormFactorChip = 0x05,
+ EfiMemoryFormFactorDip = 0x06,
+ EfiMemoryFormFactorZip = 0x07,
+ EfiMemoryFormFactorProprietaryCard = 0x08,
+ EfiMemoryFormFactorDimm = 0x09,
+ EfiMemoryFormFactorTsop = 0x0A,
+ EfiMemoryFormFactorRowOfChips = 0x0B,
+ EfiMemoryFormFactorRimm = 0x0C,
+ EfiMemoryFormFactorSodimm = 0x0D,
+ EfiMemoryFormFactorSrimm = 0x0E,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryFormFactorFbDimm = 0x0F
+} EFI_MEMORY_FORM_FACTOR;
+
+typedef enum _EFI_MEMORY_ARRAY_TYPE {
+ EfiMemoryTypeOther = 0x01,
+ EfiMemoryTypeUnknown = 0x02,
+ EfiMemoryTypeDram = 0x03,
+ EfiMemoryTypeEdram = 0x04,
+ EfiMemoryTypeVram = 0x05,
+ EfiMemoryTypeSram = 0x06,
+ EfiMemoryTypeRam = 0x07,
+ EfiMemoryTypeRom = 0x08,
+ EfiMemoryTypeFlash = 0x09,
+ EfiMemoryTypeEeprom = 0x0A,
+ EfiMemoryTypeFeprom = 0x0B,
+ EfiMemoryTypeEprom = 0x0C,
+ EfiMemoryTypeCdram = 0x0D,
+ EfiMemoryType3Dram = 0x0E,
+ EfiMemoryTypeSdram = 0x0F,
+ EfiMemoryTypeSgram = 0x10,
+ EfiMemoryTypeRdram = 0x11,
+ EfiMemoryTypeDdr = 0x12,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryTypeDdr2 = 0x13,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryTypeDdr2FbDimm = 0x14
+} EFI_MEMORY_ARRAY_TYPE;
+
+typedef struct {
+ UINT32 Reserved :1;
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 FastPaged :1;
+ UINT32 StaticColumn :1;
+ UINT32 PseudoStatic :1;
+ UINT32 Rambus :1;
+ UINT32 Synchronous :1;
+ UINT32 Cmos :1;
+ UINT32 Edo :1;
+ UINT32 WindowDram :1;
+ UINT32 CacheDram :1;
+ UINT32 Nonvolatile :1;
+ UINT32 Reserved1 :19;
+} EFI_MEMORY_TYPE_DETAIL;
+
+typedef enum {
+ EfiMemoryStateEnabled = 0,
+ EfiMemoryStateUnknown = 1,
+ EfiMemoryStateUnsupported = 2,
+ EfiMemoryStateError = 3,
+ EfiMemoryStateAbsent = 4,
+ EfiMemoryStateDisabled = 5,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryStatePartial = 6
+} EFI_MEMORY_STATE;
+
+///
+/// This data record describes a memory device. This data record is a structure.
+/// The type definition structure for EFI_MEMORY_ARRAY_LINK_DATA is in SMBIOS 2.3.4.
+///
+typedef struct {
+ ///
+ /// A string that identifies the physically labeled socket or board position where the
+ /// memory device is located.
+ ///
+ STRING_REF MemoryDeviceLocator;
+ ///
+ /// A string denoting the physically labeled bank where the memory device is located.
+ ///
+ STRING_REF MemoryBankLocator;
+ ///
+ /// A string denoting the memory manufacturer.
+ ///
+ STRING_REF MemoryManufacturer;
+ ///
+ /// A string denoting the serial number of the memory device.
+ ///
+ STRING_REF MemorySerialNumber;
+ ///
+ /// The asset tag of the memory device.
+ ///
+ STRING_REF MemoryAssetTag;
+ ///
+ /// A string denoting the part number of the memory device.
+ ///
+ STRING_REF MemoryPartNumber;
+ ///
+ /// A link to a memory array structure set.
+ ///
+ EFI_INTER_LINK_DATA MemoryArrayLink;
+ ///
+ /// A link to a memory array structure set.
+ ///
+ EFI_INTER_LINK_DATA MemorySubArrayLink;
+ ///
+ /// The total width in bits of this memory device. If there are no error correcting bits,
+ /// then the total width equals the data width. If the width is unknown, then set the field
+ /// to 0xFFFF.
+ ///
+ UINT16 MemoryTotalWidth;
+ ///
+ /// The data width in bits of the memory device. A data width of 0x00 and a total width
+ /// of 0x08 indicate that the device is used solely for error correction.
+ ///
+ UINT16 MemoryDataWidth;
+ ///
+ /// The size in bytes of the memory device. A value of 0x00 denotes that no device is
+ /// installed, while a value of all Fs denotes that the size is not known.
+ ///
+ EFI_EXP_BASE2_DATA MemoryDeviceSize;
+ ///
+ /// The form factor of the memory device.
+ ///
+ EFI_MEMORY_FORM_FACTOR MemoryFormFactor;
+ ///
+ /// A memory device set that must be populated with all devices of the same type and
+ /// size. A value of 0x00 indicates that the device is not part of any set. A value of 0xFF
+ /// indicates that the attribute is unknown. Any other value denotes the set number.
+ ///
+ UINT8 MemoryDeviceSet;
+ ///
+ /// The memory type in the socket.
+ ///
+ EFI_MEMORY_ARRAY_TYPE MemoryType;
+ ///
+ /// The memory type details.
+ ///
+ EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;
+ ///
+ /// The memory speed in megahertz (MHz). A value of 0x00 denotes that
+ /// the speed is unknown.
+ /// Inconsistent with specification here:
+ /// In MemSubclass specification 0.9, the naming is MemoryTypeSpeed.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ EFI_EXP_BASE10_DATA MemorySpeed;
+ ///
+ /// The memory state.
+ ///
+ EFI_MEMORY_STATE MemoryState;
+} EFI_MEMORY_ARRAY_LINK_DATA;
+
+
+#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004
+
+///
+/// This data record refers to a specified physical memory array associated with
+/// a given memory range.
+///
+typedef struct {
+ ///
+ /// The starting physical address in bytes of memory mapped to a specified physical
+ /// memory array.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;
+ ///
+ /// The last physical address in bytes of memory mapped to a specified physical memory
+ /// array.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;
+ ///
+ /// See Physical Memory Array (Type 16) for physical memory array structures.
+ ///
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ ///
+ /// The number of memory devices that form a single row of memory for the address
+ /// partition.
+ ///
+ UINT16 MemoryArrayPartitionWidth;
+} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;
+
+
+#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005
+
+///
+/// This data record refers to a physical memory device that is associated with
+/// a given memory range.
+///
+typedef struct {
+ ///
+ /// The starting physical address that is associated with the device.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;
+ ///
+ /// The ending physical address that is associated with the device.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;
+ ///
+ /// A link to the memory device data structure.
+ ///
+ EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;
+ ///
+ /// A link to the memory array data structure.
+ ///
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ ///
+ /// The position of the memory device in a row. A value of 0x00 is reserved and a value
+ /// of 0xFF indicates that the position is unknown.
+ ///
+ UINT8 MemoryDevicePartitionRowPosition;
+ ///
+ /// The position of the device in an interleave.
+ ///
+ UINT8 MemoryDeviceInterleavePosition;
+ ///
+ /// The maximum number of consecutive rows from the device that are accessed in a
+ /// single interleave transfer. A value of 0x00 indicates that the device is not interleaved
+ /// and a value of 0xFF indicates that the interleave configuration is unknown.
+ ///
+ UINT8 MemoryDeviceInterleaveDataDepth;
+} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;
+
+
+//
+// Memory. Channel Device Type - SMBIOS Type 37
+//
+
+#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006
+
+typedef enum _EFI_MEMORY_CHANNEL_TYPE {
+ EfiMemoryChannelTypeOther = 1,
+ EfiMemoryChannelTypeUnknown = 2,
+ EfiMemoryChannelTypeRambus = 3,
+ EfiMemoryChannelTypeSyncLink = 4
+} EFI_MEMORY_CHANNEL_TYPE;
+
+///
+/// This data record refers the type of memory that is associated with the channel. This data record is a
+/// structure.
+/// The type definition structure for EFI_MEMORY_CHANNEL_TYPE_DATA is in SMBIOS 2.3.4,
+/// Table 3.3.38, Type 37, with the following offsets:
+/// - Offset 0x4
+/// - Offset 0x5
+/// - Offset 0x6
+///
+typedef struct {
+ ///
+ /// The type of memory that is associated with the channel.
+ ///
+ EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;
+ ///
+ /// The maximum load that is supported by the channel.
+ ///
+ UINT8 MemoryChannelMaximumLoad;
+ ///
+ /// The number of memory devices on this channel.
+ ///
+ UINT8 MemoryChannelDeviceCount;
+} EFI_MEMORY_CHANNEL_TYPE_DATA;
+
+#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007
+
+///
+/// This data record refers to the memory device that is associated with the memory channel. This data
+/// record is a structure.
+/// The type definition structure for EFI_MEMORY_CHANNEL_DEVICE_DATA is in SMBIOS 2.3.4,
+/// Table 3.3.38, Type 37, with the following offsets:
+/// - Offset 0x7
+/// - Offset 0x8
+///
+typedef struct {
+ ///
+ /// A number between one and MemoryChannelDeviceCount plus an arbitrary base.
+ ///
+ UINT8 DeviceId;
+ ///
+ /// The Link of the associated memory device. See Memory Device (Type 17) for
+ /// memory devices.
+ ///
+ EFI_INTER_LINK_DATA DeviceLink;
+ ///
+ /// The number of load units that this device consumes.
+ ///
+ UINT8 MemoryChannelDeviceLoad;
+} EFI_MEMORY_CHANNEL_DEVICE_DATA;
+
+//
+// Memory. Controller Information - SMBIOS Type 5
+//
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+#define EFI_MEMORY_CONTROLLER_INFORMATION_RECORD_NUMBER 0x00000008
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef enum {
+ EfiErrorDetectingMethodOther = 1,
+ EfiErrorDetectingMethodUnknown = 2,
+ EfiErrorDetectingMethodNone = 3,
+ EfiErrorDetectingMethodParity = 4,
+ EfiErrorDetectingMethod32Ecc = 5,
+ EfiErrorDetectingMethod64Ecc = 6,
+ EfiErrorDetectingMethod128Ecc = 7,
+ EfiErrorDetectingMethodCrc = 8
+} EFI_MEMORY_ERROR_DETECT_METHOD_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT8 Other :1;
+ UINT8 Unknown :1;
+ UINT8 None :1;
+ UINT8 SingleBitErrorCorrect :1;
+ UINT8 DoubleBitErrorCorrect :1;
+ UINT8 ErrorScrubbing :1;
+ UINT8 Reserved :2;
+} EFI_MEMORY_ERROR_CORRECT_CAPABILITY;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef enum {
+ EfiMemoryInterleaveOther = 1,
+ EfiMemoryInterleaveUnknown = 2,
+ EfiMemoryInterleaveOneWay = 3,
+ EfiMemoryInterleaveTwoWay = 4,
+ EfiMemoryInterleaveFourWay = 5,
+ EfiMemoryInterleaveEightWay = 6,
+ EfiMemoryInterleaveSixteenWay = 7
+} EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT16 Other :1;
+ UINT16 Unknown :1;
+ UINT16 SeventyNs:1;
+ UINT16 SixtyNs :1;
+ UINT16 FiftyNs :1;
+ UINT16 Reserved :11;
+} EFI_MEMORY_SPEED_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT16 Other :1;
+ UINT16 Unknown :1;
+ UINT16 Standard :1;
+ UINT16 FastPageMode:1;
+ UINT16 EDO :1;
+ UINT16 Parity :1;
+ UINT16 ECC :1;
+ UINT16 SIMM :1;
+ UINT16 DIMM :1;
+ UINT16 BurstEdo :1;
+ UINT16 SDRAM :1;
+ UINT16 Reserved :5;
+} EFI_MEMORY_SUPPORTED_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT8 Five :1;
+ UINT8 Three :1;
+ UINT8 Two :1;
+ UINT8 Reserved:5;
+} EFI_MEMORY_MODULE_VOLTAGE_TYPE;
+
+///
+/// EFI_MEMORY_CONTROLLER_INFORMATION is obsolete
+/// Use EFI_MEMORY_CONTROLLER_INFORMATION_DATA instead
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;
+ UINT8 MaxMemoryModuleSize;
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;
+ UINT8 NumberofMemorySlot;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;
+ UINT16 *MemoryModuleConfigHandles;
+} EFI_MEMORY_CONTROLLER_INFORMATION;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;
+ UINT8 MaxMemoryModuleSize;
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;
+ UINT8 NumberofMemorySlot;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;
+ EFI_INTER_LINK_DATA MemoryModuleConfig[1];
+} EFI_MEMORY_CONTROLLER_INFORMATION_DATA;
+
+///
+/// Memory. Error Information - SMBIOS Type 18
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+#define EFI_MEMORY_32BIT_ERROR_INFORMATION_RECORD_NUMBER 0x00000009
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef enum {
+ EfiMemoryErrorOther = 1,
+ EfiMemoryErrorUnknown = 2,
+ EfiMemoryErrorOk = 3,
+ EfiMemoryErrorBadRead = 4,
+ EfiMemoryErrorParity = 5,
+ EfiMemoryErrorSigleBit = 6,
+ EfiMemoryErrorDoubleBit = 7,
+ EfiMemoryErrorMultiBit = 8,
+ EfiMemoryErrorNibble = 9,
+ EfiMemoryErrorChecksum = 10,
+ EfiMemoryErrorCrc = 11,
+ EfiMemoryErrorCorrectSingleBit = 12,
+ EfiMemoryErrorCorrected = 13,
+ EfiMemoryErrorUnCorrectable = 14
+} EFI_MEMORY_ERROR_TYPE;
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef enum {
+ EfiMemoryGranularityOther = 1,
+ EfiMemoryGranularityOtherUnknown = 2,
+ EfiMemoryGranularityDeviceLevel = 3,
+ EfiMemoryGranularityMemPartitionLevel = 4
+} EFI_MEMORY_ERROR_GRANULARITY_TYPE;
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef enum {
+ EfiMemoryErrorOperationOther = 1,
+ EfiMemoryErrorOperationUnknown = 2,
+ EfiMemoryErrorOperationRead = 3,
+ EfiMemoryErrorOperationWrite = 4,
+ EfiMemoryErrorOperationPartialWrite = 5
+} EFI_MEMORY_ERROR_OPERATION_TYPE;
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;
+ UINT32 VendorSyndrome;
+ UINT32 MemoryArrayErrorAddress;
+ UINT32 DeviceErrorAddress;
+ UINT32 DeviceErrorResolution;
+} EFI_MEMORY_32BIT_ERROR_INFORMATION;
+
+///
+/// Memory. Error Information - SMBIOS Type 33.
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 33.
+///
+#define EFI_MEMORY_64BIT_ERROR_INFORMATION_RECORD_NUMBER 0x0000000A
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 33.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;
+ UINT32 VendorSyndrome;
+ UINT64 MemoryArrayErrorAddress;
+ UINT64 DeviceErrorAddress;
+ UINT32 DeviceErrorResolution;
+} EFI_MEMORY_64BIT_ERROR_INFORMATION;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It is implementation-specific to simplify the code logic.
+///
+typedef union _EFI_MEMORY_SUBCLASS_RECORDS {
+ EFI_MEMORY_SIZE_DATA SizeData;
+ EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData;
+ EFI_MEMORY_ARRAY_LINK_DATA ArrayLink;
+ EFI_MEMORY_ARRAY_START_ADDRESS_DATA ArrayStartAddress;
+ EFI_MEMORY_DEVICE_START_ADDRESS_DATA DeviceStartAddress;
+ EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData;
+ EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData;
+ EFI_MEMORY_CONTROLLER_INFORMATION MemoryControllerInfo;
+ EFI_MEMORY_32BIT_ERROR_INFORMATION Memory32bitErrorInfo;
+ EFI_MEMORY_64BIT_ERROR_INFORMATION Memory64bitErrorInfo;
+} EFI_MEMORY_SUBCLASS_RECORDS;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MEMORY_SUBCLASS_RECORDS Record;
+} EFI_MEMORY_SUBCLASS_DRIVER_DATA;
+
+#define EFI_MISC_SUBCLASS_VERSION 0x0100
+
+#pragma pack(1)
+
+//
+// Last PCI Bus Number
+//
+#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001
+
+typedef struct {
+ UINT8 LastPciBus;
+} EFI_MISC_LAST_PCI_BUS_DATA;
+
+//
+// Misc. BIOS Vendor - SMBIOS Type 0
+//
+#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002
+
+typedef struct {
+ UINT64 Reserved1 :2;
+ UINT64 Unknown :1;
+ UINT64 BiosCharacteristicsNotSupported :1;
+ UINT64 IsaIsSupported :1;
+ UINT64 McaIsSupported :1;
+ UINT64 EisaIsSupported :1;
+ UINT64 PciIsSupported :1;
+ UINT64 PcmciaIsSupported :1;
+ UINT64 PlugAndPlayIsSupported :1;
+ UINT64 ApmIsSupported :1;
+ UINT64 BiosIsUpgradable :1;
+ UINT64 BiosShadowingAllowed :1;
+ UINT64 VlVesaIsSupported :1;
+ UINT64 EscdSupportIsAvailable :1;
+ UINT64 BootFromCdIsSupported :1;
+ UINT64 SelectableBootIsSupported :1;
+ UINT64 RomBiosIsSocketed :1;
+ UINT64 BootFromPcmciaIsSupported :1;
+ UINT64 EDDSpecificationIsSupported :1;
+ UINT64 JapaneseNecFloppyIsSupported :1;
+ UINT64 JapaneseToshibaFloppyIsSupported :1;
+ UINT64 Floppy525_360IsSupported :1;
+ UINT64 Floppy525_12IsSupported :1;
+ UINT64 Floppy35_720IsSupported :1;
+ UINT64 Floppy35_288IsSupported :1;
+ UINT64 PrintScreenIsSupported :1;
+ UINT64 Keyboard8042IsSupported :1;
+ UINT64 SerialIsSupported :1;
+ UINT64 PrinterIsSupported :1;
+ UINT64 CgaMonoIsSupported :1;
+ UINT64 NecPc98 :1;
+ UINT64 AcpiIsSupported :1;
+ UINT64 UsbLegacyIsSupported :1;
+ UINT64 AgpIsSupported :1;
+ UINT64 I20BootIsSupported :1;
+ UINT64 Ls120BootIsSupported :1;
+ UINT64 AtapiZipDriveBootIsSupported :1;
+ UINT64 Boot1394IsSupported :1;
+ UINT64 SmartBatteryIsSupported :1;
+ UINT64 BiosBootSpecIsSupported :1;
+ UINT64 FunctionKeyNetworkBootIsSupported :1;
+ UINT64 Reserved :22;
+} EFI_MISC_BIOS_CHARACTERISTICS;
+
+typedef struct {
+ UINT64 BiosReserved :16;
+ UINT64 SystemReserved:16;
+ UINT64 Reserved :32;
+} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION;
+
+typedef struct {
+ STRING_REF BiosVendor;
+ STRING_REF BiosVersion;
+ STRING_REF BiosReleaseDate;
+ EFI_PHYSICAL_ADDRESS BiosStartingAddress;
+ EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize;
+ EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1;
+ EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION
+ BiosCharacteristics2;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosMajorRelease;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosMinorRelease;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosEmbeddedFirmwareMajorRelease;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosEmbeddedFirmwareMinorRelease;
+} EFI_MISC_BIOS_VENDOR_DATA;
+
+//
+// Misc. System Manufacturer - SMBIOS Type 1
+//
+#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003
+
+typedef enum {
+ EfiSystemWakeupTypeReserved = 0,
+ EfiSystemWakeupTypeOther = 1,
+ EfiSystemWakeupTypeUnknown = 2,
+ EfiSystemWakeupTypeApmTimer = 3,
+ EfiSystemWakeupTypeModemRing = 4,
+ EfiSystemWakeupTypeLanRemote = 5,
+ EfiSystemWakeupTypePowerSwitch = 6,
+ EfiSystemWakeupTypePciPme = 7,
+ EfiSystemWakeupTypeAcPowerRestored = 8
+} EFI_MISC_SYSTEM_WAKEUP_TYPE;
+
+typedef struct {
+ STRING_REF SystemManufacturer;
+ STRING_REF SystemProductName;
+ STRING_REF SystemVersion;
+ STRING_REF SystemSerialNumber;
+ EFI_GUID SystemUuid;
+ EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 1.
+ ///
+ STRING_REF SystemSKUNumber;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 1.
+ ///
+ STRING_REF SystemFamily;
+} EFI_MISC_SYSTEM_MANUFACTURER_DATA;
+
+//
+// Misc. Base Board Manufacturer - SMBIOS Type 2
+//
+#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ UINT32 Motherboard :1;
+ UINT32 RequiresDaughterCard :1;
+ UINT32 Removable :1;
+ UINT32 Replaceable :1;
+ UINT32 HotSwappable :1;
+ UINT32 Reserved :27;
+} EFI_BASE_BOARD_FEATURE_FLAGS;
+
+typedef enum {
+ EfiBaseBoardTypeUnknown = 1,
+ EfiBaseBoardTypeOther = 2,
+ EfiBaseBoardTypeServerBlade = 3,
+ EfiBaseBoardTypeConnectivitySwitch = 4,
+ EfiBaseBoardTypeSystemManagementModule = 5,
+ EfiBaseBoardTypeProcessorModule = 6,
+ EfiBaseBoardTypeIOModule = 7,
+ EfiBaseBoardTypeMemoryModule = 8,
+ EfiBaseBoardTypeDaughterBoard = 9,
+ EfiBaseBoardTypeMotherBoard = 0xA,
+ EfiBaseBoardTypeProcessorMemoryModule = 0xB,
+ EfiBaseBoardTypeProcessorIOModule = 0xC,
+ EfiBaseBoardTypeInterconnectBoard = 0xD
+} EFI_BASE_BOARD_TYPE;
+
+typedef struct {
+ STRING_REF BaseBoardManufacturer;
+ STRING_REF BaseBoardProductName;
+ STRING_REF BaseBoardVersion;
+ STRING_REF BaseBoardSerialNumber;
+ STRING_REF BaseBoardAssetTag;
+ STRING_REF BaseBoardChassisLocation;
+ EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags;
+ EFI_BASE_BOARD_TYPE BaseBoardType;
+ EFI_INTER_LINK_DATA BaseBoardChassisLink;
+ UINT32 BaseBoardNumberLinks;
+ EFI_INTER_LINK_DATA LinkN;
+} EFI_MISC_BASE_BOARD_MANUFACTURER_DATA;
+
+//
+// Misc. System/Chassis Enclosure - SMBIOS Type 3
+//
+#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005
+
+typedef enum {
+ EfiMiscChassisTypeOther = 0x1,
+ EfiMiscChassisTypeUnknown = 0x2,
+ EfiMiscChassisTypeDeskTop = 0x3,
+ EfiMiscChassisTypeLowProfileDesktop = 0x4,
+ EfiMiscChassisTypePizzaBox = 0x5,
+ EfiMiscChassisTypeMiniTower = 0x6,
+ EfiMiscChassisTypeTower = 0x7,
+ EfiMiscChassisTypePortable = 0x8,
+ EfiMiscChassisTypeLapTop = 0x9,
+ EfiMiscChassisTypeNotebook = 0xA,
+ EfiMiscChassisTypeHandHeld = 0xB,
+ EfiMiscChassisTypeDockingStation = 0xC,
+ EfiMiscChassisTypeAllInOne = 0xD,
+ EfiMiscChassisTypeSubNotebook = 0xE,
+ EfiMiscChassisTypeSpaceSaving = 0xF,
+ EfiMiscChassisTypeLunchBox = 0x10,
+ EfiMiscChassisTypeMainServerChassis = 0x11,
+ EfiMiscChassisTypeExpansionChassis = 0x12,
+ EfiMiscChassisTypeSubChassis = 0x13,
+ EfiMiscChassisTypeBusExpansionChassis = 0x14,
+ EfiMiscChassisTypePeripheralChassis = 0x15,
+ EfiMiscChassisTypeRaidChassis = 0x16,
+ EfiMiscChassisTypeRackMountChassis = 0x17,
+ EfiMiscChassisTypeSealedCasePc = 0x18,
+ EfiMiscChassisMultiSystemChassis = 0x19
+} EFI_MISC_CHASSIS_TYPE;
+
+typedef struct {
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass 0.9 specification, it has the incorrect field name "EFI_MISC_CHASSIS_TYPE".
+ /// Change it to "ChassisType" to pass build.
+ ///
+ UINT32 ChassisType :16;
+ UINT32 ChassisLockPresent:1;
+ UINT32 Reserved :15;
+} EFI_MISC_CHASSIS_STATUS;
+
+typedef enum {
+ EfiChassisStateOther = 0x01,
+ EfiChassisStateUnknown = 0x02,
+ EfiChassisStateSafe = 0x03,
+ EfiChassisStateWarning = 0x04,
+ EfiChassisStateCritical = 0x05,
+ EfiChassisStateNonRecoverable = 0x06
+} EFI_MISC_CHASSIS_STATE;
+
+typedef enum {
+ EfiChassisSecurityStatusOther = 0x01,
+ EfiChassisSecurityStatusUnknown = 0x02,
+ EfiChassisSecurityStatusNone = 0x03,
+ EfiChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
+ EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
+} EFI_MISC_CHASSIS_SECURITY_STATE;
+
+typedef struct {
+ UINT32 RecordType :1;
+ UINT32 Type :7;
+ UINT32 Reserved :24;
+} EFI_MISC_ELEMENT_TYPE;
+
+typedef struct {
+ EFI_MISC_ELEMENT_TYPE ChassisElementType;
+ EFI_INTER_LINK_DATA ChassisElementStructure;
+ EFI_BASE_BOARD_TYPE ChassisBaseBoard;
+ UINT32 ChassisElementMinimum;
+ UINT32 ChassisElementMaximum;
+} EFI_MISC_ELEMENTS;
+
+typedef struct {
+ STRING_REF ChassisManufacturer;
+ STRING_REF ChassisVersion;
+ STRING_REF ChassisSerialNumber;
+ STRING_REF ChassisAssetTag;
+ EFI_MISC_CHASSIS_STATUS ChassisType;
+ EFI_MISC_CHASSIS_STATE ChassisBootupState;
+ EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState;
+ EFI_MISC_CHASSIS_STATE ChassisThermalState;
+ EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState;
+ UINT32 ChassisOemDefined;
+ UINT32 ChassisHeight;
+ UINT32 ChassisNumberPowerCords;
+ UINT32 ChassisElementCount;
+ UINT32 ChassisElementRecordLength;
+ EFI_MISC_ELEMENTS ChassisElements;
+} EFI_MISC_CHASSIS_MANUFACTURER_DATA;
+
+//
+// Misc. Port Connector Information - SMBIOS Type 8
+//
+#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006
+
+typedef enum {
+ EfiPortConnectorTypeNone = 0x00,
+ EfiPortConnectorTypeCentronics = 0x01,
+ EfiPortConnectorTypeMiniCentronics = 0x02,
+ EfiPortConnectorTypeProprietary = 0x03,
+ EfiPortConnectorTypeDB25Male = 0x04,
+ EfiPortConnectorTypeDB25Female = 0x05,
+ EfiPortConnectorTypeDB15Male = 0x06,
+ EfiPortConnectorTypeDB15Female = 0x07,
+ EfiPortConnectorTypeDB9Male = 0x08,
+ EfiPortConnectorTypeDB9Female = 0x09,
+ EfiPortConnectorTypeRJ11 = 0x0A,
+ EfiPortConnectorTypeRJ45 = 0x0B,
+ EfiPortConnectorType50PinMiniScsi = 0x0C,
+ EfiPortConnectorTypeMiniDin = 0x0D,
+ EfiPortConnectorTypeMicriDin = 0x0E,
+ EfiPortConnectorTypePS2 = 0x0F,
+ EfiPortConnectorTypeInfrared = 0x10,
+ EfiPortConnectorTypeHpHil = 0x11,
+ EfiPortConnectorTypeUsb = 0x12,
+ EfiPortConnectorTypeSsaScsi = 0x13,
+ EfiPortConnectorTypeCircularDin8Male = 0x14,
+ EfiPortConnectorTypeCircularDin8Female = 0x15,
+ EfiPortConnectorTypeOnboardIde = 0x16,
+ EfiPortConnectorTypeOnboardFloppy = 0x17,
+ EfiPortConnectorType9PinDualInline = 0x18,
+ EfiPortConnectorType25PinDualInline = 0x19,
+ EfiPortConnectorType50PinDualInline = 0x1A,
+ EfiPortConnectorType68PinDualInline = 0x1B,
+ EfiPortConnectorTypeOnboardSoundInput = 0x1C,
+ EfiPortConnectorTypeMiniCentronicsType14 = 0x1D,
+ EfiPortConnectorTypeMiniCentronicsType26 = 0x1E,
+ EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F,
+ EfiPortConnectorTypeBNC = 0x20,
+ EfiPortConnectorType1394 = 0x21,
+ EfiPortConnectorTypePC98 = 0xA0,
+ EfiPortConnectorTypePC98Hireso = 0xA1,
+ EfiPortConnectorTypePCH98 = 0xA2,
+ EfiPortConnectorTypePC98Note = 0xA3,
+ EfiPortConnectorTypePC98Full = 0xA4,
+ EfiPortConnectorTypeOther = 0xFF
+} EFI_MISC_PORT_CONNECTOR_TYPE;
+
+typedef enum {
+ EfiPortTypeNone = 0x00,
+ EfiPortTypeParallelXtAtCompatible = 0x01,
+ EfiPortTypeParallelPortPs2 = 0x02,
+ EfiPortTypeParallelPortEcp = 0x03,
+ EfiPortTypeParallelPortEpp = 0x04,
+ EfiPortTypeParallelPortEcpEpp = 0x05,
+ EfiPortTypeSerialXtAtCompatible = 0x06,
+ EfiPortTypeSerial16450Compatible = 0x07,
+ EfiPortTypeSerial16550Compatible = 0x08,
+ EfiPortTypeSerial16550ACompatible = 0x09,
+ EfiPortTypeScsi = 0x0A,
+ EfiPortTypeMidi = 0x0B,
+ EfiPortTypeJoyStick = 0x0C,
+ EfiPortTypeKeyboard = 0x0D,
+ EfiPortTypeMouse = 0x0E,
+ EfiPortTypeSsaScsi = 0x0F,
+ EfiPortTypeUsb = 0x10,
+ EfiPortTypeFireWire = 0x11,
+ EfiPortTypePcmciaTypeI = 0x12,
+ EfiPortTypePcmciaTypeII = 0x13,
+ EfiPortTypePcmciaTypeIII = 0x14,
+ EfiPortTypeCardBus = 0x15,
+ EfiPortTypeAccessBusPort = 0x16,
+ EfiPortTypeScsiII = 0x17,
+ EfiPortTypeScsiWide = 0x18,
+ EfiPortTypePC98 = 0x19,
+ EfiPortTypePC98Hireso = 0x1A,
+ EfiPortTypePCH98 = 0x1B,
+ EfiPortTypeVideoPort = 0x1C,
+ EfiPortTypeAudioPort = 0x1D,
+ EfiPortTypeModemPort = 0x1E,
+ EfiPortTypeNetworkPort = 0x1F,
+ EfiPortType8251Compatible = 0xA0,
+ EfiPortType8251FifoCompatible = 0xA1,
+ EfiPortTypeOther = 0xFF
+} EFI_MISC_PORT_TYPE;
+
+typedef struct {
+ STRING_REF PortInternalConnectorDesignator;
+ STRING_REF PortExternalConnectorDesignator;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType;
+ EFI_MISC_PORT_TYPE PortType;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this type of field is defined as EFI_DEVICE_PATH_PROTOCOL,
+ /// which causes the implementation some complexity. Keep it unchanged for backward
+ /// compatibility.
+ ///
+ EFI_MISC_PORT_DEVICE_PATH PortPath;
+} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;
+
+//
+// Misc. System Slots - SMBIOS Type 9
+//
+#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007
+
+typedef enum {
+ EfiSlotTypeOther = 0x01,
+ EfiSlotTypeUnknown = 0x02,
+ EfiSlotTypeIsa = 0x03,
+ EfiSlotTypeMca = 0x04,
+ EfiSlotTypeEisa = 0x05,
+ EfiSlotTypePci = 0x06,
+ EfiSlotTypePcmcia = 0x07,
+ EfiSlotTypeVlVesa = 0x08,
+ EfiSlotTypeProprietary = 0x09,
+ EfiSlotTypeProcessorCardSlot = 0x0A,
+ EfiSlotTypeProprietaryMemoryCardSlot = 0x0B,
+ EfiSlotTypeIORiserCardSlot = 0x0C,
+ EfiSlotTypeNuBus = 0x0D,
+ EfiSlotTypePci66MhzCapable = 0x0E,
+ EfiSlotTypeAgp = 0x0F,
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, its naming should be EfiSlotTypeAgp2X
+ /// rather than EfiSlotTypeApg2X.
+ ///
+ EfiSlotTypeAgp2X = 0x10,
+ EfiSlotTypeAgp4X = 0x11,
+ EfiSlotTypePciX = 0x12,
+ EfiSlotTypeAgp8x = 0x13,
+ EfiSlotTypePC98C20 = 0xA0,
+ EfiSlotTypePC98C24 = 0xA1,
+ EfiSlotTypePC98E = 0xA2,
+ EfiSlotTypePC98LocalBus = 0xA3,
+ EfiSlotTypePC98Card = 0xA4,
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, these fields aren't defined.
+ /// They're introduced for SmBios 2.6 specification type 9.
+ ///
+ EfiSlotTypePciExpress = 0xA5,
+ EfiSlotTypePciExpressX1 = 0xA6,
+ EfiSlotTypePciExpressX2 = 0xA7,
+ EfiSlotTypePciExpressX4 = 0xA8,
+ EfiSlotTypePciExpressX8 = 0xA9,
+ EfiSlotTypePciExpressX16 = 0xAA
+} EFI_MISC_SLOT_TYPE;
+
+typedef enum {
+ EfiSlotDataBusWidthOther = 0x01,
+ EfiSlotDataBusWidthUnknown = 0x02,
+ EfiSlotDataBusWidth8Bit = 0x03,
+ EfiSlotDataBusWidth16Bit = 0x04,
+ EfiSlotDataBusWidth32Bit = 0x05,
+ EfiSlotDataBusWidth64Bit = 0x06,
+ EfiSlotDataBusWidth128Bit = 0x07,
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, these fields aren't defined.
+ /// They're introduced for SmBios 2.6 specification type 9.
+ ///
+ EfiSlotDataBusWidth1xOrx1 = 0x8,
+ EfiSlotDataBusWidth2xOrx2 = 0x9,
+ EfiSlotDataBusWidth4xOrx4 = 0xA,
+ EfiSlotDataBusWidth8xOrx8 = 0xB,
+ EfiSlotDataBusWidth12xOrx12 = 0xC,
+ EfiSlotDataBusWidth16xOrx16 = 0xD,
+ EfiSlotDataBusWidth32xOrx32 = 0xE
+} EFI_MISC_SLOT_DATA_BUS_WIDTH;
+
+typedef enum {
+ EfiSlotUsageOther = 1,
+ EfiSlotUsageUnknown = 2,
+ EfiSlotUsageAvailable = 3,
+ EfiSlotUsageInUse = 4
+} EFI_MISC_SLOT_USAGE;
+
+typedef enum {
+ EfiSlotLengthOther = 1,
+ EfiSlotLengthUnknown = 2,
+ EfiSlotLengthShort = 3,
+ EfiSlotLengthLong = 4
+} EFI_MISC_SLOT_LENGTH;
+
+typedef struct {
+ UINT32 CharacteristicsUnknown :1;
+ UINT32 Provides50Volts :1;
+ UINT32 Provides33Volts :1;
+ UINT32 SharedSlot :1;
+ UINT32 PcCard16Supported :1;
+ UINT32 CardBusSupported :1;
+ UINT32 ZoomVideoSupported :1;
+ UINT32 ModemRingResumeSupported:1;
+ UINT32 PmeSignalSupported :1;
+ UINT32 HotPlugDevicesSupported :1;
+ UINT32 SmbusSignalSupported :1;
+ UINT32 Reserved :21;
+} EFI_MISC_SLOT_CHARACTERISTICS;
+
+typedef struct {
+ STRING_REF SlotDesignation;
+ EFI_MISC_SLOT_TYPE SlotType;
+ EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;
+ EFI_MISC_SLOT_USAGE SlotUsage;
+ EFI_MISC_SLOT_LENGTH SlotLength;
+ UINT16 SlotId;
+ EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics;
+ EFI_DEVICE_PATH_PROTOCOL SlotDevicePath;
+} EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA;
+
+//
+// Misc. Onboard Device - SMBIOS Type 10
+//
+#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008
+
+typedef enum {
+ EfiOnBoardDeviceTypeOther = 1,
+ EfiOnBoardDeviceTypeUnknown = 2,
+ EfiOnBoardDeviceTypeVideo = 3,
+ EfiOnBoardDeviceTypeScsiController = 4,
+ EfiOnBoardDeviceTypeEthernet = 5,
+ EfiOnBoardDeviceTypeTokenRing = 6,
+ EfiOnBoardDeviceTypeSound = 7
+} EFI_MISC_ONBOARD_DEVICE_TYPE;
+
+typedef struct {
+ UINT32 DeviceType :16;
+ UINT32 DeviceEnabled :1;
+ UINT32 Reserved :15;
+} EFI_MISC_ONBOARD_DEVICE_STATUS;
+
+typedef struct {
+ STRING_REF OnBoardDeviceDescription;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, the name is OnBoardDeviceType.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;
+ EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath;
+} EFI_MISC_ONBOARD_DEVICE_DATA;
+
+//
+// Misc. BIOS Language Information - SMBIOS Type 11
+//
+#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009
+
+typedef struct {
+ STRING_REF OemStringRef[1];
+} EFI_MISC_OEM_STRING_DATA;
+
+//
+// Misc. System Options - SMBIOS Type 12
+//
+typedef struct {
+ STRING_REF SystemOptionStringRef[1];
+} EFI_MISC_SYSTEM_OPTION_STRING_DATA;
+
+#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A
+
+//
+// Misc. Number of Installable Languages - SMBIOS Type 13
+//
+#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B
+
+typedef struct {
+ UINT32 AbbreviatedLanguageFormat :1;
+ UINT32 Reserved :31;
+} EFI_MISC_LANGUAGE_FLAGS;
+
+typedef struct {
+ UINT16 NumberOfInstallableLanguages;
+ EFI_MISC_LANGUAGE_FLAGS LanguageFlags;
+ UINT16 CurrentLanguageNumber;
+} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA;
+
+//
+// Misc. System Language String
+//
+#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C
+
+typedef struct {
+ UINT16 LanguageId;
+ STRING_REF SystemLanguageString;
+} EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA;
+
+//
+// Group Associations - SMBIOS Type 14
+//
+#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D
+
+typedef struct {
+ STRING_REF GroupName;
+ UINT16 NumberGroupItems;
+ UINT16 GroupId;
+} EFI_MISC_GROUP_NAME_DATA;
+
+//
+// Group Item Set Element
+//
+#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E
+
+typedef struct {
+ EFI_GUID SubClass;
+ EFI_INTER_LINK_DATA GroupLink;
+ UINT16 GroupId;
+ UINT16 GroupElementId;
+} EFI_MISC_GROUP_ITEM_SET_DATA;
+
+//
+// Misc. Pointing Device Type - SMBIOS Type 21
+//
+#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F
+
+typedef enum {
+ EfiPointingDeviceTypeOther = 0x01,
+ EfiPointingDeviceTypeUnknown = 0x02,
+ EfiPointingDeviceTypeMouse = 0x03,
+ EfiPointingDeviceTypeTrackBall = 0x04,
+ EfiPointingDeviceTypeTrackPoint = 0x05,
+ EfiPointingDeviceTypeGlidePoint = 0x06,
+ EfiPointingDeviceTouchPad = 0x07,
+ EfiPointingDeviceTouchScreen = 0x08,
+ EfiPointingDeviceOpticalSensor = 0x09
+} EFI_MISC_POINTING_DEVICE_TYPE;
+
+typedef enum {
+ EfiPointingDeviceInterfaceOther = 0x01,
+ EfiPointingDeviceInterfaceUnknown = 0x02,
+ EfiPointingDeviceInterfaceSerial = 0x03,
+ EfiPointingDeviceInterfacePs2 = 0x04,
+ EfiPointingDeviceInterfaceInfrared = 0x05,
+ EfiPointingDeviceInterfaceHpHil = 0x06,
+ EfiPointingDeviceInterfaceBusMouse = 0x07,
+ EfiPointingDeviceInterfaceADB = 0x08,
+ EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0,
+ EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1,
+ EfiPointingDeviceInterfaceUsb = 0xA2
+} EFI_MISC_POINTING_DEVICE_INTERFACE;
+
+typedef struct {
+ EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType;
+ EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface;
+ UINT16 NumberPointingDeviceButtons;
+ EFI_DEVICE_PATH_PROTOCOL PointingDevicePath;
+} EFI_MISC_POINTING_DEVICE_TYPE_DATA;
+
+//
+// Portable Battery - SMBIOS Type 22
+//
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the name is EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER.
+/// Keep it unchanged for backward compatibilty.
+///
+#define EFI_MISC_PORTABLE_BATTERY_RECORD_NUMBER 0x00000010
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_DEVICE_CHEMISTRY.
+/// And all field namings are also different with specification.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef enum {
+ EfiPortableBatteryDeviceChemistryOther = 1,
+ EfiPortableBatteryDeviceChemistryUnknown = 2,
+ EfiPortableBatteryDeviceChemistryLeadAcid = 3,
+ EfiPortableBatteryDeviceChemistryNickelCadmium = 4,
+ EfiPortableBatteryDeviceChemistryNickelMetalHydride = 5,
+ EfiPortableBatteryDeviceChemistryLithiumIon = 6,
+ EfiPortableBatteryDeviceChemistryZincAir = 7,
+ EfiPortableBatteryDeviceChemistryLithiumPolymer = 8
+} EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY;
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_LOCATION_DATA.
+/// Also, the name and the order of the fields vary with specifications.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ STRING_REF Location;
+ STRING_REF Manufacturer;
+ STRING_REF ManufactureDate;
+ STRING_REF SerialNumber;
+ STRING_REF DeviceName;
+ EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY
+ DeviceChemistry;
+ UINT16 DesignCapacity;
+ UINT16 DesignVoltage;
+ STRING_REF SBDSVersionNumber;
+ UINT8 MaximumError;
+ UINT16 SBDSSerialNumber;
+ UINT16 SBDSManufactureDate;
+ STRING_REF SBDSDeviceChemistry;
+ UINT8 DesignCapacityMultiplier;
+ UINT32 OEMSpecific;
+ UINT8 BatteryNumber; // Temporary
+ BOOLEAN Valid; // Is entry valid - Temporary
+} EFI_MISC_PORTABLE_BATTERY;
+
+
+//
+// Misc. Reset Capabilities - SMBIOS Type 23
+//
+#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011
+
+typedef struct {
+ UINT32 Status :1;
+ UINT32 BootOption :2;
+ UINT32 BootOptionOnLimit :2;
+ UINT32 WatchdogTimerPresent:1;
+ UINT32 Reserved :26;
+} EFI_MISC_RESET_CAPABILITIES_TYPE;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES_DATA;
+
+//
+// Misc. Hardware Security - SMBIOS Type 24
+//
+#define EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA_RECORD_NUMBER 0x00000012
+
+///
+/// Inconsistent with specification here:
+/// The MiscSubclass specification 0.9 only mentions the possible value of each field in
+/// EFI_MISC_HARDWARE_SECURITY_SETTINGS.
+/// It's implementation-specific in order to to simplify the code logic.
+///
+typedef enum {
+ EfiHardwareSecurityStatusDisabled = 0,
+ EfiHardwareSecurityStatusEnabled = 1,
+ EfiHardwareSecurityStatusNotImplemented = 2,
+ EfiHardwareSecurityStatusUnknown = 3
+} EFI_MISC_HARDWARE_SECURITY_STATUS;
+
+typedef struct {
+ UINT32 FrontPanelResetStatus :2;
+ UINT32 AdministratorPasswordStatus :2;
+ UINT32 KeyboardPasswordStatus :2;
+ UINT32 PowerOnPasswordStatus :2;
+ UINT32 Reserved :24;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA;
+
+//
+// System Power Controls - SMBIOS Type 25
+//
+#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013
+
+typedef struct {
+ UINT16 ScheduledPoweronMonth;
+ UINT16 ScheduledPoweronDayOfMonth;
+ UINT16 ScheduledPoweronHour;
+ UINT16 ScheduledPoweronMinute;
+ UINT16 ScheduledPoweronSecond;
+} EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA;
+
+//
+// Voltage Probe - SMBIOS Type 26
+//
+#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014
+
+typedef struct {
+ UINT32 VoltageProbeSite :5;
+ UINT32 VoltageProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_VOLTAGE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF VoltageProbeDescription;
+ EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation;
+ EFI_EXP_BASE10_DATA VoltageProbeMaximumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeMinimumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeResolution;
+ EFI_EXP_BASE10_DATA VoltageProbeTolerance;
+ EFI_EXP_BASE10_DATA VoltageProbeAccuracy;
+ EFI_EXP_BASE10_DATA VoltageProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 VoltageProbeOemDefined;
+} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA;
+
+//
+// Cooling Device - SMBIOS Type 27
+//
+#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015
+
+typedef struct {
+ UINT32 CoolingDevice :5;
+ UINT32 CoolingDeviceStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_COOLING_DEVICE_TYPE;
+
+typedef struct {
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;
+ UINT8 CoolingDeviceUnitGroup;
+ UINT16 CoolingDeviceNominalSpeed;
+ UINT32 CoolingDeviceOemDefined;
+} EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;
+
+//
+// Temperature Probe - SMBIOS Type 28
+//
+#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016
+
+typedef struct {
+ UINT32 TemperatureProbeSite :5;
+ UINT32 TemperatureProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_TEMPERATURE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF TemperatureProbeDescription;
+ EFI_MISC_TEMPERATURE_PROBE_LOCATION
+ TemperatureProbeLocation;
+ ///
+ /// Inconsistent with specification here:
+ /// MiscSubclass 0.9 specification defines the fields type as EFI_EXP_BASE10_DATA.
+ /// In fact, they should be UINT16 type because they refer to 16bit width data.
+ /// Keeping this inconsistency for backward compatibility.
+ ///
+ UINT16 TemperatureProbeMaximumValue;
+ UINT16 TemperatureProbeMinimumValue;
+ UINT16 TemperatureProbeResolution;
+ UINT16 TemperatureProbeTolerance;
+ UINT16 TemperatureProbeAccuracy;
+ UINT16 TemperatureProbeNominalValue;
+ UINT16 MDLowerNoncriticalThreshold;
+ UINT16 MDUpperNoncriticalThreshold;
+ UINT16 MDLowerCriticalThreshold;
+ UINT16 MDUpperCriticalThreshold;
+ UINT16 MDLowerNonrecoverableThreshold;
+ UINT16 MDUpperNonrecoverableThreshold;
+ UINT32 TemperatureProbeOemDefined;
+} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;
+
+//
+// Electrical Current Probe - SMBIOS Type 29
+//
+
+#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017
+
+typedef struct {
+ UINT32 ElectricalCurrentProbeSite :5;
+ UINT32 ElectricalCurrentProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF ElectricalCurrentProbeDescription;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION
+ ElectricalCurrentProbeLocation;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMaximumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMinimumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeResolution;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeTolerance;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeAccuracy;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 ElectricalCurrentProbeOemDefined;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA;
+
+//
+// Out-of-Band Remote Access - SMBIOS Type 30
+//
+
+#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018
+
+typedef struct {
+ UINT32 InboundConnectionEnabled :1;
+ UINT32 OutboundConnectionEnabled :1;
+ UINT32 Reserved :30;
+} EFI_MISC_REMOTE_ACCESS_CONNECTIONS;
+
+typedef struct {
+ STRING_REF RemoteAccessManufacturerNameDescription;
+ EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections;
+} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA;
+
+//
+// Misc. BIS Entry Point - SMBIOS Type 31
+//
+#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BisEntryPoint;
+} EFI_MISC_BIS_ENTRY_POINT_DATA;
+
+//
+// Misc. Boot Information - SMBIOS Type 32
+//
+#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef enum {
+ EfiBootInformationStatusNoError = 0x00,
+ EfiBootInformationStatusNoBootableMedia = 0x01,
+ EfiBootInformationStatusNormalOSFailedLoading = 0x02,
+ EfiBootInformationStatusFirmwareDetectedFailure = 0x03,
+ EfiBootInformationStatusOSDetectedFailure = 0x04,
+ EfiBootInformationStatusUserRequestedBoot = 0x05,
+ EfiBootInformationStatusSystemSecurityViolation = 0x06,
+ EfiBootInformationStatusPreviousRequestedImage = 0x07,
+ EfiBootInformationStatusWatchdogTimerExpired = 0x08,
+ EfiBootInformationStatusStartReserved = 0x09,
+ EfiBootInformationStatusStartOemSpecific = 0x80,
+ EfiBootInformationStatusStartProductSpecific = 0xC0
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
+
+typedef struct {
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, the field name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;
+ UINT8 BootInformationData[9];
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA;
+
+//
+// Management Device - SMBIOS Type 34
+//
+#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B
+
+typedef enum {
+ EfiManagementDeviceTypeOther = 0x01,
+ EfiManagementDeviceTypeUnknown = 0x02,
+ EfiManagementDeviceTypeLm75 = 0x03,
+ EfiManagementDeviceTypeLm78 = 0x04,
+ EfiManagementDeviceTypeLm79 = 0x05,
+ EfiManagementDeviceTypeLm80 = 0x06,
+ EfiManagementDeviceTypeLm81 = 0x07,
+ EfiManagementDeviceTypeAdm9240 = 0x08,
+ EfiManagementDeviceTypeDs1780 = 0x09,
+ EfiManagementDeviceTypeMaxim1617 = 0x0A,
+ EfiManagementDeviceTypeGl518Sm = 0x0B,
+ EfiManagementDeviceTypeW83781D = 0x0C,
+ EfiManagementDeviceTypeHt82H791 = 0x0D
+} EFI_MISC_MANAGEMENT_DEVICE_TYPE;
+
+typedef enum {
+ EfiManagementDeviceAddressTypeOther = 1,
+ EfiManagementDeviceAddressTypeUnknown = 2,
+ EfiManagementDeviceAddressTypeIOPort = 3,
+ EfiManagementDeviceAddressTypeMemory = 4,
+ EfiManagementDeviceAddressTypeSmbus = 5
+} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
+
+typedef struct {
+ STRING_REF ManagementDeviceDescription;
+ EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType;
+ UINTN ManagementDeviceAddress;
+ EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE
+ ManagementDeviceAddressType;
+} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA;
+
+//
+// Management Device Component - SMBIOS Type 35
+//
+
+#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C
+
+typedef struct {
+ STRING_REF ManagementDeviceComponentDescription;
+ EFI_INTER_LINK_DATA ManagementDeviceLink;
+ EFI_INTER_LINK_DATA ManagementDeviceComponentLink;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this field is NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 35.
+ ///
+ EFI_INTER_LINK_DATA ManagementDeviceThresholdLink;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this field is NOT defined.
+ /// It's implementation-specific to simplify the code logic.
+ ///
+ UINT8 ComponentType;
+} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;
+
+//
+// IPMI Data Record - SMBIOS Type 38
+//
+typedef enum {
+ EfiIpmiOther = 0,
+ EfiIpmiKcs = 1,
+ EfiIpmiSmic = 2,
+ EfiIpmiBt = 3
+} EFI_MISC_IPMI_INTERFACE_TYPE;
+
+typedef struct {
+ UINT16 IpmiSpecLeastSignificantDigit:4;
+ UINT16 IpmiSpecMostSignificantDigit: 4;
+ UINT16 Reserved: 8;
+} EFI_MISC_IPMI_SPECIFICATION_REVISION;
+
+typedef struct {
+ EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType;
+ EFI_MISC_IPMI_SPECIFICATION_REVISION
+ IpmiSpecificationRevision;
+ UINT16 IpmiI2CSlaveAddress;
+ UINT16 IpmiNvDeviceAddress;
+ UINT64 IpmiBaseAddress;
+ EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath;
+} EFI_MISC_IPMI_INTERFACE_TYPE_DATA;
+
+#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D
+///
+/// The definition above is *NOT* defined in MiscSubclass specifications 0.9.
+/// It's defined for backward compatibility.
+///
+#define EFI_MISC_IPMI_INTERFACE_TYPE_DATA_RECORD_NUMBER EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER
+
+///
+/// System Power supply Record - SMBIOS Type 39
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the type of all fields are UINT32.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ UINT16 PowerSupplyHotReplaceable:1;
+ UINT16 PowerSupplyPresent :1;
+ UINT16 PowerSupplyUnplugged :1;
+ UINT16 InputVoltageRangeSwitch :4;
+ UINT16 PowerSupplyStatus :3;
+ UINT16 PowerSupplyType :4;
+ UINT16 Reserved :2;
+} EFI_MISC_POWER_SUPPLY_CHARACTERISTICS;
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_POWER_SUPPLY_UNIT_GROUP_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ UINT16 PowerUnitGroup;
+ STRING_REF PowerSupplyLocation;
+ STRING_REF PowerSupplyDeviceName;
+ STRING_REF PowerSupplyManufacturer;
+ STRING_REF PowerSupplySerialNumber;
+ STRING_REF PowerSupplyAssetTagNumber;
+ STRING_REF PowerSupplyModelPartNumber;
+ STRING_REF PowerSupplyRevisionLevel;
+ UINT16 PowerSupplyMaxPowerCapacity;
+ EFI_MISC_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
+ EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink;
+ EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink;
+ EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink;
+} EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;
+
+#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E
+
+///
+/// OEM Data Record - SMBIOS Type 0x80-0xFF
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_SMBIOS_STRUCTURE_HDR.
+/// Due to this, the structure is commonly used by vendors to construct SmBios type 0x80~0xFF table,
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+} SMBIOS_STRUCTURE_HDR;
+
+typedef struct {
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, the field name is EFI_SMBIOS_STRUCTURE_HDR.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ SMBIOS_STRUCTURE_HDR Header;
+ UINT8 RawData[1];
+} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;
+
+#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F
+
+///
+/// Misc. System Event Log - SMBIOS Type 15
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 15.
+///
+#define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x00000020
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 15.
+///
+typedef struct {
+ UINT16 LogAreaLength;
+ UINT16 LogHeaderStartOffset;
+ UINT16 LogDataStartOffset;
+ UINT8 AccessMethod;
+ UINT8 LogStatus;
+ UINT32 LogChangeToken;
+ UINT32 AccessMethodAddress;
+ UINT8 LogHeaderFormat;
+ UINT8 NumberOfSupportedLogType;
+ UINT8 LengthOfLogDescriptor;
+} EFI_MISC_SYSTEM_EVENT_LOG_DATA;
+
+//
+// Access Method.
+// 0x00~0x04: as following definition
+// 0x05~0x7f: Available for future assignment.
+// 0x80~0xff: BIOS Vendor/OEM-specific.
+//
+#define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00
+#define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01
+#define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02
+#define ACCESS_MEMORY_MAPPED 0x03
+#define ACCESS_GPNV 0x04
+
+///
+/// Management Device Threshold Data Record - SMBIOS Type 36
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 36.
+///
+#define EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD_RECORD_NUMBER 0x00000021
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 36.
+///
+typedef struct {
+ UINT16 LowerThresNonCritical;
+ UINT16 UpperThresNonCritical;
+ UINT16 LowerThresCritical;
+ UINT16 UpperThresCritical;
+ UINT16 LowerThresNonRecover;
+ UINT16 UpperThresNonRecover;
+} EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD;
+
+//
+// Declare the following strutures alias to use them more conviniently.
+//
+typedef EFI_MISC_LAST_PCI_BUS_DATA EFI_MISC_LAST_PCI_BUS;
+typedef EFI_MISC_BIOS_VENDOR_DATA EFI_MISC_BIOS_VENDOR;
+typedef EFI_MISC_SYSTEM_MANUFACTURER_DATA EFI_MISC_SYSTEM_MANUFACTURER;
+typedef EFI_MISC_BASE_BOARD_MANUFACTURER_DATA EFI_MISC_BASE_BOARD_MANUFACTURER;
+typedef EFI_MISC_CHASSIS_MANUFACTURER_DATA EFI_MISC_CHASSIS_MANUFACTURER;
+typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR;
+typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA EFI_MISC_SYSTEM_SLOT_DESIGNATION;
+typedef EFI_MISC_ONBOARD_DEVICE_DATA EFI_MISC_ONBOARD_DEVICE;
+typedef EFI_MISC_POINTING_DEVICE_TYPE_DATA EFI_MISC_ONBOARD_DEVICE_TYPE_DATA;
+typedef EFI_MISC_OEM_STRING_DATA EFI_MISC_OEM_STRING;
+typedef EFI_MISC_SYSTEM_OPTION_STRING_DATA EFI_MISC_SYSTEM_OPTION_STRING;
+typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES;
+typedef EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA EFI_MISC_SYSTEM_LANGUAGE_STRING;
+typedef EFI_MISC_SYSTEM_EVENT_LOG_DATA EFI_MISC_SYSTEM_EVENT_LOG;
+typedef EFI_MISC_BIS_ENTRY_POINT_DATA EFI_MISC_BIS_ENTRY_POINT;
+typedef EFI_MISC_BOOT_INFORMATION_STATUS_DATA EFI_MISC_BOOT_INFORMATION_STATUS;
+typedef EFI_MISC_SYSTEM_POWER_SUPPLY_DATA EFI_MISC_SYSTEM_POWER_SUPPLY;
+typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION;
+typedef EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA EFI_MISC_SCHEDULED_POWER_ON_MONTH;
+typedef EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA EFI_MISC_VOLTAGE_PROBE_DESCRIPTION;
+typedef EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA EFI_MISC_COOLING_DEVICE_TEMP_LINK;
+typedef EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION;
+typedef EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION;
+typedef EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION;
+typedef EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION;
+typedef EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It is implementation-specific to simplify the code logic.
+///
+typedef union {
+ EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;
+ EFI_MISC_BIOS_VENDOR_DATA MiscBiosVendor;
+ EFI_MISC_SYSTEM_MANUFACTURER_DATA MiscSystemManufacturer;
+ EFI_MISC_BASE_BOARD_MANUFACTURER_DATA MiscBaseBoardManufacturer;
+ EFI_MISC_CHASSIS_MANUFACTURER_DATA MiscChassisManufacturer;
+ EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA MiscPortInternalConnectorDesignator;
+ EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA MiscSystemSlotDesignation;
+ EFI_MISC_ONBOARD_DEVICE_DATA MiscOnboardDevice;
+ EFI_MISC_OEM_STRING_DATA MiscOemString;
+ EFI_MISC_SYSTEM_OPTION_STRING_DATA MiscOptionString;
+ EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA NumberOfInstallableLanguages;
+ EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA MiscSystemLanguageString;
+ EFI_MISC_SYSTEM_EVENT_LOG_DATA MiscSystemEventLog;
+ EFI_MISC_GROUP_NAME_DATA MiscGroupNameData;
+ EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData;
+ EFI_MISC_POINTING_DEVICE_TYPE_DATA MiscPointingDeviceTypeData;
+ EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData;
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData;
+ EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA MiscScheduledPowerOnMonthData;
+ EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA MiscVoltagePorbeDescriptionData;
+ EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA MiscCoolingDeviceTempLinkData;
+ EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA MiscTemperatureProbeDescriptionData;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA MiscElectricalCurrentProbeDescriptionData;
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA
+ MiscRemoteAccessManufacturerDescriptionData;
+ EFI_MISC_BIS_ENTRY_POINT_DATA MiscBisEntryPoint;
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA MiscBootInformationStatus;
+ EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA MiscMangementDeviceDescriptionData;
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA
+ MiscmangementDeviceComponentDescriptionData;
+ EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData;
+ EFI_MISC_SYSTEM_POWER_SUPPLY_DATA MiscPowerSupplyInfo;
+ EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA MiscSmbiosStructEncapsulation;
+ EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD MiscManagementDeviceThreshold;
+} EFI_MISC_SUBCLASS_RECORDS;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It is implementation-specific to simplify the code logic.
+///
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MISC_SUBCLASS_RECORDS Record;
+} EFI_MISC_SUBCLASS_DRIVER_DATA;
+#pragma pack()
+
+///
+/// Inconsistent with specification here:
+/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.
+/// But value is meaningful, 0 means Reserved.
+///
+#define EFI_SUBCLASS_INSTANCE_RESERVED 0
+///
+/// Inconsistent with specification here:
+/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.
+/// But value is meaningful, -1 means Not Applicable.
+///
+#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Guid/FirmwareFileSystem.h b/Core/IntelFrameworkPkg/Include/Guid/FirmwareFileSystem.h new file mode 100644 index 0000000000..56c34765c5 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Guid/FirmwareFileSystem.h @@ -0,0 +1,36 @@ +/** @file
+ Guid used to define the Firmware File System. See the Framework Firmware
+ File System Specification for more details.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ Guids defined in Firmware File System Spec 0.9.
+
+**/
+
+#ifndef __FIRMWARE_FILE_SYSTEM_GUID_H__
+#define __FIRMWARE_FILE_SYSTEM_GUID_H__
+
+///
+/// GUIDs defined by the FFS specification.
+///
+#define EFI_FIRMWARE_FILE_SYSTEM_GUID \
+ { 0x7A9354D9, 0x0468, 0x444a, {0x81, 0xCE, 0x0B, 0xF6, 0x17, 0xD8, 0x90, 0xDF }}
+
+typedef UINT16 EFI_FFS_FILE_TAIL;
+
+#define FFS_ATTRIB_TAIL_PRESENT 0x01
+#define FFS_ATTRIB_RECOVERY 0x02
+#define FFS_ATTRIB_HEADER_EXTENSION 0x04
+
+extern EFI_GUID gEfiFirmwareFileSystemGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Guid/SmmCommunicate.h b/Core/IntelFrameworkPkg/Include/Guid/SmmCommunicate.h new file mode 100644 index 0000000000..9c7a3333be --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Guid/SmmCommunicate.h @@ -0,0 +1,33 @@ +/** @file
+ Definitions EFI_SMM_COMMUNICATE_HEADER used by EFI_SMM_BASE_PROTOCOL.Communicate()
+ functions.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in SmmCis spec version 0.9.
+
+**/
+
+#ifndef _SMM_COMMUNICATE_GUID_H_
+#define _SMM_COMMUNICATE_GUID_H_
+
+///
+/// Inconsistent with specification here:
+/// GUID definition format has been changed, because the GUID format in the Framework specification is incorrect.
+///
+#define SMM_COMMUNICATE_HEADER_GUID \
+ { \
+ 0xf328e36c, 0x23b6, 0x4a95, {0x85, 0x4b, 0x32, 0xe1, 0x95, 0x34, 0xcd, 0x75 } \
+ }
+
+extern EFI_GUID gSmmCommunicateHeaderGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h b/Core/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h new file mode 100644 index 0000000000..04589cf040 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h @@ -0,0 +1,60 @@ +/** @file
+ Definition of GUIDed HOB for reserving SMRAM regions.
+
+ This file defines:
+ * the GUID used to identify the GUID HOB for reserving SMRAM regions.
+ * the data structure of SMRAM descriptor to describe SMRAM candidate regions
+ * values of state of SMRAM candidate regions
+ * the GUID specific data structure of HOB for reserving SMRAM regions.
+ This GUIDed HOB can be used to convey the existence of the T-SEG reservation and H-SEG usage
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ GUIDs defined in SmmCis spec version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_
+#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_
+
+#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \
+ { \
+ 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d } \
+ }
+
+/**
+* GUID specific data structure of HOB for reserving SMRAM regions.
+*
+* Inconsistent with specification here:
+* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to EFI_SMRAM_HOB_DESCRIPTOR_BLOCK.
+* This inconsistency is kept in code in order for backward compatibility.
+**/
+typedef struct {
+ ///
+ /// Designates the number of possible regions in the system
+ /// that can be usable for SMRAM.
+ ///
+ /// Inconsistent with specification here:
+ /// In Framework SMM CIS 0.91 specification, it defines the field type as UINTN.
+ /// However, HOBs are supposed to be CPU neutral, so UINT32 should be used instead.
+ ///
+ UINT32 NumberOfSmmReservedRegions;
+ ///
+ /// Used throughout this protocol to describe the candidate
+ /// regions for SMRAM that are supported by this platform.
+ ///
+ EFI_SMRAM_DESCRIPTOR Descriptor[1];
+} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK;
+
+extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid;
+
+#endif
+
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/BootScriptExecuter.h b/Core/IntelFrameworkPkg/Include/Ppi/BootScriptExecuter.h new file mode 100644 index 0000000000..db0f422da8 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/BootScriptExecuter.h @@ -0,0 +1,79 @@ +/** @file
+ This file declares the Boot Script Executer PPI.
+
+ This PPI is published by a PEIM upon dispatch and provides an execution engine for the
+ Framework boot script. This PEIM should be platform neutral and have no specific knowledge of
+ platform instructions or other information. The ability to interpret the boot script depends on the
+ abundance of other PPIs that are available. For example, if the script requests an SMBus command
+ execution, the PEIM looks for a relevant PPI that is available to execute it, rather than executing it
+ by issuing the native IA-32 instruction.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI BootScript spec.
+ Version 0.91.
+
+**/
+
+#ifndef _PEI_BOOT_SCRIPT_EXECUTER_PPI_H_
+#define _PEI_BOOT_SCRIPT_EXECUTER_PPI_H_
+
+#define EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI_GUID \
+ { \
+ 0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0x0b, 0xfb, 0xff } \
+ }
+
+typedef struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI;
+
+/**
+ Executes the Framework boot script table.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+ @param This A pointer to the EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI instance.
+ @param Address The physical memory address where the table is stored.
+ It must be zero if the table to be executed is stored in
+ a firmware volume file.
+ @param FvFile The firmware volume file name that contains the table to
+ be executed. It must be NULL if the table to be executed
+ is stored in physical memory.
+
+ @retval EFI_SUCCESS The boot script table was executed successfully.
+ @retval EFI_INVALID_PARAMETER Address is zero and FvFile is NULL.
+ @retval EFI_NOT_FOUND The file name specified in FvFile cannot be found.
+ @retval EFI_UNSUPPORTED The format of the boot script table is invalid.
+ Or, an unsupported opcode occurred in the table.
+ Or there were opcode execution errors, such as an
+ insufficient dependency.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_BOOT_SCRIPT_EXECUTE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI *This,
+ IN EFI_PHYSICAL_ADDRESS Address,
+ IN EFI_GUID *FvFile OPTIONAL
+ );
+
+///
+/// EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI produces the function which interprets and
+/// executes the Framework boot script table.
+///
+struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI {
+ ///
+ /// Executes a boot script table.
+ ///
+ EFI_PEI_BOOT_SCRIPT_EXECUTE Execute;
+};
+
+extern EFI_GUID gEfiPeiBootScriptExecuterPpiGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/FindFv.h b/Core/IntelFrameworkPkg/Include/Ppi/FindFv.h new file mode 100644 index 0000000000..14a9f82dab --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/FindFv.h @@ -0,0 +1,68 @@ +/** @file
+ This file declares FindFv PPI, which is used to locate FVs that contain PEIMs in PEI.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+
+**/
+
+#ifndef _FIND_FV_H_
+#define _FIND_FV_H_
+
+///
+/// Inconsistent with specification here:
+/// GUID value format has been changed to the standard GUID format.
+///
+#define EFI_PEI_FIND_FV_PPI_GUID \
+ { \
+ 0x36164812, 0xa023, 0x44e5, {0xbd, 0x85, 0x5, 0xbf, 0x3c, 0x77, 0x0, 0xaa } \
+ }
+
+typedef struct _EFI_PEI_FIND_FV_PPI EFI_PEI_FIND_FV_PPI;
+
+/**
+ This interface returns the base address of the firmware volume whose index
+ was passed in FvNumber. Once this function reports a firmware volume
+ index/base address pair, that index/address pairing must continue throughout PEI.
+
+ @param PeiServices The pointer to the PEI Services Table.
+ @param This Interface pointer that implements the Find FV service.
+ @param FvNumber The index of the firmware volume to locate.
+ @param FvAddress The address of the volume to discover.
+
+ @retval EFI_SUCCESS An additional firmware volume was found.
+ @retval EFI_OUT_OF_RESOURCES There are no firmware volumes for the given FvNumber.
+ @retval EFI_INVALID_PARAMETER *FvAddress is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FIND_FV_FINDFV)(
+ IN EFI_PEI_FIND_FV_PPI *This,
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT8 *FvNumber,
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **FVAddress
+ );
+
+/**
+ Hardware mechanisms for locating FVs in a platform vary widely.
+ EFI_PEI_FIND_FV_PPI serves to abstract this variation so that the
+ PEI Foundation can remain standard across a wide variety of platforms.
+**/
+struct _EFI_PEI_FIND_FV_PPI {
+ EFI_PEI_FIND_FV_FINDFV FindFv; ///< Service that abstracts the location of additional firmware volumes.
+};
+
+extern EFI_GUID gEfiFindFvPpiGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/FvLoadFile.h b/Core/IntelFrameworkPkg/Include/Ppi/FvLoadFile.h new file mode 100644 index 0000000000..b19be053ae --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/FvLoadFile.h @@ -0,0 +1,68 @@ +/** @file
+ Load image file from fv to memory.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS spec Version 0.91.
+
+**/
+
+#ifndef _FV_FILE_LOADER_PPI_H_
+#define _FV_FILE_LOADER_PPI_H_
+
+#define EFI_PEI_FV_FILE_LOADER_GUID \
+ { \
+ 0x7e1f0d85, 0x4ff, 0x4bb2, {0x86, 0x6a, 0x31, 0xa2, 0x99, 0x6a, 0x48, 0xa8 } \
+ }
+
+typedef struct _EFI_PEI_FV_FILE_LOADER_PPI EFI_PEI_FV_FILE_LOADER_PPI;
+
+/**
+ Loads a PEIM into memory for subsequent execution.
+
+ @param This Interface pointer that implements the Load File PPI instance.
+ @param FfsHeader The pointer to the FFS header of the file to load.
+ @param ImageAddress The pointer to the address of the loaded Image
+ @param ImageSize The pointer to the size of the loaded image.
+ @param EntryPoint The pointer to the entry point of the image.
+
+ @retval EFI_SUCCESS The image was loaded successfully.
+ @retval EFI_OUT_OF_RESOURCES There was not enough memory.
+ @retval EFI_INVALID_PARAMETER The contents of the FFS file did not
+ contain a valid PE/COFF image that could be loaded.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FV_LOAD_FILE)(
+ IN EFI_PEI_FV_FILE_LOADER_PPI *This,
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ OUT EFI_PHYSICAL_ADDRESS *ImageAddress,
+ OUT UINT64 *ImageSize,
+ OUT EFI_PHYSICAL_ADDRESS *EntryPoint
+ );
+
+/**
+ This PPI is a pointer to the Load File service. This service will be
+ published by a PEIM. The PEI Foundation will use this service to
+ launch the known non-XIP PE/COFF PEIM images. This service may
+ depend upon the presence of the EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI.
+**/
+struct _EFI_PEI_FV_FILE_LOADER_PPI {
+ ///
+ /// Loads a PEIM into memory for subsequent execution.
+ ///
+ EFI_PEI_FV_LOAD_FILE FvLoadFile;
+};
+
+extern EFI_GUID gEfiPeiFvFileLoaderPpiGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/PciCfg.h b/Core/IntelFrameworkPkg/Include/Ppi/PciCfg.h new file mode 100644 index 0000000000..ded452a16c --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/PciCfg.h @@ -0,0 +1,110 @@ +/** @file
+ This file declares the PciCfg PPI used to access the PCI configuration space in PEI
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+
+**/
+
+#ifndef __PEI_PCI_CFG_H__
+#define __PEI_PCI_CFG_H__
+
+#include <Ppi/PciCfg2.h>
+//
+// Get the common definitions for EFI_PEI_PCI_CFG_PPI_WIDTH.
+//
+
+#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \
+ { \
+ 0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \
+ }
+
+typedef struct _EFI_PEI_PCI_CFG_PPI EFI_PEI_PCI_CFG_PPI;
+
+#define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \
+ (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \
+ ) & 0x00000000ffffffff
+
+/**
+ PCI read and write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This Pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param Buffer A pointer to the buffer of data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+ );
+
+/**
+ PCI read-modify-write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param This The pointer to local data for the interface.
+ @param Width The width of the access. Enumerated in bytes.
+ @param Address The physical address of the access.
+ @param SetBits Value of the bits to set.
+ @param ClearBits Value of the bits to clear.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN SetBits,
+ IN UINTN ClearBits
+ );
+
+/**
+ The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
+ controllers behind a PCI root bridge controller.
+**/
+struct _EFI_PEI_PCI_CFG_PPI {
+ ///
+ /// PCI read services. See the Read() function description.
+ ///
+ EFI_PEI_PCI_CFG_PPI_IO Read;
+
+ ///
+ /// PCI write services. See the Write() function description.
+ ///
+ EFI_PEI_PCI_CFG_PPI_IO Write;
+
+ ///
+ /// PCI read-modify-write services. See the Modify() function description.
+ ///
+ EFI_PEI_PCI_CFG_PPI_RW Modify;
+};
+
+extern EFI_GUID gEfiPciCfgPpiInServiceTableGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/ReadOnlyVariable.h b/Core/IntelFrameworkPkg/Include/Ppi/ReadOnlyVariable.h new file mode 100644 index 0000000000..167e3a8892 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/ReadOnlyVariable.h @@ -0,0 +1,132 @@ +/** @file
+ This file declares the Read-only Variable Service PPI, which is required by the framework spec.
+
+ These services provide a lightweight, read-only variant of the full EFI variable services. The
+ reason that these services are read-only is to reduce the complexity of flash management. Also,
+ some implementation of the PEI may use the same physical flash part for variable and PEIM
+ storage. As such, a write command to certain technologies would alter the contents of the entire part,
+ making the PEIM execution in the original position not follow the required flow.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+**/
+
+#ifndef __PEI_READ_ONLY_VARIABLE_PPI_H__
+#define __PEI_READ_ONLY_VARIABLE_PPI_H__
+
+#define EFI_PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID \
+ { \
+ 0x3cdc90c6, 0x13fb, 0x4a75, {0x9e, 0x79, 0x59, 0xe9, 0xdd, 0x78, 0xb9, 0xfa } \
+ }
+
+typedef struct _EFI_PEI_READ_ONLY_VARIABLE_PPI EFI_PEI_READ_ONLY_VARIABLE_PPI;
+
+///
+/// Variable attributes.
+///@{
+#define EFI_VARIABLE_NON_VOLATILE 0x00000001
+#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
+#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004
+///
+/// Inconsistent with specification here:
+/// In Framework Spec, PeiCis0.91, neither the macro or its value is defined.
+/// Keeping this inconsistancy for backward compatibility.
+///
+#define EFI_VARIABLE_READ_ONLY 0x00000008
+///@}
+
+/**
+ Get Variable value by Name and GUID pair.
+
+ @param[in] PeiServices An indirect pointer to the PEI Services Table published
+ by the PEI Foundation.
+ @param[in] VariableName A NULL-terminated Unicode string that is the name of the vendor's variable.
+ @param[in] VendorGuid A unique identifier for the vendor.
+ @param[out] Attributes This OPTIONAL parameter may be either NULL or
+ a pointer to the location in which to return
+ the attributes bitmask for the variable.
+ @param[in,out] DataSize On input, the size in bytes of the return Data buffer.
+ On output, the size of data returned in Data.
+ @param[out] Data The buffer to return the contents of the variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The variable was not found.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small for the result.
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+ @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_VARIABLE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINT32 *Attributes OPTIONAL,
+ IN OUT UINTN *DataSize,
+ OUT VOID *Data
+ );
+
+/**
+ This function can be called multiple times to retrieve the VariableName
+ and VendorGuid of all variables currently available in the system. On each call
+ to GetNextVariableName(), the previous results are passed into the interface,
+ and on output the interface returns the next variable name data. When the
+ entire variable list has been returned, the error EFI_NOT_FOUND is returned.
+
+ @param[in] PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+ @param[in] VariableNameSize The size of the VariableName buffer.
+ @param[in] VariableName On input, supplies the last VariableName that was
+ returned by GetNextVariableName(). On output,
+ returns the Null-terminated Unicode string of the
+ current variable.
+ @param[in] VendorGuid On input, supplies the last VendorGuid that was
+ returned by GetNextVariableName(). On output,
+ returns the VendorGuid of the current variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The next variable was not found.
+ @retval EFI_BUFFER_TOO_SMALL The VariableNameSize is too small for the result.
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+ @retval EFI_DEVICE_ERROR The variable name could not be retrieved due to
+ a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_NEXT_VARIABLE_NAME)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT UINTN *VariableNameSize,
+ IN OUT CHAR16 *VariableName,
+ IN OUT EFI_GUID *VendorGuid
+ );
+
+///
+/// This PPI provides a lightweight, read-only variant of the full EFI
+/// variable services.
+///
+struct _EFI_PEI_READ_ONLY_VARIABLE_PPI {
+ ///
+ /// Inconsistent with specification here:
+ /// In Framework Spec, PeiCis0.91, the field is named as GetVariable and GetNextVariableName.
+ /// Keeping this inconsistancy for backward compatibility.
+ ///
+ EFI_PEI_GET_VARIABLE PeiGetVariable; ///< A service to ascertain a given variable name.
+ EFI_PEI_GET_NEXT_VARIABLE_NAME PeiGetNextVariableName; ///< A service to ascertain a variable based upon a given, known variable
+};
+
+extern EFI_GUID gEfiPeiReadOnlyVariablePpiGuid;
+
+#endif /* __PEI_READ_ONLY_VARIABLE_PPI_H__ */
+
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/S3Resume.h b/Core/IntelFrameworkPkg/Include/Ppi/S3Resume.h new file mode 100644 index 0000000000..f786056235 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/S3Resume.h @@ -0,0 +1,76 @@ +/** @file
+ This file declares S3 Resume PPI which accomplishes the firmware S3 resume boot path
+ and transfers control to OS.
+
+ This PPI is published by the S3 resume PEIM and can be used on the S3 resume boot path to
+ restore the platform to its preboot configuration and transfer control to OS. The information that is
+ required for an S3 resume can be saved during the normal boot path using
+ EFI_ACPI_S3_SAVE_PROTOCOL. This presaved information can then be restored in the S3
+ resume boot path using EFI_PEI_S3_RESUME_PPI. Architecturally, the S3 resume PEIM is the
+ last PEIM to be dispatched in the S3 resume boot path.
+ Before using this PPI, the caller must ensure the necessary information for the S3 resume, such as
+ the following, is available for the S3 resume boot path:
+ - EFI_ACPI_S3_RESUME_SCRIPT_TABLE script table. Type
+ EFI_ACPI_S3_RESUME_SCRIPT_TABLE is defined in the Intel Platform Innovation
+ Framework for EFI Boot Script Specification.
+ - OS waking vector.
+ - The reserved memory range to be used for the S3 resume.
+ Otherwise, the S3 resume boot path may fail.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in Framework for EFI S3 Resume Boot Path spec.
+ Version 0.9.
+
+**/
+
+#ifndef __PEI_S3_RESUME_PPI_H__
+#define __PEI_S3_RESUME_PPI_H__
+
+#define EFI_PEI_S3_RESUME_PPI_GUID \
+ { \
+ 0x4426CCB2, 0xE684, 0x4a8a, {0xAE, 0x40, 0x20, 0xD4, 0xB0, 0x25, 0xB7, 0x10 } \
+ }
+
+typedef struct _EFI_PEI_S3_RESUME_PPI EFI_PEI_S3_RESUME_PPI;
+
+/**
+ Restores the platform to its preboot configuration for an S3 resume and
+ jumps to the OS waking vector.
+
+ @param PeiServices The pointer to the PEI Services Table
+
+ @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
+ @retval EFI_NOT_FOUND Could not be locate some necessary information that
+ is used for the S3 resume boot path d.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG)(
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+/**
+ EFI_PEI_S3_RESUME_PPI accomplishes the firmware S3 resume boot
+ path and transfers control to OS.
+**/
+struct _EFI_PEI_S3_RESUME_PPI {
+ ///
+ /// Restores the platform to its preboot configuration for an S3 resume and
+ /// jumps to the OS waking vector.
+ ///
+ EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG S3RestoreConfig;
+};
+
+extern EFI_GUID gEfiPeiS3ResumePpiGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/SectionExtraction.h b/Core/IntelFrameworkPkg/Include/Ppi/SectionExtraction.h new file mode 100644 index 0000000000..e1b5a06321 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/SectionExtraction.h @@ -0,0 +1,107 @@ +/** @file
+ This file declares the Section Extraction PPI.
+
+ This PPI is defined in PEI CIS version 0.91. It supports encapsulating sections,
+ such as GUIDed sections used to authenticate the file encapsulation of other domain-specific wrapping.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __SECTION_EXTRACTION_H__
+#define __SECTION_EXTRACTION_H__
+
+#define EFI_PEI_SECTION_EXTRACTION_PPI_GUID \
+ { \
+ 0x4F89E208, 0xE144, 0x4804, {0x9E, 0xC8, 0x0F, 0x89, 0x4F, 0x7E, 0x36, 0xD7 } \
+ }
+
+typedef struct _EFI_PEI_SECTION_EXTRACTION_PPI EFI_PEI_SECTION_EXTRACTION_PPI;
+
+//
+// Bit values for AuthenticationStatus
+//
+#define EFI_AUTH_STATUS_PLATFORM_OVERRIDE 0x01
+#define EFI_AUTH_STATUS_IMAGE_SIGNED 0x02
+#define EFI_AUTH_STATUS_NOT_TESTED 0x04
+#define EFI_AUTH_STATUS_TEST_FAILED 0x08
+
+/**
+ The function is used to retrieve a section from within a section file.
+ It will retrieve both encapsulation sections and leaf sections in their entirety,
+ exclusive of the section header.
+
+ @param PeiServices The pointer to the PEI Services Table.
+ @param This Indicates the calling context
+ @param SectionType The pointer to an EFI_SECTION_TYPE. If
+ SectionType == NULL, the contents of the entire
+ section are returned in Buffer. If SectionType
+ is not NULL, only the requested section is returned.
+ @param SectionDefinitionGuid The pointer to an EFI_GUID.
+ If SectionType == EFI_SECTION_GUID_DEFINED,
+ SectionDefinitionGuid indicates for which section
+ GUID to search. If SectionType != EFI_SECTION_GUID_DEFINED,
+ SectionDefinitionGuid is unused and is ignored.
+ @param SectionInstance If SectionType is not NULL, indicates which
+ instance of the requested section type to return.
+ @param Buffer The pointer to a pointer to a buffer in which the
+ section contents are returned.
+ @param BufferSize A pointer to a caller-allocated UINT32. On input,
+ *BufferSize indicates the size in bytes of the
+ memory region pointed to by Buffer. On output,
+ *BufferSize contains the number of bytes required
+ to read the section.
+ @param AuthenticationStatus A pointer to a caller-allocated UINT32 in
+ which any metadata from encapsulating GUID-defined
+ sections is returned.
+
+ @retval EFI_SUCCESS The section was successfully processed, and the section
+ contents were returned in Buffer.
+ @retval EFI_PROTOCOL_ERROR A GUID-defined section was encountered in
+ the file with its EFI_GUIDED_SECTION_PROCESSING_REQUIRED
+ bit set, but there was no corresponding GUIDed
+ Section Extraction Protocol in the handle database.
+ *Buffer is unmodified.
+ @retval EFI_NOT_FOUND The requested section does not exist.*Buffer is
+ unmodified.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to process
+ the request.
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+ @retval EFI_WARN_TOO_SMALL The size of the input buffer is insufficient to
+ contain the requested section. The input buffer
+ is filled and contents are section contents are
+ truncated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_SECTION)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SECTION_EXTRACTION_PPI *This,
+ IN EFI_SECTION_TYPE *SectionType,
+ IN EFI_GUID *SectionDefinitionGuid, OPTIONAL
+ IN UINTN SectionInstance,
+ IN VOID **Buffer,
+ IN OUT UINT32 *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ This PPI supports encapsulating sections, such as GUIDed sections used to
+ authenticate the file encapsulation of other domain-specific wrapping.
+**/
+struct _EFI_PEI_SECTION_EXTRACTION_PPI {
+ EFI_PEI_GET_SECTION GetSection; ///< Retrieves a section from within a section file.
+};
+
+extern EFI_GUID gEfiPeiSectionExtractionPpiGuid;
+
+#endif
+
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/Security.h b/Core/IntelFrameworkPkg/Include/Ppi/Security.h new file mode 100644 index 0000000000..200bc3ca49 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/Security.h @@ -0,0 +1,68 @@ +/** @file
+ This file declares the Security Architectural PPI.
+
+ This PPI is installed by a platform PEIM that abstracts the security policy to the PEI
+ Foundation, namely the case of a PEIM's authentication state being returned during the PEI section
+ extraction process.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __SECURITY_PPI_H__
+#define __SECURITY_PPI_H__
+
+#define EFI_PEI_SECURITY_PPI_GUID \
+ { \
+ 0x1388066e, 0x3a57, 0x4efa, {0x98, 0xf3, 0xc1, 0x2f, 0x3a, 0x95, 0x8a, 0x29 } \
+ }
+
+typedef struct _EFI_PEI_SECURITY_PPI EFI_PEI_SECURITY_PPI;
+
+/**
+ Allows the platform builder to implement a security policy in response
+ to varying file authentication states.
+
+ @param PeiServices The pointer to the PEI Services Table.
+ @param This Interface pointer that implements the particular
+ EFI_PEI_SECURITY_PPI instance.
+ @param AuthenticationStatus Status returned by the verification service as
+ part of section extraction.
+ @param FfsFileHeader The pointer to the file under review.
+ @param DeferExecution The pointer to a variable that alerts the PEI
+ Foundation to defer execution of a PEIM.
+
+ @retval EFI_SUCCESS The service performed its action successfully.
+ @retval EFI_SECURITY_VIOLATION The object cannot be trusted.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_PEI_SECURITY_AUTHENTICATION_STATE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SECURITY_PPI *This,
+ IN UINT32 AuthenticationStatus,
+ IN EFI_FFS_FILE_HEADER *FfsFileHeader,
+ IN OUT BOOLEAN *DeferExecution
+ );
+
+//
+// PPI interface structure of Security PPI
+//
+struct _EFI_PEI_SECURITY_PPI {
+ FRAMEWORK_EFI_PEI_SECURITY_AUTHENTICATION_STATE AuthenticationState;
+};
+
+extern EFI_GUID gEfiPeiSecurityPpiGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Ppi/Smbus.h b/Core/IntelFrameworkPkg/Include/Ppi/Smbus.h new file mode 100644 index 0000000000..2a95fef5ea --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Ppi/Smbus.h @@ -0,0 +1,232 @@ +/** @file
+ This file declares the Smbus PPI, which provides the basic I/O interfaces that a PEIM
+ uses to access its SMBus controller and the slave devices attached to it.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI SmBus PPI spec.
+ Version 0.9.
+
+**/
+
+#ifndef _PEI_SMBUS_PPI_H_
+#define _PEI_SMBUS_PPI_H_
+
+#include <Ppi/Smbus2.h>
+
+#define EFI_PEI_SMBUS_PPI_GUID \
+ { \
+ 0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0xb, 0xfb, 0xda } \
+ }
+
+typedef struct _EFI_PEI_SMBUS_PPI EFI_PEI_SMBUS_PPI;
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ @param[in] PeiServices A pointer to the system PEI Services Table.
+ @param[in] This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param[in] SlaveAddress The SMBUS hardware address to which the SMBUS
+ device is preassigned or allocated.
+ @param[in] Command This command is transmitted by the SMBus host
+ controller to the SMBus slave device, and the
+ interpretation is SMBus slave device specific.
+ @param[in] Operation Signifies which particular SMBus hardware protocol
+ instance to use to execute the SMBus transactions.
+ @param[in] PecCheck Defines if Packet Error Code (PEC) checking is
+ required for this operation.
+ @param[in, out] Length The number of bytes for this operation.
+ @param[in, out] Buffer Contains the value of data to execute to the SMBus
+ slave device.
+
+ @retval EFI_SUCCESS The last data that was returned from the access
+ matched the poll exit criteria.
+ @retval EFI_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ @retval EFI_TIMEOUT Timeout expired before the operation was completed.
+ Timeout is determined by the SMBus host controller device.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+ @retval EFI_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit.
+ @retval EFI_INVALID_PARAMETER The operation is not defined in EFI_SMBUS_OPERATION.
+ @retval EFI_INVALID_PARAMETER Length/Buffer is NULL for operations except for
+ EfiSmbusQuickRead and EfiSmbusQuickWrite. Length
+ is outside the range of valid values.
+ @retval EFI_UNSUPPORTED The SMBus operation or PEC is not supported.
+ @retval EFI_BUFFER_TOO_SMALL Buffer is not sufficient for this operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN EFI_SMBUS_DEVICE_COMMAND Command,
+ IN EFI_SMBUS_OPERATION Operation,
+ IN BOOLEAN PecCheck,
+ IN OUT UINTN *Length,
+ IN OUT VOID *Buffer
+ );
+
+/**
+ This function is user-defined, and is called when the SlaveAddress/Data pair happens.
+
+ @param[in] PeiServices A pointer to the system PEI Services Table.
+ @param[in] This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param[in] SlaveAddress The SMBUS hardware address to which the SMBUS
+ device is preassigned or allocated.
+ @param[in] Data Data of the SMBus host notify command, which denotes that
+ the caller wants to be called.
+
+ @return Status Code returned by callback function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_NOTIFY_FUNCTION)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *SmbusPpi,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data
+ );
+
+/**
+ The ArpDevice() function enumerates either the entire bus or a specific
+ device identified by SmbusUdid.
+
+ @param[in] PeiServices A pointer to the system PEI Services Table.
+ @param[in] This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param[in] ArpAll A Boolean expression that indicates if the host
+ drivers need to enumerate all the devices or to
+ enumerate only the device that is identified
+ by SmbusUdid. If ArpAll is TRUE, SmbusUdid and
+ SlaveAddress are optional and ignored if entered.
+ If ArpAll is FALSE, ArpDevice will enumerate
+ SmbusUdid, and the address will be at SlaveAddress.
+ @param[in] SmbusUdid The targeted SMBus Unique Device Identifier (UDID).
+ The UDID may not exist for SMBus devices with fixed
+ addresses.
+ @param[in, out] SlaveAddress The new SMBus address for the slave device for
+ which the operation is targeted.
+ This address may be NULL.
+
+ @retval EFI_SUCCESS The SMBus slave device address was set.
+ @retval EFI_INVALID_PARAMETER SlaveAddress is NULL.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+ @retval EFI_TIMEOUT The SMBus slave device did not respond.
+ @retval EFI_DEVICE_ERROR The request was not completed because the transaction failed.
+ @retval EFI_UNSUPPORTED ArpDevice() is not implemented by this PEIM.
+ This return value is not defined in the Framework Specification.
+ This return value was introduced in the PI Specification.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_ARP_DEVICE)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN BOOLEAN ArpAll,
+ IN EFI_SMBUS_UDID *SmbusUdid, OPTIONAL
+ IN OUT EFI_SMBUS_DEVICE_ADDRESS *SlaveAddress OPTIONAL
+ );
+
+/**
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param[in] PeiServices A pointer to the system PEI Services Table.
+ @param[in] This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param[in, out] Length The size of the buffer that contains the SMBus device map.
+ @param[in, out] SmbusDeviceMap The pointer to the device map as enumerated
+ by the SMBus controller driver.
+
+ @retval EFI_SUCCESS The device map was returned correctly in the buffer.
+ @retval EFI_UNSUPPORTED GetArpMap() are not implemented by this PEIM.
+ This return value was not defined in the Framework Specification.
+ This return value was introduced in the PI Specification.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_GET_ARP_MAP)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN OUT UINTN *Length,
+ IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ );
+
+/**
+ Allows a device driver to register for a callback when the bus driver detects a state that it needs to
+ propagate to other PEIMs that are registered for a callback.
+
+ The Notify() function registers all the callback functions to allow the
+ bus driver to call these functions when the SlaveAddress/Data pair occur.
+ All functions to be registered with EFI_PEI_SMBUS_PPI_NOTIFY must be of type
+ EFI_PEI_SMBUS_NOTIFY_FUNCTION.
+
+ @param[in] PeiServices A pointer to the system PEI Services Table.
+ @param[in] This A pointer to the EFI_PEI_SMBUS_PPI instance.
+ @param[in] SlaveAddress The address that the host controller detects as
+ sending a message and triggers all the registered functions.
+ @param[in] Data Data that the host controller detects as sending a message
+ and triggers all the registered functions.
+ @param[in] NotifyFunction The function to call when the bus driver
+ detects the SlaveAddress and Data pair.
+
+ @retval EFI_SUCCESS NotifyFunction has been registered.
+ @retval EFI_UNSUPPORTED Notify() are not implemented by this PEIM.
+ This return value is not defined in the Framework Specification.
+ This return value was introduced in the PI Specification.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_NOTIFY)(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data,
+ IN EFI_PEI_SMBUS_NOTIFY_FUNCTION NotifyFunction
+ );
+
+///
+/// Provides the basic I/O interfaces that a PEIM uses to access
+/// its SMBus controller and the slave devices attached to it.
+///
+struct _EFI_PEI_SMBUS_PPI {
+ ///
+ /// Executes the SMBus operation to an SMBus slave device.
+ ///
+ EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION Execute;
+
+ ///
+ /// Allows an SMBus 2.0 device(s) to be Address Resolution Protocol (ARP)
+ ///
+ EFI_PEI_SMBUS_PPI_ARP_DEVICE ArpDevice;
+
+ ///
+ /// Allows a PEIM to retrieve the address that was allocated by the SMBus
+ /// host controller during enumeration/ARP.
+ ///
+ EFI_PEI_SMBUS_PPI_GET_ARP_MAP GetArpMap;
+
+ ///
+ /// Allows a driver to register for a callback to the SMBus host
+ /// controller driver when the bus issues a notification to the bus controller PEIM.
+ ///
+ EFI_PEI_SMBUS_PPI_NOTIFY Notify;
+};
+
+extern EFI_GUID gEfiPeiSmbusPpiGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/AcpiS3Save.h b/Core/IntelFrameworkPkg/Include/Protocol/AcpiS3Save.h new file mode 100644 index 0000000000..0d466bd503 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/AcpiS3Save.h @@ -0,0 +1,128 @@ +/** @file
+ This protocol is used to prepare all information that is needed for the S3 resume boot path. This
+ protocol is not required for all platforms.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of S3 Resume Boot Path Spec.
+ Version 0.9.
+
+**/
+
+#ifndef _ACPI_S3_SAVE_PROTOCOL_H_
+#define _ACPI_S3_SAVE_PROTOCOL_H_
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_ACPI_S3_SAVE_PROTOCOL EFI_ACPI_S3_SAVE_PROTOCOL;
+
+//
+// S3 Save Protocol GUID
+//
+#define EFI_ACPI_S3_SAVE_GUID \
+ { \
+ 0x125f2de1, 0xfb85, 0x440c, {0xa5, 0x4c, 0x4d, 0x99, 0x35, 0x8a, 0x8d, 0x38 } \
+ }
+
+//
+// Protocol Data Structures
+//
+
+/**
+ This function is used to:
+
+ - Prepare all information that is needed in the S3 resume boot path. This information can include
+ the following:
+ -- Framework boot script table
+ -- RSDT pointer
+ -- Reserved memory for the S3 resume
+
+ - Get the minimum legacy memory length (meaning below 1 MB) that is required for the S3 resume boot path.
+ If LegacyMemoryAddress is NULL, the firmware will be unable to jump into a real-mode
+ waking vector. However, it might still be able to jump into a flat-mode waking vector as long as the
+ OS provides a flat-mode waking vector. It is the caller's responsibility to ensure the
+ LegacyMemoryAddress is valid. If the LegacyMemoryAddress is higher than 1 MB,
+ EFI_INVALID_PARAMETER will be returned.
+
+ @param This A pointer to the EFI_ACPI_S3_SAVE_PROTOCOL instance.
+ @param LegacyMemoryAddress The base of legacy memory.
+
+ @retval EFI_SUCCESS All information was saved successfully.
+ @retval EFI_INVALID_PARAMETER The memory range is not located below 1 MB.
+ @retval EFI_OUT_OF_RESOURCES Resources were insufficient to save all the information.
+ @retval EFI_NOT_FOUND Some necessary information cannot be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_S3_SAVE)(
+ IN EFI_ACPI_S3_SAVE_PROTOCOL * This,
+ IN VOID * LegacyMemoryAddress
+ );
+
+/**
+ This function returns the size of the legacy memory (meaning below 1 MB) that is required during an S3
+ resume. Before the Framework-based firmware transfers control to the OS, it has to transition from
+ flat mode into real mode in case the OS supplies only a real-mode waking vector. This transition
+ requires a certain amount of legacy memory. After getting the size of legacy memory
+ below, the caller is responsible for allocating the legacy memory below 1 MB according to
+ the size that is returned. The specific implementation of allocating the legacy memory is out of the
+ scope of this specification.
+
+ @param This A pointer to the EFI_ACPI_S3_SAVE_PROTOCOL instance.
+ @param Size The returned size of legacy memory below 1MB.
+
+ @retval EFI_SUCCESS Size was successfully returned.
+ @retval EFI_INVALID_PARAMETER The pointer Size is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_GET_LEGACY_MEMORY_SIZE)(
+ IN EFI_ACPI_S3_SAVE_PROTOCOL * This,
+ OUT UINTN * Size
+);
+
+/**
+ The EFI_ACPI_S3_SAVE_PROTOCOL is responsible for preparing all the information that the
+ Framework needs to restore the platform's preboot state during an S3 resume boot. This
+ information can include the following:
+ - The Framework boot script table, containing all necessary operations to initialize the platform.
+ - ACPI table information, such as RSDT, through which the OS waking vector can be located.
+ - The range of reserved memory that can be used on the S3 resume boot path.
+ This protocol can be used after the Framework makes sure that the boot process is complete and
+ that no hardware has been left unconfigured. Where to call this protocol to save information is implementation-specific.
+ In the case of an EFI-aware OS, ExitBootServices() can be a choice to provide this hook.
+ The currently executing EFI OS loader image calls ExitBootServices()to terminate all boot
+ services. After ExitBootServices() successfully completes, the loader becomes responsible
+ for the continued operation of the system.
+ On a normal boot, ExitBootServices() checks if the platform supports S3 by looking for
+ EFI_ACPI_S3_SAVE_PROTOCOL. If the protocol exists, ExitBootServices()will assume
+ that the target platform supports an S3 resume and then call EFI_ACPI_S3_SAVE_PROTOCOL
+ to save the S3 resume information. The entire Framework boot script table will then be generated,
+ assuming the platform currently is in the preboot state.
+**/
+struct _EFI_ACPI_S3_SAVE_PROTOCOL {
+ ///
+ /// Gets the size of legacy memory below 1 MB that is required for S3 resume.
+ ///
+ EFI_ACPI_GET_LEGACY_MEMORY_SIZE GetLegacyMemorySize;
+
+ ///
+ /// Prepare all information for an S3 resume.
+ ///
+ EFI_ACPI_S3_SAVE S3Save;
+};
+
+extern EFI_GUID gEfiAcpiS3SaveProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/AcpiSupport.h b/Core/IntelFrameworkPkg/Include/Protocol/AcpiSupport.h new file mode 100644 index 0000000000..278ef8e42b --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/AcpiSupport.h @@ -0,0 +1,148 @@ +/** @file
+ This protocol provides some basic services to support publishing ACPI system tables. The
+ services handle many of the more mundane tasks that are required to publish a set of tables. The
+ services will:
+ - Generate common tables.
+ - Update the table links.
+ - Ensure that tables are properly aligned and use correct types of memory.
+ - Update checksum values and IDs.
+ - Complete the final installation of the tables.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework ACPI Specification.
+ Version 0.9.
+
+**/
+
+#ifndef _ACPI_SUPPORT_PROTOCOL_H_
+#define _ACPI_SUPPORT_PROTOCOL_H_
+
+#include <Protocol/AcpiSystemDescriptionTable.h>
+
+typedef struct _EFI_ACPI_SUPPORT_PROTOCOL EFI_ACPI_SUPPORT_PROTOCOL;
+
+//
+// ACPI Support Protocol GUID
+//
+#define EFI_ACPI_SUPPORT_GUID \
+ { \
+ 0xdbff9d55, 0x89b7, 0x46da, {0xbd, 0xdf, 0x67, 0x7d, 0x3d, 0xc0, 0x24, 0x1d } \
+ }
+
+
+//
+// Protocol Member Functions
+//
+
+/**
+ Returns a requested ACPI table.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+ @param Index The zero-based index of the table to retrieve.
+ @param Table The pointer for returning the table buffer.
+ @param Version Updated with the ACPI versions to which this table belongs.
+ @param Handle The pointer for identifying the table.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The requested index is too large and a table was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_GET_ACPI_TABLE)(
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN INTN Index,
+ OUT VOID **Table,
+ OUT EFI_ACPI_TABLE_VERSION *Version,
+ OUT UINTN *Handle
+ );
+
+/**
+ Used to add, remove, or update ACPI tables.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+ @param Table The pointer to the new table to add or update.
+ @param Checksum If TRUE, indicates that the checksum should be
+ calculated for this table.
+ @param Version Indicates to which version(s) of ACPI the table should be added.
+ @param Handle The pointer to the handle of the table to remove or update.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_INVALID_PARAMETER *Handle was zero and Table was NULL.
+ @retval EFI_ABORTED Could not complete the desired action.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_SET_ACPI_TABLE)(
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN VOID *Table OPTIONAL,
+ IN BOOLEAN Checksum,
+ IN EFI_ACPI_TABLE_VERSION Version,
+ IN OUT UINTN *Handle
+ );
+
+/**
+ Causes one or more versions of the ACPI tables to be published in
+ the EFI system configuration tables.
+
+ The PublishTables() function installs the ACPI tables for the versions that are specified in
+ Version. No tables are published for Version equal to EFI_ACPI_VERSION_NONE. Once
+ published, tables will continue to be updated as tables are modified with
+ EFI_ACPI_SUPPORT_PROTOCOL.SetAcpiTable().
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+ @param Version Indicates to which version(s) of ACPI the table should be published.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_ABORTED An error occurred and the function could not complete successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_PUBLISH_TABLES)(
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN EFI_ACPI_TABLE_VERSION Version
+ );
+
+//
+// ACPI Support Protocol
+//
+/**
+ This protocol provides some basic services to support publishing ACPI system
+ tables. The services handle many of the more mundane tasks that are required
+ to publish a set of tables.
+**/
+struct _EFI_ACPI_SUPPORT_PROTOCOL {
+ ///
+ /// Returns a table specified by an index if it exists.
+ ///
+ EFI_ACPI_GET_ACPI_TABLE GetAcpiTable;
+
+ ///
+ /// Adds, removes, or updates ACPI tables.
+ ///
+ EFI_ACPI_SET_ACPI_TABLE SetAcpiTable;
+
+ ///
+ /// Publishes the ACPI tables.
+ ///
+ EFI_ACPI_PUBLISH_TABLES PublishTables;
+};
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gEfiAcpiSupportProtocolGuid;
+
+#endif
+
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/BootScriptSave.h b/Core/IntelFrameworkPkg/Include/Protocol/BootScriptSave.h new file mode 100644 index 0000000000..a8710abc8a --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/BootScriptSave.h @@ -0,0 +1,86 @@ +/** @file
+ This protocol is used to store or record various boot scripts into boot
+ script tables.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol defined in the Boot Script Specification, Version 0.91.
+
+**/
+
+#ifndef _BOOT_SCRIPT_SAVE_PROTOCOL_H_
+#define _BOOT_SCRIPT_SAVE_PROTOCOL_H_
+
+///
+/// S3 Save Protocol GUID.
+///
+#define EFI_BOOT_SCRIPT_SAVE_PROTOCOL_GUID \
+ { \
+ 0x470e1529, 0xb79e, 0x4e32, {0xa0, 0xfe, 0x6a, 0x15, 0x6d, 0x29, 0xf9, 0xb2 } \
+ }
+
+typedef struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL EFI_BOOT_SCRIPT_SAVE_PROTOCOL;
+
+/**
+ Adds a record into a specified Framework boot script table.
+
+ @param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
+ @param TableName The name of the script table. Currently, the only meaningful
+ value is EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
+ @param OpCode The operation code (opcode) number.
+ @param ... The argument list that is specific to each opcode.
+
+ @retval EFI_SUCCESS The operation succeeded. A record was added into the specified script table.
+ @retval EFI_INVALID_PARAMETER The parameter is illegal, or the given boot script is not supported.
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BOOT_SCRIPT_WRITE)(
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ IN UINT16 TableName,
+ IN UINT16 OpCode,
+ ...
+ );
+
+/**
+ Closes the specified script table.
+
+ @param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
+ @param TableName The name of the script table.
+ @param Address A pointer to the physical address where the table begins.
+
+ @retval EFI_SUCCESS The table was successfully returned.
+ @retval EFI_NOT_FOUND The specified table was not created previously.
+ @retval EFI_OUT_OF_RESOURCES Memory is insufficient to hold the reorganized boot script table.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BOOT_SCRIPT_CLOSE_TABLE)(
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ IN UINT16 TableName,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ );
+
+///
+/// The EFI_BOOT_SCRIPT_SAVE_PROTOCOL publishes the Framework boot script abstractions
+/// to store or record various boot scripts into boot script tables.
+///
+struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL {
+ EFI_BOOT_SCRIPT_WRITE Write; ///< Writes various boot scripts to a boot script table.
+ EFI_BOOT_SCRIPT_CLOSE_TABLE CloseTable; ///< Retrieves and closes a script table.
+};
+
+extern EFI_GUID gEfiBootScriptSaveProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/CpuIo.h b/Core/IntelFrameworkPkg/Include/Protocol/CpuIo.h new file mode 100644 index 0000000000..ec75da09fd --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/CpuIo.h @@ -0,0 +1,46 @@ +/** @file
+ This code abstracts the CPU IO Protocol which installed by some platform or chipset-specific
+ PEIM that abstracts the processor-visible I/O operations.
+
+ Note: This is a runtime protocol and can be used by runtime drivers after ExitBootServices().
+ It is different from the PI 1.2 CPU I/O 2 Protocol, which is a boot services only protocol
+ and may not be used by runtime drivers after ExitBootServices().
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ CPU IO Protocol is defined in Framework of EFI CPU IO Protocol Spec
+ Version 0.9.
+
+**/
+
+#ifndef _CPUIO_H_
+#define _CPUIO_H_
+
+#include <Protocol/CpuIo2.h>
+
+#define EFI_CPU_IO_PROTOCOL_GUID \
+ { \
+ 0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \
+ }
+
+//
+// Framework CPU IO protocol structure is the same as CPU IO 2 protocol defined in PI 1.2 spec.
+// However, there is a significant different between the Framework CPU I/O
+// Protocol and the PI 1.2 CPU I/O 2 Protocol. The Framework one is a runtime
+// protocol, which means it can be used by runtime drivers after ExitBootServices().
+// The PI one is not runtime safe, so it is a boot services only protocol and may
+// not be used by runtime drivers after ExitBootServices().
+//
+typedef EFI_CPU_IO2_PROTOCOL EFI_CPU_IO_PROTOCOL;
+
+extern EFI_GUID gEfiCpuIoProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/DataHub.h b/Core/IntelFrameworkPkg/Include/Protocol/DataHub.h new file mode 100644 index 0000000000..eb828fc6f0 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/DataHub.h @@ -0,0 +1,222 @@ +/** @file
+ The data hub protocol is used both by agents wishing to log
+ data and those wishing to be made aware of all information that
+ has been logged. This protocol may only be called <= TPL_NOTIFY.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ The Data Hub Protocol is defined in Framework for EFI Data Hub Specification
+ Version 0.9.
+
+**/
+
+#ifndef __DATA_HUB_H__
+#define __DATA_HUB_H__
+
+#define EFI_DATA_HUB_PROTOCOL_GUID \
+ { \
+ 0xae80d021, 0x618e, 0x11d4, {0xbc, 0xd7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+//
+// EFI generic Data Hub Header
+//
+// A Data Record is an EFI_DATA_RECORD_HEADER followed by RecordSize bytes of
+// data. The format of the data is defined by the DataRecordGuid.
+//
+// If EFI_DATA_RECORD_HEADER is extended in the future, the Version number and HeaderSize must
+// change.
+//
+// The logger is responcible for initializing:
+// Version, HeaderSize, RecordSize, DataRecordGuid, DataRecordClass
+//
+// The Data Hub driver is responcible for initializing:
+// LogTime and LogMonotonicCount.
+//
+#define EFI_DATA_RECORD_HEADER_VERSION 0x0100
+typedef struct {
+ UINT16 Version;
+ UINT16 HeaderSize;
+ UINT32 RecordSize;
+ EFI_GUID DataRecordGuid;
+ EFI_GUID ProducerName;
+ UINT64 DataRecordClass;
+ EFI_TIME LogTime;
+ UINT64 LogMonotonicCount;
+} EFI_DATA_RECORD_HEADER;
+
+//
+// Definition of DataRecordClass. These are used to filter out class types
+// at a very high level. The DataRecordGuid still defines the format of
+// the data. See the Data Hub Specification for rules on what can and can not be a
+// new DataRecordClass
+//
+#define EFI_DATA_RECORD_CLASS_DEBUG 0x0000000000000001
+#define EFI_DATA_RECORD_CLASS_ERROR 0x0000000000000002
+#define EFI_DATA_RECORD_CLASS_DATA 0x0000000000000004
+#define EFI_DATA_RECORD_CLASS_PROGRESS_CODE 0x0000000000000008
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_DATA_HUB_PROTOCOL EFI_DATA_HUB_PROTOCOL;
+
+/**
+ Logs a data record to the system event log.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param DataRecordGuid A GUID that indicates the format of the data passed into RawData.
+ @param ProducerName A GUID that indicates the identity of the caller to this API.
+ @param DataRecordClass This class indicates the generic type of the data record.
+ @param RawData The DataRecordGuid-defined data to be logged.
+ @param RawDataSize The size in bytes of RawData.
+
+ @retval EFI_SUCCESS Data was logged.
+ @retval EFI_OUT_OF_RESOURCES Data was not logged due to lack of system resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_LOG_DATA)(
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_GUID *DataRecordGuid,
+ IN EFI_GUID *ProducerName,
+ IN UINT64 DataRecordClass,
+ IN VOID *RawData,
+ IN UINT32 RawDataSize
+ );
+
+/**
+ Allows the system data log to be searched.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param MonotonicCount On input, it specifies the Record to return.
+ An input of zero means to return the first record,
+ as does an input of one.
+ @param FilterDriver If FilterDriver is not passed in a MonotonicCount
+ of zero, it means to return the first data record.
+ If FilterDriver is passed in, then a MonotonicCount
+ of zero means to return the first data not yet read
+ by FilterDriver.
+ @param Record Returns a dynamically allocated memory buffer with
+ a data record that matches MonotonicCount.
+
+ @retval EFI_SUCCESS Data was returned in Record.
+ @retval EFI_INVALID_PARAMETER FilterDriver was passed in but does not exist.
+ @retval EFI_NOT_FOUND MonotonicCount does not match any data record
+ in the system. If a MonotonicCount of zero was
+ passed in, then no data records exist in the system.
+ @retval EFI_OUT_OF_RESOURCES Record was not returned due to lack
+ of system resources.
+ @note Inconsistent with specification here:
+ In Framework for EFI Data Hub Specification, Version 0.9, This definition
+ is named as EFI_DATA_HUB_GET_NEXT_DATA_RECORD. The inconsistency is
+ maintained for backward compatibility.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_GET_NEXT_RECORD)(
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN OUT UINT64 *MonotonicCount,
+ IN EFI_EVENT *FilterDriver OPTIONAL,
+ OUT EFI_DATA_RECORD_HEADER **Record
+ );
+
+/**
+ Registers an event to be signaled every time a data record is logged in the system.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param FilterEvent The EFI_EVENT to signal whenever data that matches
+ FilterClass is logged in the system.
+ @param FilterTpl The maximum EFI_TPL at which FilterEvent can be
+ signaled. It is strongly recommended that you use
+ the lowest EFI_TPL possible.
+ @param FilterClass FilterEvent will be signaled whenever a bit
+ in EFI_DATA_RECORD_HEADER.DataRecordClass is also
+ set in FilterClass. If FilterClass is zero, no
+ class-based filtering will be performed.
+ @param FilterDataRecordGuid FilterEvent will be signaled whenever
+ FilterDataRecordGuid matches
+ EFI_DATA_RECORD_HEADER.DataRecordGuid.
+ If FilterDataRecordGuid is NULL, then no GUID-based
+ filtering will be performed.
+
+ @retval EFI_SUCCESS The filter driver event was registered
+ @retval EFI_ALREADY_STARTED FilterEvent was previously registered and cannot
+ be registered again.
+ @retval EFI_OUT_OF_RESOURCES The filter driver event was not registered
+ due to lack of system resources.
+ @note Inconsistent with specification here:
+ In Framework for EFI Data Hub Specification, Version 0.9, This definition
+ is named as EFI_DATA_HUB_REGISTER_DATA_FILTER_DRIVER. The inconsistency
+ is maintained for backward compatibility.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_REGISTER_FILTER_DRIVER)(
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_EVENT FilterEvent,
+ IN EFI_TPL FilterTpl,
+ IN UINT64 FilterClass,
+ IN EFI_GUID *FilterDataRecordGuid OPTIONAL
+ );
+
+/**
+ Stops a filter driver from being notified when data records are logged.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+ @param FilterEvent The EFI_EVENT to remove from the list of events to be
+ signaled every time errors are logged.
+
+ @retval EFI_SUCCESS The filter driver represented by FilterEvent was shut off.
+ @retval EFI_NOT_FOUND FilterEvent did not exist.
+ @note Inconsistent with specification here:
+ In Framework for EFI Data Hub Specification, Version 0.9, This definition
+ is named as EFI_DATA_HUB_UNREGISTER_DATA_FILTER_DRIVER. The inconsistency
+ is maintained for backward compatibility.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_UNREGISTER_FILTER_DRIVER)(
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_EVENT FilterEvent
+ );
+
+/**
+ This protocol is used to log information and register filter drivers
+ to receive data records.
+**/
+struct _EFI_DATA_HUB_PROTOCOL {
+ ///
+ /// Logs a data record.
+ ///
+ EFI_DATA_HUB_LOG_DATA LogData;
+
+ ///
+ /// Gets a data record. Used both to view the memory-based log and to
+ /// get information about which data records have been consumed by a filter driver.
+ ///
+ EFI_DATA_HUB_GET_NEXT_RECORD GetNextRecord;
+
+ ///
+ /// Allows the registration of an EFI event to act as a filter driver for all data records that are logged.
+ ///
+ EFI_DATA_HUB_REGISTER_FILTER_DRIVER RegisterFilterDriver;
+
+ ///
+ /// Used to remove a filter driver that was added with RegisterFilterDriver().
+ ///
+ EFI_DATA_HUB_UNREGISTER_FILTER_DRIVER UnregisterFilterDriver;
+};
+
+extern EFI_GUID gEfiDataHubProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/FirmwareVolume.h b/Core/IntelFrameworkPkg/Include/Protocol/FirmwareVolume.h new file mode 100644 index 0000000000..8c19f0192c --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/FirmwareVolume.h @@ -0,0 +1,346 @@ +/** @file
+ This file declares the Firmware Volume Protocol.
+
+ The Firmware Volume Protocol provides file-level access to the firmware volume.
+ Each firmware volume driver must produce an instance of the Firmware Volume
+ Protocol if the firmware volume is to be visible to the system. The Firmware
+ Volume Protocol also provides mechanisms for determining and modifying some
+ attributes of the firmware volume.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume specification.
+ Version 0.9.
+
+**/
+
+#ifndef _FIRMWARE_VOLUME_H_
+#define _FIRMWARE_VOLUME_H_
+
+
+//
+// Firmware Volume Protocol GUID definition
+//
+#define EFI_FIRMWARE_VOLUME_PROTOCOL_GUID \
+ { \
+ 0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xCD, 0x81, 0x54, 0xBD, 0x27, 0xF8 } \
+ }
+
+#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
+
+typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
+
+//
+// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
+//
+typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
+
+//
+// ************************************************************
+// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
+// ************************************************************
+//
+#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
+#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
+#define EFI_FV_READ_STATUS 0x0000000000000004ULL
+
+#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
+#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
+#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
+
+#define EFI_FV_LOCK_CAP 0x0000000000000040ULL
+#define EFI_FV_LOCK_STATUS 0x0000000000000080ULL
+#define EFI_FV_WRITE_POLICY_RELIABLE 0x0000000000000100ULL
+
+#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
+#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
+#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
+#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
+#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
+#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
+#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
+#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
+#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
+#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
+#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
+#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
+#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
+#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
+#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
+#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
+#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
+
+//
+// Protocol API definitions
+//
+
+/**
+ Retrieves attributes, insures positive polarity of attribute bits, and returns
+ resulting attributes in an output parameter.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param Attributes Output buffer containing attributes.
+
+ @retval EFI_SUCCESS The firmware volume attributes were returned.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_GET_ATTRIBUTES)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ OUT FRAMEWORK_EFI_FV_ATTRIBUTES *Attributes
+ );
+
+/**
+ Sets volume attributes
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param Attributes On input, Attributes is a pointer to an
+ EFI_FV_ATTRIBUTES containing the desired firmware
+ volume settings. On successful return, it contains
+ the new settings of the firmware volume. On
+ unsuccessful return, Attributes is not modified
+ and the firmware volume settings are not changed.
+
+ @retval EFI_INVALID_PARAMETER A bit in Attributes was invalid.
+ @retval EFI_SUCCESS The requested firmware volume attributes were set
+ and the resulting EFI_FV_ATTRIBUTES is returned in
+ Attributes.
+ @retval EFI_ACCESS_DENIED The Device is locked and does not permit modification.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_SET_ATTRIBUTES)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT FRAMEWORK_EFI_FV_ATTRIBUTES *Attributes
+ );
+
+/**
+ Read the requested file (NameGuid) or file information from the firmware volume
+ and returns data in Buffer.
+
+ @param This The EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param NameGuid The pointer to EFI_GUID, which is the filename of
+ the file to read.
+ @param Buffer The pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size
+ are returned as there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output
+ buffer is allocated from BS pool by ReadFile.
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output
+ buffer has been allocated by the caller and is being
+ passed in.
+ @param BufferSize On input: The buffer size. On output: The size
+ required to complete the read.
+ @param FoundType The pointer to the type of the file whose data
+ is returned.
+ @param FileAttributes The pointer to attributes of the file whose data
+ is returned.
+ @param AuthenticationStatus The pointer to the authentication status of the data.
+
+ @retval EFI_SUCCESS The call completed successfully.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The buffer is too small to contain the requested output.
+ The buffer filled, and the output is truncated.
+ @retval EFI_NOT_FOUND NameGuid was not found in the firmware volume.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to
+ access the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+ @retval EFI_OUT_OF_RESOURCES An allocation failure occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_READ_FILE)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT EFI_FV_FILETYPE *FoundType,
+ OUT EFI_FV_FILE_ATTRIBUTES *FileAttributes,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ Read the requested section from the specified file and returns data in Buffer.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param NameGuid Filename identifying the file from which to read.
+ @param SectionType The section type to retrieve.
+ @param SectionInstance The instance of SectionType to retrieve.
+ @param Buffer Pointer to pointer to buffer in which contents of
+ a file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size
+ are returned as there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output
+ buffer is allocated from BS pool by ReadFile.
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output
+ buffer has been allocated by the caller and is being
+ passed in.
+ @param BufferSize The pointer to the buffer size passed in, and on
+ output the size required to complete the read.
+ @param AuthenticationStatus The pointer to the authentication status of the data.
+
+ @retval EFI_SUCCESS The call completed successfully.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The buffer is too small to contain the requested output.
+ The buffer is filled and the output is truncated.
+ @retval EFI_OUT_OF_RESOURCES An allocation failure occurred.
+ @retval EFI_NOT_FOUND The name was not found in the firmware volume.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to
+ access the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_READ_SECTION)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN EFI_SECTION_TYPE SectionType,
+ IN UINTN SectionInstance,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
+
+#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
+#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
+
+typedef struct {
+ EFI_GUID *NameGuid;
+ EFI_FV_FILETYPE Type;
+ EFI_FV_FILE_ATTRIBUTES FileAttributes;
+ VOID *Buffer;
+ UINT32 BufferSize;
+} FRAMEWORK_EFI_FV_WRITE_FILE_DATA;
+
+/**
+ Write the supplied file (NameGuid) to the FV.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param NumberOfFiles Indicates the number of file records pointed to
+ by FileData.
+ @param WritePolicy Indicates the level of reliability of the write
+ with respect to things like power failure events.
+ @param FileData A pointer to an array of EFI_FV_WRITE_FILE_DATA
+ structures. Each element in the array indicates
+ a file to write, and there are NumberOfFiles
+ elements in the input array.
+
+ @retval EFI_SUCCESS The write completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The firmware volume does not have enough free
+ space to store file(s).
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to
+ access the firmware volume.
+ @retval EFI_WRITE_PROTECTED The firmware volume is configured to disallow writes.
+ @retval EFI_NOT_FOUND A delete was requested, but the requested file was
+ not found in the firmware volume.
+ @retval EFI_INVALID_PARAMETER A delete was requested with a multiple file write.
+ An unsupported WritePolicy was requested.
+ An unknown file type was specified.
+ A file system specific error has occurred.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_WRITE_FILE)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN UINT32 NumberOfFiles,
+ IN FRAMEWORK_EFI_FV_WRITE_POLICY WritePolicy,
+ IN FRAMEWORK_EFI_FV_WRITE_FILE_DATA *FileData
+ );
+
+/**
+ Given the input key, search for the next matching file in the volume.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param Key Pointer to a caller allocated buffer that contains
+ an implementation-specific key that is used to track
+ where to begin searching on successive calls.
+ @param FileType The pointer to the file type to filter for.
+ @param NameGuid The pointer to Guid filename of the file found.
+ @param Attributes The pointer to Attributes of the file found.
+ @param Size The pointer to Size in bytes of the file found.
+
+ @retval EFI_SUCCESS The output parameters are filled with data obtained from
+ the first matching file that was found.
+ @retval EFI_NOT_FOUND No files of type FileType were found.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to access
+ the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_GET_NEXT_FILE)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT VOID *Key,
+ IN OUT EFI_FV_FILETYPE *FileType,
+ OUT EFI_GUID *NameGuid,
+ OUT EFI_FV_FILE_ATTRIBUTES *Attributes,
+ OUT UINTN *Size
+ );
+
+//
+// Protocol interface structure
+//
+struct _EFI_FIRMWARE_VOLUME_PROTOCOL {
+ ///
+ /// Retrieves volume capabilities and current settings.
+ ///
+ FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
+
+ ///
+ /// Modifies the current settings of the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
+
+ ///
+ /// Reads an entire file from the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_READ_FILE ReadFile;
+
+ ///
+ /// Reads a single section from a file into a buffer.
+ ///
+ FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
+
+ ///
+ /// Writes an entire file into the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
+
+ ///
+ /// Provides service to allow searching the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
+
+ ///
+ /// Data field that indicates the size in bytes of the Key input buffer for
+ /// the GetNextFile() API.
+ ///
+ UINT32 KeySize;
+
+ ///
+ /// Handle of the parent firmware volume.
+ ///
+ EFI_HANDLE ParentHandle;
+};
+
+extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFirmwareVolumeBlock.h b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFirmwareVolumeBlock.h new file mode 100644 index 0000000000..3468ceb388 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFirmwareVolumeBlock.h @@ -0,0 +1,353 @@ +/** @file
+ This file provides control over block-oriented firmware devices.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in framework spec: Firmware Volume Block Specification.
+
+**/
+
+#ifndef __FRAMEWORK_FIRMWARE_VOLUME_BLOCK_H__
+#define __FRAMEWORK_FIRMWARE_VOLUME_BLOCK_H__
+
+#define FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID \
+{ 0xDE28BC59, 0x6228, 0x41BD, {0xBD, 0xF6, 0xA3, 0xB9, 0xAD,0xB5, 0x8D, 0xA1 } }
+
+typedef struct _FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL;
+///
+/// The type of EFI FVB attribute per the Framework specification.
+///
+typedef UINT32 EFI_FVB_ATTRIBUTES;
+
+/**
+ The GetAttributes() function retrieves the attributes and
+ current settings of the block.
+
+ @param This Indicates the FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL instance.
+
+ @param Attributes Pointer to EFI_FVB_ATTRIBUTES in which the
+ attributes and current settings are
+ returned.
+
+ @retval EFI_SUCCESS The firmware volume attributes were
+ returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * FRAMEWORK_EFI_FVB_GET_ATTRIBUTES)(
+ IN FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_FVB_ATTRIBUTES *Attributes
+);
+
+
+/**
+ The SetAttributes() function sets configurable firmware volume
+ attributes and returns the new settings of the firmware volume.
+
+ @param This Indicates the FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL instance.
+
+ @param Attributes On input, Attributes is a pointer to
+ EFI_FVB_ATTRIBUTES that contains the
+ desired firmware volume settings. On
+ successful return, it contains the new
+ settings of the firmware volume.
+
+ @retval EFI_SUCCESS The firmware volume attributes were returned.
+
+ @retval EFI_INVALID_PARAMETER The attributes requested are in
+ conflict with the capabilities
+ as declared in the firmware
+ volume header.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * FRAMEWORK_EFI_FVB_SET_ATTRIBUTES)(
+ IN FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN OUT EFI_FVB_ATTRIBUTES *Attributes
+);
+
+
+/**
+ The GetPhysicalAddress() function retrieves the base address of
+ a memory-mapped firmware volume. This function should be called
+ only for memory-mapped firmware volumes.
+
+ @param This Indicates the FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL instance.
+
+ @param Address Pointer to a caller-allocated
+ EFI_PHYSICAL_ADDRESS that, on successful
+ return from GetPhysicalAddress(), contains the
+ base address of the firmware volume.
+
+ @retval EFI_SUCCESS The firmware volume base address is returned.
+
+ @retval EFI_NOT_SUPPORTED The firmware volume is not memory mapped.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * FRAMEWORK_EFI_FVB_GET_PHYSICAL_ADDRESS)(
+ IN FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+);
+
+/**
+ The GetBlockSize() function retrieves the size of the requested
+ block. It also returns the number of additional blocks with
+ the identical size. The GetBlockSize() function is used to
+ retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER).
+
+
+ @param This Indicates the FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL instance.
+
+ @param Lba Indicates the block for which to return the size.
+
+ @param BlockSize The pointer to a caller-allocated UINTN in which
+ the size of the block is returned.
+
+ @param NumberOfBlocks The pointer to a caller-allocated UINTN in
+ which the number of consecutive blocks,
+ starting with Lba, is returned. All
+ blocks in this range have a size of
+ BlockSize.
+
+
+ @retval EFI_SUCCESS The firmware volume base address was returned.
+
+ @retval EFI_INVALID_PARAMETER The requested LBA is out of range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * FRAMEWORK_EFI_FVB_GET_BLOCK_SIZE)(
+ IN FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ OUT UINTN *BlockSize,
+ OUT UINTN *NumberOfBlocks
+);
+
+
+/**
+ Reads the specified number of bytes into a buffer from the specified block.
+
+ The Read() function reads the requested number of bytes from the
+ requested block and stores them in the provided buffer.
+ Implementations should be mindful that the firmware volume
+ might be in the ReadDisabled state. If it is in this state,
+ the Read() function must return the status code
+ EFI_ACCESS_DENIED without modifying the contents of the
+ buffer. The Read() function must also prevent spanning block
+ boundaries. If a read is requested that would span a block
+ boundary, the read must read up to the boundary but not
+ beyond. The output parameter NumBytes must be set to correctly
+ indicate the number of bytes actually read. The caller must be
+ aware that a read may be partially completed.
+
+ @param This Indicates the FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL instance.
+
+ @param Lba The starting logical block index
+ from which to read.
+
+ @param Offset Offset into the block at which to begin reading.
+
+ @param NumBytes The pointer to a UINTN. At entry, *NumBytes
+ contains the total size of the buffer. At
+ exit, *NumBytes contains the total number of
+ bytes read.
+
+ @param Buffer The pointer to a caller-allocated buffer that will
+ be used to hold the data that is read.
+
+ @retval EFI_SUCCESS The firmware volume was read successfully
+ and contents are in Buffer.
+
+ @retval EFI_BAD_BUFFER_SIZE A read was attempted across an LBA
+ boundary. On output, NumBytes
+ contains the total number of bytes
+ returned in Buffer.
+
+ @retval EFI_ACCESS_DENIED The firmware volume is in the
+ ReadDisabled state.
+
+ @retval EFI_DEVICE_ERROR The block device is not
+ functioning correctly and could
+ not be read.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FVB_READ)(
+ IN FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN OUT UINT8 *Buffer
+);
+
+/**
+ Writes the specified number of bytes from the input buffer to the block.
+
+ The Write() function writes the specified number of bytes from
+ the provided buffer to the specified block and offset. If the
+ firmware volume is sticky write, the caller must ensure that
+ all the bits of the specified range to write are in the
+ EFI_FVB_ERASE_POLARITY state before calling the Write()
+ function, or else the result will be unpredictable. This
+ unpredictability arises because, for a sticky-write firmware
+ volume, a write may negate a bit in the EFI_FVB_ERASE_POLARITY
+ state but cannot flip it back again. In general, before
+ calling the Write() function, the caller should call the
+ EraseBlocks() function first to erase the specified block to
+ write. A block erase cycle will transition bits from the
+ (NOT)EFI_FVB_ERASE_POLARITY state back to the
+ EFI_FVB_ERASE_POLARITY state. Implementors should note
+ that the firmware volume might be in the WriteDisabled
+ state. If it is in this state, the Write() function must
+ return the status code EFI_ACCESS_DENIED without modifying the
+ contents of the firmware volume. The Write() function must
+ also prevent spanning block boundaries. If a write is
+ requested that spans a block boundary, the write must store up
+ to the boundary but not beyond. The output parameter NumBytes
+ must be set to correctly indicate the number of bytes actually
+ written. The caller must be aware that a write may be
+ partially completed. All writes, partial or otherwise, must be
+ fully flushed to the hardware before the Write() service
+ returns.
+
+ @param This Indicates the FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL instance.
+
+ @param Lba The starting logical block index to write to.
+
+ @param Offset Offset into the block at which to begin writing.
+
+ @param NumBytes The pointer to a UINTN. Input: the total size of the buffer.
+ Output: the total number of bytes actually written.
+
+ @param Buffer The pointer to a caller-allocated buffer that
+ contains the source for the write.
+
+ @retval EFI_SUCCESS The firmware volume was written successfully.
+
+ @retval EFI_BAD_BUFFER_SIZE The write was attempted across an
+ LBA boundary. On output, NumBytes
+ contains the total number of bytes
+ actually written.
+
+ @retval EFI_ACCESS_DENIED The firmware volume is in the
+ WriteDisabled state.
+
+ @retval EFI_DEVICE_ERROR The block device is malfunctioning
+ and could not be written.
+
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * FRAMEWORK_EFI_FVB_WRITE)(
+ IN FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+);
+
+
+
+
+///
+/// EFI_LBA_LIST_TERMINATOR.
+///
+#define FRAMEWORK_EFI_LBA_LIST_TERMINATOR 0xFFFFFFFFFFFFFFFFULL
+
+
+/**
+ Erases and initializes a firmware volume block.
+
+ The EraseBlocks() function erases one or more blocks as denoted
+ by the variable argument list. The entire parameter list of
+ blocks must be verified before erasing any blocks. If a block is
+ requested that does not exist within the associated firmware
+ volume (it has a larger index than the last block of the
+ firmware volume), the EraseBlocks() function must return the
+ status code EFI_INVALID_PARAMETER without modifying the contents
+ of the firmware volume. Implementors should note that
+ the firmware volume might be in the WriteDisabled state. If it
+ is in this state, the EraseBlocks() function must return the
+ status code EFI_ACCESS_DENIED without modifying the contents of
+ the firmware volume. All calls to EraseBlocks() must be fully
+ flushed to the hardware before the EraseBlocks() service
+ returns.
+
+ @param This Indicates the FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL
+ instance.
+
+ @param ... A list of tuples.
+ Each tuple describes a range of LBAs to erase
+ and consists of the following:
+ - An EFI_LBA that indicates the starting LBA
+ - A UINTN that indicates the number of blocks to
+ erase
+
+ The list is terminated with an
+ EFI_LBA_LIST_TERMINATOR. For example, the
+ following indicates that two ranges of blocks
+ (5-7 and 10-11) are to be erased: EraseBlocks
+ (This, 5, 3, 10, 2, EFI_LBA_LIST_TERMINATOR);
+
+ @retval EFI_SUCCESS The erase request successfully
+ completed.
+
+ @retval EFI_ACCESS_DENIED The firmware volume is in the
+ WriteDisabled state.
+ @retval EFI_DEVICE_ERROR The block device is not functioning
+ correctly and could not be written.
+ The firmware device may have been
+ partially erased.
+ @retval EFI_INVALID_PARAMETER One or more of the LBAs listed
+ in the variable argument list do
+ not exist in the firmware volume.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * FRAMEWORK_EFI_FVB_ERASE_BLOCKS)(
+ IN FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ ...
+);
+
+///
+/// The Firmware Volume Block Protocol is the low-level interface
+/// to a firmware volume. File-level access to a firmware volume
+/// should not be done using the Firmware Volume Block Protocol.
+/// Normal access to a firmware volume must use the Firmware
+/// Volume Protocol. Typically, only the file system driver that
+/// produces the Firmware Volume Protocol will bind to the
+/// Firmware Volume Block Protocol.
+///
+struct _FRAMEWORK_EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL {
+ FRAMEWORK_EFI_FVB_GET_ATTRIBUTES GetAttributes;
+ FRAMEWORK_EFI_FVB_SET_ATTRIBUTES SetAttributes;
+ FRAMEWORK_EFI_FVB_GET_PHYSICAL_ADDRESS GetPhysicalAddress;
+ FRAMEWORK_EFI_FVB_GET_BLOCK_SIZE GetBlockSize;
+ FRAMEWORK_EFI_FVB_READ Read;
+ FRAMEWORK_EFI_FVB_WRITE Write;
+ FRAMEWORK_EFI_FVB_ERASE_BLOCKS EraseBlocks;
+ ///
+ /// The handle of the parent firmware volume.
+ ///
+ EFI_HANDLE ParentHandle;
+};
+
+extern EFI_GUID gFramerworkEfiFirmwareVolumeBlockProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFormBrowser.h b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFormBrowser.h new file mode 100644 index 0000000000..74c25e2733 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFormBrowser.h @@ -0,0 +1,175 @@ +/** @file
+ The EFI_FORM_BROWSER_PROTOCOL is the interface to the EFI
+ Configuration Driver. This interface enables the caller to direct the
+ configuration driver to use either the HII database or the passed-in
+ packet of data. This will also allow the caller to post messages
+ into the configuration drivers internal mailbox.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkFormBrowser.h
+
+ @par Revision Reference:
+ This protocol is defined in HII spec 0.92.
+
+**/
+
+#ifndef __FRAMEWORK_FORM_BROWSER_H__
+#define __FRAMEWORK_FORM_BROWSER_H__
+
+#include <Protocol/FrameworkHii.h>
+
+
+#define EFI_FORM_BROWSER_PROTOCOL_GUID \
+ { \
+ 0xe5a1333e, 0xe1b4, 0x4d55, {0xce, 0xeb, 0x35, 0xc3, 0xef, 0x13, 0x34, 0x43 } \
+ }
+
+#define EFI_FORM_BROWSER_COMPATIBILITY_PROTOCOL_GUID \
+ { \
+ 0xfb7c852, 0xadca, 0x4853, { 0x8d, 0xf, 0xfb, 0xa7, 0x1b, 0x1c, 0xe1, 0x1a } \
+ }
+
+typedef struct _EFI_FORM_BROWSER_PROTOCOL EFI_FORM_BROWSER_PROTOCOL;
+
+typedef struct {
+ UINT32 Length;
+ UINT16 Type;
+ UINT8 Data[1];
+} EFI_HII_PACKET;
+
+typedef struct {
+ EFI_HII_IFR_PACK *IfrData;
+ EFI_HII_STRING_PACK *StringData;
+} EFI_IFR_PACKET;
+
+typedef struct {
+ UINTN LeftColumn;
+ UINTN RightColumn;
+ UINTN TopRow;
+ UINTN BottomRow;
+} FRAMEWORK_EFI_SCREEN_DESCRIPTOR;
+
+/**
+ Provides direction to the configuration driver whether to use the HII
+ database or a passed-in set of data. This function also establishes a
+ pointer to the calling driver's callback interface.
+
+ @param This A pointer to the EFI_FORM_BROWSER_PROTOCOL instance.
+ @param UseDatabase Determines whether the HII database is to be
+ used to gather information. If the value is FALSE,
+ the configuration driver will get the information
+ provided in the passed-in Packet parameters.
+ @param Handle A pointer to an array of HII handles to display.
+ This value should correspond to the value of the
+ HII form package that is required to be displayed.
+ @param HandleCount The number of handles in the array specified by Handle.
+ @param Packet A pointer to a set of data containing pointers to IFR
+ and/or string data.
+ @param CallbackHandle The handle to the driver's callback interface.
+ This parameter is used only when the UseDatabase
+ parameter is FALSE and an application wants to
+ register a callback with the browser.
+ @param NvMapOverride This buffer is used only when there is no NV variable
+ to define the current settings and the caller needs
+ to provide to the browser the current settings for
+ the "fake" NV variable.
+ @param ScreenDimensions Allows the browser to be called so that it occupies
+ a portion of the physical screen instead of dynamically
+ determining the screen dimensions.
+ @param ResetRequired This BOOLEAN value denotes whether a reset is required
+ based on the data that might have been changed.
+ The ResetRequired parameter is primarily applicable
+ for configuration applications, and is an
+ optional parameter.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The variable was not found.
+ @retval EFI_BUFFER_TOO_SMALL The DataSize is too small for the result.
+ DataSize has been updated with the size needed to
+ complete the request.
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+ @retval EFI_DEVICE_ERROR The variable could not be saved due to a hardware failure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SEND_FORM)(
+ IN EFI_FORM_BROWSER_PROTOCOL *This,
+ IN BOOLEAN UseDatabase,
+ IN FRAMEWORK_EFI_HII_HANDLE *Handle,
+ IN UINTN HandleCount,
+ IN EFI_IFR_PACKET *Packet, OPTIONAL
+ IN EFI_HANDLE CallbackHandle, OPTIONAL
+ IN UINT8 *NvMapOverride, OPTIONAL
+ IN FRAMEWORK_EFI_SCREEN_DESCRIPTOR *ScreenDimensions, OPTIONAL
+ OUT BOOLEAN *ResetRequired OPTIONAL
+ );
+
+/**
+ Routine used to abstract a generic dialog interface and return the selected
+ key or string.
+
+ @param NumberOfLines The number of lines for the dialog box.
+ @param HotKey Defines whether a single character is parsed (TRUE)
+ and returned in KeyValue, or if a string is returned
+ in StringBuffer.
+ @param MaximumStringSize The maximum size in bytes of a typed-in string.
+ Because each character is a CHAR16, the minimum
+ string returned is two bytes.
+ @param StringBuffer The passed-in pointer to the buffer that will hold
+ the typed in string if HotKey is FALSE.
+ @param KeyValue The EFI_INPUT_KEY value returned if HotKey is TRUE.
+ @param String The pointer to the first string in the list of strings
+ that comprise the dialog box.
+ @param ... A series of NumberOfLines text strings that will be used
+ to construct the dialog box.
+
+ @retval EFI_SUCCESS The dialog was displayed and user interaction was received.
+ @retval EFI_DEVICE_ERROR The user typed in an ESC character to exit the routine.
+ @retval EFI_INVALID_PARAMETER One of the parameters was invalid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CREATE_POP_UP)(
+ IN UINTN NumberOfLines,
+ IN BOOLEAN HotKey,
+ IN UINTN MaximumStringSize,
+ OUT CHAR16 *StringBuffer,
+ OUT EFI_INPUT_KEY *KeyValue,
+ IN CHAR16 *String,
+ ...
+ );
+
+/**
+ The EFI_FORM_BROWSER_PROTOCOL is the interface to call for drivers to
+ leverage the EFI configuration driver interface.
+**/
+struct _EFI_FORM_BROWSER_PROTOCOL {
+ ///
+ /// Provides direction to the configuration driver whether to use the HII
+ /// database or to use a passed-in set of data. This function also establishes
+ /// a pointer to the calling driver's callback interface.
+ ///
+ EFI_SEND_FORM SendForm;
+
+ ///
+ /// Routine used to abstract a generic dialog interface and return the
+ /// selected key or string.
+ ///
+ EFI_CREATE_POP_UP CreatePopUp;
+};
+
+extern EFI_GUID gEfiFormBrowserProtocolGuid;
+extern EFI_GUID gEfiFormBrowserCompatibilityProtocolGuid;
+
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFormCallback.h b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFormCallback.h new file mode 100644 index 0000000000..e9ea49d5c0 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkFormCallback.h @@ -0,0 +1,222 @@ +/** @file
+ The EFI_FORM_CALLBACK_PROTOCOL is the defined interface for access to custom
+ NV storage devices and for communication of user selections in a more
+ interactive environment. This protocol should be published by hardware
+ specific drivers that want to export access to custom hardware storage or
+ publish IFR that need to call back the original driver.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in HII spec 0.92.
+
+**/
+
+#ifndef __FRAMEWORK_FORM_CALLBACK_H__
+#define __FRAMEWORK_FORM_CALLBACK_H__
+
+#include <Protocol/FrameworkHii.h>
+#include <Protocol/FrameworkFormBrowser.h>
+
+#define EFI_FORM_CALLBACK_PROTOCOL_GUID \
+ { \
+ 0xf3e4543d, 0xcf35, 0x6cef, {0x35, 0xc4, 0x4f, 0xe6, 0x34, 0x4d, 0xfc, 0x54 } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_FORM_CALLBACK_PROTOCOL EFI_FORM_CALLBACK_PROTOCOL;
+
+///
+/// Inconsistent with specification here:
+/// RESET_REQUIRED, EXIT_REQUIRED, SAVE_REQUIRED, NV_CHANGED and NV_NOT_CHANGED are not
+/// defined in HII specification. These Flags of EFI_IFR_DATA_ENTRY should be defined
+/// to describe the standard behavior of the browser after the callback.
+///
+/// If this flag is set, the browser will exit and reset after processing callback results.
+///
+#define RESET_REQUIRED 1
+///
+/// If this flag is set, the browser will exit after processing callback results.
+///
+#define EXIT_REQUIRED 2
+///
+/// If this flag is set, the browser will save the NV data after processing callback results.
+///
+#define SAVE_REQUIRED 4
+///
+/// If this flag is set, the browser will turn the NV flag on after processing callback results.
+///
+#define NV_CHANGED 8
+///
+/// If this flag is set, the browser will turn the NV flag off after processing callback results.
+///
+#define NV_NOT_CHANGED 16
+
+#pragma pack(1)
+typedef struct {
+ UINT8 OpCode; ///< Likely a string, numeric, or one-of
+ UINT8 Length; ///< Length of the EFI_IFR_DATA_ENTRY packet.
+ UINT16 Flags; ///< Flags settings to determine what behavior is desired from the browser after the callback.
+ VOID *Data; ///< The data in the form based on the op-code type. This is not a pointer to the data; the data follows immediately.
+ ///
+ /// If the OpCode is a OneOf or Numeric type - Data is a UINT16 value.
+ /// If the OpCode is a String type - Data is a CHAR16[x] type.
+ /// If the OpCode is a Checkbox type - Data is a UINT8 value.
+ /// If the OpCode is a NV Access type - Data is a EFI_IFR_NV_DATA structure.
+ ///
+} EFI_IFR_DATA_ENTRY;
+
+typedef struct {
+ VOID *NvRamMap; ///< If the flag of the op-code specified retrieval of a copy of the NVRAM map.
+ //
+ // this is a pointer to a buffer copy
+ //
+ UINT32 EntryCount; ///< Number of EFI_IFR_DATA_ENTRY entries.
+ //
+ // EFI_IFR_DATA_ENTRY Data[1]; // The in-line Data entries.
+ //
+} EFI_IFR_DATA_ARRAY;
+
+
+typedef union {
+ EFI_IFR_DATA_ARRAY DataArray; ///< Primarily used by those that call back to their drivers and use HII as a repository.
+ EFI_IFR_PACKET DataPacket; ///< Primarily used by those that do not use HII as a repository.
+ CHAR16 String[1]; ///< If returning an error - fill the string with null-terminated contents.
+} EFI_HII_CALLBACK_PACKET;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< Offset into the map.
+ UINT8 StorageWidth; ///< Width of the value.
+ //
+ // CHAR8 Data[1]; // The Data itself
+ //
+} EFI_IFR_NV_DATA;
+
+#pragma pack()
+//
+// The following types are currently defined:
+//
+/**
+ Returns the value of a variable.
+
+ @param This A pointer to the EFI_FORM_CALLBACK_PROTOCOL instance.
+ @param VariableName A NULL-terminated Unicode string that is the
+ name of the vendor's variable.
+ @param VendorGuid A unique identifier for the vendor.
+ @param Attributes If not NULL, a pointer to the memory location to
+ return the attribute's bit-mask for the variable.
+ @param DataSize The size in bytes of the Buffer. A size of zero causes
+ the variable to be deleted.
+ @param Buffer The buffer to return the contents of the variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The variable was not found.
+ @retval EFI_BUFFER_TOO_SMALL The DataSize is too small for the result.
+ DataSize has been updated with the size needed to complete the request.
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+ @retval EFI_DEVICE_ERROR The variable could not be saved due to a hardware failure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_NV_READ)(
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINT32 *Attributes OPTIONAL,
+ IN OUT UINTN *DataSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Sets the value of a variable.
+
+ @param This A pointer to the EFI_FORM_CALLBACK_PROTOCOL instance.
+ @param VariableName A NULL-terminated Unicode string that is the
+ name of the vendor's variable. Each VariableName
+ is unique for each VendorGuid.
+ @param VendorGuid A unique identifier for the vendor.
+ @param Attributes Attributes bit-mask to set for the variable.
+ Inconsistent with specification here:
+ Attributes data type has been changed from
+ UINT32 * to UINT32, because the input paramter is
+ not necessary to use a pointer date type.
+ @param DataSize The size in bytes of the Buffer. A size of zero causes
+ the variable to be deleted.
+ @param Buffer The buffer containing the contents of the variable.
+ @param ResetRequired Returns a value from the driver that abstracts this
+ information and will enable a system to know if a
+ system reset is required to achieve the configuration
+ changes being enabled through this function.
+
+ @retval EFI_SUCCESS The firmware has successfully stored the variable and
+ its data as defined by the Attributes.
+ @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold
+ the variable and its data.
+ @retval EFI_INVALID_PARAMETER An invalid combination of Attributes bits
+ was supplied, or the DataSize exceeds the maximum allowed.
+ @retval EFI_DEVICE_ERROR The variable could not be saved due to a hardware failure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_NV_WRITE)(
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ IN UINT32 Attributes,
+ IN UINTN DataSize,
+ IN VOID *Buffer,
+ OUT BOOLEAN *ResetRequired
+ );
+
+/**
+ This function is called to provide results data to the driver.
+
+ @param This A pointer to the EFI_FORM_CALLBACK_PROTOCOL instance.
+ @param KeyValue A unique value which is sent to the original exporting
+ driver so that it can identify the type of data
+ to expect. The format of the data tends to vary based
+ on the opcode that generated the callback.
+ @param Data A pointer to the data being sent to the original exporting driver.
+ @param Packet A pointer to a packet of information that a driver passes
+ back to the browser.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FORM_CALLBACK)(
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN UINT16 KeyValue,
+ IN EFI_IFR_DATA_ARRAY *Data,
+ OUT EFI_HII_CALLBACK_PACKET **Packet
+ );
+
+/**
+ The EFI_FORM_CALLBACK_PROTOCOL is the defined interface for access to
+ custom NVS devices as well as communication of user selections in a more
+ interactive environment. This protocol should be published by platform-specific
+ drivers that want to export access to custom hardware storage or publish IFR
+ that has a requirement to call back the original driver.
+**/
+struct _EFI_FORM_CALLBACK_PROTOCOL {
+ EFI_NV_READ NvRead; ///< The read operation to access the NV data serviced by a hardware-specific driver.
+ EFI_NV_WRITE NvWrite; ///< The write operation to access the NV data serviced by a hardware-specific driver.
+ EFI_FORM_CALLBACK Callback; ///< The function that is called from the configuration browser to communicate key value pairs.
+};
+
+extern EFI_GUID gEfiFormCallbackProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/FrameworkHii.h b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkHii.h new file mode 100644 index 0000000000..9f32805f84 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkHii.h @@ -0,0 +1,1032 @@ +/** @file
+ This file defines the Human Interface Infrastructure protocol, which is
+ used by resources that want to publish IFR/Font/String data and have it
+ collected by the Configuration engine.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Human Interface Infrastructure
+ Specification Version 0.92.
+
+**/
+
+#ifndef _FRAMEWORK_HII_H_
+#define _FRAMEWORK_HII_H_
+
+//
+// EFI_GRAPHICS_OUTPUT_BLT_PIXEL is defined in MdePkg/Protocol/GraphicsOutput.h
+//
+#include <Protocol/GraphicsOutput.h>
+///
+/// In both EDK and EDK II, there is an incompatbile change in the Framework HII protocol.
+/// This change should cause a change of GUID in both of code and HII specification. But we
+/// updated the GUID in code in EDK and EDK II. The 0.92 specification is not updated. This
+/// is a known issue.
+///
+///
+/// Note that EFI_HII_PROTOCOL_GUID is different from that defined in the Framework HII
+/// 0.92 specification because the specification changed part of HII interfaces but did not update the protocol
+/// GUID.
+///
+#define EFI_HII_PROTOCOL_GUID \
+ { \
+ 0xd7ad636e, 0xb997, 0x459b, {0xbf, 0x3f, 0x88, 0x46, 0x89, 0x79, 0x80, 0xe1} \
+ }
+
+#define EFI_HII_COMPATIBILITY_PROTOCOL_GUID \
+ { \
+ 0x5542cce1, 0xdf5c, 0x4d1b, { 0xab, 0xca, 0x36, 0x4f, 0x77, 0xd3, 0x99, 0xfb } \
+ }
+
+typedef UINT32 RELOFST;
+
+typedef struct _EFI_HII_PROTOCOL EFI_HII_PROTOCOL;
+
+///
+/// Note: Name difference between code and the Framework HII 0.92 specificaiton.
+/// Add FRAMEWORK_ prefix to avoid a name confict with EFI_HII_HANDLE, defined in the
+/// UEFI 2.1d specification.
+///
+typedef UINT16 FRAMEWORK_EFI_HII_HANDLE;
+
+///
+/// HII package type values
+///
+#define EFI_HII_FONT 1
+#define EFI_HII_STRING 2
+#define EFI_HII_IFR 3
+#define EFI_HII_KEYBOARD 4
+#define EFI_HII_HANDLES 5
+#define EFI_HII_VARIABLE 6
+#define EFI_HII_DEVICE_PATH 7
+
+//
+// References to string tokens must use this macro to enable scanning for
+// token usages.
+//
+#define STRING_TOKEN(t) t
+
+//
+// The following types are currently defined:
+// EFI_FORM_ID has been defined in UEFI spec.
+//
+typedef UINT16 EFI_FORM_LABEL;
+
+#pragma pack(1)
+
+///
+/// The header found at the start of each package.
+///
+typedef struct {
+ UINT32 Length; ///< The size of the package in bytes.
+ UINT16 Type; ///< The type of the package.
+} EFI_HII_PACK_HEADER;
+
+///
+/// The IFR package structure.
+/// Immediately following the EFI_HII_IFR_PACK structure will be a series of IFR opcodes.
+///
+typedef struct {
+ EFI_HII_PACK_HEADER Header; ///< Header of the IFR package.
+} EFI_HII_IFR_PACK;
+
+///
+/// HII Handle package structure.
+///
+typedef struct {
+ ///
+ /// Header of the package.
+ ///
+ EFI_HII_PACK_HEADER Header; ///< Must be filled in.
+ ///
+ /// The image handle of the driver to which the package is referring.
+ ///
+ EFI_HANDLE ImageHandle; ///< Must be filled in.
+ ///
+ /// The handle of the device that is being described by this package.
+ ///
+ EFI_HANDLE DeviceHandle; ///< Optional.
+ ///
+ /// The handle of the parent of the device that is being described by this package.
+ ///
+ EFI_HANDLE ControllerHandle; ///< Optional.
+ ///
+ /// The handle that was registered to receive EFI_FORM_CALLBACK_PROTOCOL calls from other drivers.
+ ///
+ EFI_HANDLE CallbackHandle; ///< Optional.
+ ///
+ /// Note this field is not defined in the Framework HII 0.92 specificaiton.
+ /// Unused. Reserved for source code compatibility.
+ ///
+ EFI_HANDLE COBExportHandle; ///< Optional.
+} EFI_HII_HANDLE_PACK;
+
+///
+/// The variable package structure.
+///
+typedef struct {
+ ///
+ /// The header of the package.
+ ///
+ EFI_HII_PACK_HEADER Header;
+ ///
+ /// The GUID of the EFI variable.
+ ///
+ EFI_GUID VariableGuid;
+ ///
+ /// The length in bytes of the EFI variable.
+ ///
+ UINT32 VariableNameLength;
+ ///
+ /// The unique value for this variable.
+ ///
+ UINT16 VariableId;
+ //
+ // CHAR16 VariableName[]; //Null-terminated
+ //
+} EFI_HII_VARIABLE_PACK;
+
+///
+/// The device path package structure.
+///
+typedef struct {
+ ///
+ /// The header of the package.
+ ///
+ EFI_HII_PACK_HEADER Header;
+ //
+ // EFI_DEVICE_PATH DevicePath[];
+ //
+} EFI_HII_DEVICE_PATH_PACK;
+
+typedef struct {
+ ///
+ /// A unique value that correlates to the original HII handle.
+ ///
+ FRAMEWORK_EFI_HII_HANDLE HiiHandle;
+ ///
+ /// If an IFR pack exists in a data table that does not contain strings,
+ /// then the strings for that IFR pack are located in another data table
+ /// that contains a string pack and has a matching HiiDataTable.PackageGuid.
+ ///
+ EFI_GUID PackageGuid;
+ ///
+ /// The size of the EFI_HII_DATA_TABLE in bytes.
+ ///
+ UINT32 DataTableSize;
+ ///
+ /// The byte offset from the start of this structure to the IFR data.
+ /// If the offset value is 0, then no IFR data is enclosed.
+ ///
+ UINT32 IfrDataOffset;
+ ///
+ /// The byte offset from the start of this structure to the string data.
+ /// If the offset value is 0, then no string data is enclosed.
+ ///
+ UINT32 StringDataOffset;
+ ///
+ /// The byte offset from the start of this structure to the variable data.
+ /// If the offset value is 0, then no variable data is enclosed.
+ ///
+ UINT32 VariableDataOffset;
+ ///
+ /// The byte offset from the start of this structure to the device path data.
+ /// If the offset value is 0, then no DevicePath data is enclosed.
+ ///
+ UINT32 DevicePathOffset;
+ ///
+ /// The number of VariableData[] elements in the array.
+ ///
+ UINT32 NumberOfVariableData;
+ ///
+ /// The number of language string packages.
+ ///
+ UINT32 NumberOfLanguages;
+ //
+ // EFI_HII_DEVICE_PATH_PACK DevicePath[];
+ // EFI_HII_VARIABLE_PACK VariableData[];
+ // EFI_HII_IFR_PACK IfrData;
+ // EFI_HII_STRING_PACK StringData[];
+ //
+} EFI_HII_DATA_TABLE;
+
+///
+/// The structure defining the format for exporting data from the HII Database.
+///
+typedef struct {
+ ///
+ /// Number of EFI_HII_DATA_TABLE entries.
+ ///
+ UINT32 NumberOfHiiDataTables;
+ ///
+ /// Defines the revision of the EFI_HII_DATA_TABLE structure.
+ ///
+ EFI_GUID Revision;
+ //
+ // EFI_HII_DATA_TABLE HiiDataTable[];
+ //
+} EFI_HII_EXPORT_TABLE;
+
+///
+/// The structure used to pass data to update a form or form package
+/// that has previously been registered with the EFI HII database.
+///
+typedef struct {
+ ///
+ /// If TRUE, indicates that the FormCallbackHandle value will
+ /// be used to update the contents of the CallBackHandle entry in the form set.
+ ///
+ BOOLEAN FormSetUpdate;
+ ///
+ /// This parameter is valid only when FormSetUpdate is TRUE.
+ /// The value in this parameter will be used to update the contents
+ /// of the CallbackHandle entry in the form set.
+ ///
+ EFI_PHYSICAL_ADDRESS FormCallbackHandle;
+ ///
+ /// If TRUE, indicates that the FormTitle contents will be
+ /// used to update the FormValue's title.
+ ///
+ BOOLEAN FormUpdate;
+ ///
+ /// Specifies which form is to be updated if the FormUpdate value is TRUE.
+ ///
+ UINT16 FormValue;
+ ///
+ /// This parameter is valid only when the FormUpdate parameter is TRUE.
+ /// The value in this parameter will be used to update the contents of the form title.
+ ///
+ STRING_REF FormTitle;
+ ///
+ /// The number of Data entries in this structure.
+ UINT16 DataCount;
+ ///
+ /// An array of 1+ opcodes, specified by DataCount.
+ ///
+ UINT8 *Data;
+} EFI_HII_UPDATE_DATA;
+
+//
+// String attributes
+//
+#define LANG_RIGHT_TO_LEFT 0x00000001
+
+///
+/// A string package is used to localize strings to a particular
+/// language. The package is associated with a particular driver
+/// or set of drivers. Tools are used to associate tokens with
+/// string references in forms and in programs. These tokens are
+/// language agnostic. When paired with a language pack (directly
+/// or indirectly), the string token resolves into an actual
+/// UNICODE string. NumStringPointers determines how many
+/// StringPointers (offset values) there are, as well as the total
+/// number of Strings that are defined.
+///
+typedef struct {
+ ///
+ /// The header of the package.
+ ///
+ EFI_HII_PACK_HEADER Header;
+ ///
+ /// The string containing one or more ISO 639-2 three-character designator(s)
+ /// of the language or languages whose translations are contained in this language pack.
+ /// The first designator indicates the primary language, while the others are secondary languages.
+ ///
+ RELOFST LanguageNameString;
+ ///
+ /// Contains the offset into this structure of a printable name of the language
+ /// for use when prompting the user. The language printed is to be the primary language.
+ ///
+ RELOFST PrintableLanguageName;
+ ///
+ /// The number of Strings and StringPointers contained within the string package.
+ ///
+ UINT32 NumStringPointers;
+ ///
+ /// Indicates the direction the language is to be printed.
+ ///
+ UINT32 Attributes;
+ //
+ // RELOFST StringPointers[];
+ // EFI_STRING Strings[];
+ //
+} EFI_HII_STRING_PACK;
+
+
+///
+/// A font list consists of a font header followed by a series
+/// of glyph structures. Note that fonts are not language specific.
+///
+typedef struct {
+ ///
+ /// The header of the package.
+ ///
+ EFI_HII_PACK_HEADER Header;
+ ///
+ /// The number of NarrowGlyphs that are included in the font package.
+ ///
+ UINT16 NumberOfNarrowGlyphs;
+ ///
+ /// The number of WideGlyphs that are included in the font package.
+ ///
+ UINT16 NumberOfWideGlyphs;
+ //EFI_NARROW_GLYPH NarrowGlyphs[];
+ //EFI_WIDE_GLYPH WideGlyphs[];
+} EFI_HII_FONT_PACK;
+
+///
+/// The definition of a specific physical key
+///
+/// Note: The name difference between code and the Framework HII 0.92 specification.
+/// Add FRAMEWORK_ prefix to avoid name confict with EFI_KEY_DESCRIPTOR defined in the
+/// UEFI 2.1d specification.
+///
+typedef struct {
+ ///
+ /// Used to describe a physical key on a keyboard.
+ ///
+ EFI_KEY Key;
+ ///
+ /// The Unicode value for the Key.
+ CHAR16 Unicode;
+ ///
+ /// The Unicode value for the key with the shift key being held down.
+ ///
+ CHAR16 ShiftedUnicode;
+ ///
+ /// The Unicode value for the key with the Alt-GR being held down.
+ ///
+ CHAR16 AltGrUnicode;
+ ///
+ /// The Unicode value for the key with the Alt-GR and shift keys being held down.
+ ///
+ CHAR16 ShiftedAltGrUnicode;
+ ///
+ /// Modifier keys are defined to allow for special functionality that
+ /// is not necessarily accomplished by a printable character.
+ ///
+ UINT16 Modifier;
+} FRAMEWORK_EFI_KEY_DESCRIPTOR;
+
+///
+/// This structure allows a sparse set of keys to be redefined
+/// or a complete redefinition of the keyboard layout. Most
+/// keyboards have a lot of commonality in their layouts, therefore
+/// only defining those keys that need to change from the default
+/// minimizes the passed in information.
+///
+/// Additionally, when an update occurs, the active keyboard layout
+/// will be switched to the newly updated keyboard layout. This
+/// allows for situations that when a keyboard layout driver is
+/// loaded as part of system initialization, the system will default
+/// the keyboard behavior to the new layout.
+///
+typedef struct {
+ ///
+ /// The header of the package.
+ EFI_HII_PACK_HEADER Header;
+ ///
+ /// A pointer to a buffer containing an array of EFI_KEY_DESCRIPTOR entries.
+ /// Each entry will reflect the definition of a specific physical key.
+ ///
+ FRAMEWORK_EFI_KEY_DESCRIPTOR *Descriptor;
+ ///
+ /// The number of Descriptor entries being described.
+ ///
+ UINT8 DescriptorCount;
+} EFI_HII_KEYBOARD_PACK;
+
+///
+/// The packages structure that will be used to pass contents into the HII database.
+///
+/// The EFI_HII_PACKAGES can contain various number of packages of different types just
+/// after the structure as inline data.
+///
+typedef struct {
+ ///
+ /// The number of packages being defined in this structure.
+ ///
+ UINTN NumberOfPackages;
+ ///
+ /// The GUID to be used to identify this set of packages that are being exported
+ /// to the HII database.
+ ///
+ EFI_GUID *GuidId;
+ //
+ // EFI_HII_HANDLE_PACK *HandlePack; // Only one pack.
+ // EFI_HII_IFR_PACK *IfrPack; // Only one pack.
+ // EFI_HII_FONT_PACK *FontPack[]; // Multiple packs ok
+ // EFI_HII_STRING_PACK *StringPack[]; // Multiple packs ok
+ // EFI_HII_KEYBOARD_PACK *KeyboardPack[]; // Multiple packs ok
+ //
+} EFI_HII_PACKAGES;
+
+///
+/// The packed link list that contains all the discernable defaults of variables
+/// for the opcodes that are defined in this Handle's domain of data.
+///
+typedef struct _EFI_HII_VARIABLE_PACK_LIST {
+ ///
+ /// A pointer points to the next data structure of type
+ /// EFI_HII_VARIABLE_PACK_LIST in the packed link list.
+ ///
+ struct _EFI_HII_VARIABLE_PACK_LIST *NextVariablePack;
+ ///
+ /// A pointer points to the content of the variable entry defined by GUID/name/data.
+ ///
+ EFI_HII_VARIABLE_PACK *VariablePack;
+ //EFI_HII_VARIABLE_PACK Content
+} EFI_HII_VARIABLE_PACK_LIST;
+
+
+#pragma pack()
+
+/**
+ Registers the various packs that are passed in via the Packages parameter.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Packages A pointer to an EFI_HII_PACKAGES package instance.
+ @param Handle A pointer to the FRAMEWORK_EFI_HII_HANDLE instance.
+
+ @retval EFI_SUCCESS Data was extracted from Packages, the database
+ was updated with the data, and Handle returned successfully.
+ @retval EFI_INVALID_PARAMETER The content of Packages was invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_NEW_PACK)(
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_PACKAGES *Packages,
+ OUT FRAMEWORK_EFI_HII_HANDLE *Handle
+ );
+
+/**
+ Removes a package from the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle that was registered to the data that
+ is requested for removal.
+
+ @retval EFI_SUCCESS The data associated with the Handle was removed
+ from the HII database.
+ @retval EFI_INVALID_PARAMETER The Handle was not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_REMOVE_PACK)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle
+ );
+
+/**
+ Determines the handles that are currently active in the database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param HandleBufferLength On input, a pointer to the length of the handle
+ buffer. On output, the length of the handle buffer that is required
+ for the handles found.
+ @param Handle An array of FRAMEWORK_EFI_HII_HANDLE instances returned.
+
+ @retval EFI_SUCCESS Handle was updated successfully.
+ @retval EFI_BUFFER_TOO_SMALL The HandleBufferLength parameter indicates
+ that Handle is too small to support the number of handles.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_FIND_HANDLES)(
+ IN EFI_HII_PROTOCOL *This,
+ IN OUT UINT16 *HandleBufferLength,
+ OUT FRAMEWORK_EFI_HII_HANDLE *Handle
+ );
+
+/**
+ Exports the contents of the database into a buffer.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle A FRAMEWORK_EFI_HII_HANDLE that corresponds to the desired
+ handle to export. If the value is 0, the entire database will be exported.
+ The data is exported in a format described by the
+ structure definition of EFI_HII_EXPORT_TABLE.
+ @param BufferSize
+ On input, a pointer to the length of the buffer. On output, the length
+ of the buffer that is required for the export data.
+ @param Buffer A pointer to a buffer that will contain the results of the export function.
+
+ @retval EFI_SUCCESS The buffer was successfully filled with BufferSize amount of data.
+ @retval EFI_BUFFER_TOO_SMALL The value in BufferSize was too small to contain the export data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_EXPORT)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Remove any new strings that were added after the initial string export
+ for this handle.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the string resides.
+
+ @retval EFI_SUCCESS Successfully removed strings from the handle.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_RESET_STRINGS)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle
+ );
+
+/**
+ Tests if all of the characters in a string have corresponding font characters.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param StringToTest A pointer to a Unicode string.
+ @param FirstMissing A pointer to an index into the string. On input,
+ the index of the first character in the StringToTest
+ to examine. On exit, the index of the first character
+ encountered for which a glyph is unavailable.
+ If all glyphs in the string are available, the
+ index is the index of the terminator of the string.
+ @param GlyphBufferSize A pointer to a value. On output, if the function
+ returns EFI_SUCCESS, it contains the amount of
+ memory that is required to store the string's
+ glyph equivalent.
+
+ @retval EFI_SUCCESS All glyphs are available. Note that an empty string
+ always returns this value.
+ @retval EFI_NOT_FOUND A glyph was not found for a character.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_TEST_STRING)(
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *StringToTest,
+ IN OUT UINT32 *FirstMissing,
+ OUT UINT32 *GlyphBufferSize
+ );
+
+/**
+ Translates a Unicode character into the corresponding font glyph.
+
+ Note that this function prototype name is different from that in the Framework HII 0.92 specification
+ to avoid name confict with EFI_HII_GET_GLYPH defined in the UEFI 2.1d specification.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Source A pointer to a Unicode string.
+ @param Index On input, the offset into the string from which to
+ fetch the character. On successful completion, the
+ index is updated to the first character past the
+ character(s) making up the just extracted glyph.
+ @param GlyphBuffer Pointer to an array where the glyphs corresponding
+ to the characters in the source may be stored.
+ GlyphBuffer is assumed to be wide enough to accept
+ a wide glyph character.
+ @param BitWidth If EFI_SUCCESS was returned, the UINT16 pointed to by
+ this value is filled with the length of the glyph in
+ pixels. It is unchanged if the call was unsuccessful.
+ @param InternalStatus The cell pointed to by this parameter must be
+ initialized to zero prior to invoking the call the
+ first time for any string.
+
+ @retval EFI_SUCCESS Found the corresponding font glyph for a Unicode
+ character.
+ @retval EFI_NOT_FOUND A glyph for a character was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_HII_GET_GLYPH)(
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *Source,
+ IN OUT UINT16 *Index,
+ OUT UINT8 **GlyphBuffer,
+ OUT UINT16 *BitWidth,
+ IN OUT UINT32 *InternalStatus
+ );
+
+/**
+ Translates a glyph into the format required for input to the Universal
+ Graphics Adapter (UGA) Block Transfer (BLT) routines.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param GlyphBuffer A pointer to the buffer that contains glyph data.
+ @param Foreground The foreground setting requested to be used for the
+ generated BltBuffer data.
+ @param Background The background setting requested to be used for the
+ generated BltBuffer data.
+ @param Count The entry in the BltBuffer upon which to act.
+ @param Width The width in bits of the glyph being converted.
+ @param Height The height in bits of the glyph being converted
+ @param BltBuffer A pointer to the buffer that contains the data that is
+ ready to be used by the UGA BLT routines.
+
+ @retval EFI_SUCCESS Successfully translated a glyph into the required
+ format for input to UGA BLT routines.
+ @retval EFI_NOT_FOUND A glyph for a character was not found.
+ @note Inconsistent with specification here:
+ In Framework Spec, HII specification 0.92. The type of 3rd, 4th and 8th parameter is EFI_UGA_PIXEL.
+ Here the definition uses the EFI_GRAPHICS_OUTPUT_BLT_PIXEL, which is defined in UEFI 2.1 specification.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GLYPH_TO_BLT)(
+ IN EFI_HII_PROTOCOL *This,
+ IN UINT8 *GlyphBuffer,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL Foreground,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background,
+ IN UINTN Count,
+ IN UINTN Width,
+ IN UINTN Height,
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer
+ );
+
+/**
+ Allows a new string to be added to an already existing string package.
+
+ Note that this function prototype name is different from that in the Framework HII 0.92 specification
+ to avoid name confict with EFI_HII_NEW_STRING defined in the UEFI 2.1d specification.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Pointer to a NULL-terminated string containing a single
+ ISO 639-2 language identifier, indicating the language
+ in which the string is translated.
+ @param Handle The handle of the language pack to which the string
+ is to be added.
+ @param Reference The identifier of the string to be added. If the
+ reference value is zero, then the string will be
+ assigned a new identifier on that handle for
+ the language specified. Otherwise, the string will
+ be updated with the NewString Value.
+ @param NewString The string to be added.
+
+ @retval EFI_SUCCESS The string was effectively registered.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_HII_NEW_STRING)(
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *Language,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN OUT STRING_REF *Reference,
+ IN CHAR16 *NewString
+ );
+
+/**
+ Allows a program to determine the primary languages that are supported
+ on a given handle.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the strings reside.
+ @param LanguageString A string allocated by GetPrimaryLanguages() that
+ contains a list of all primary languages registered
+ on the handle.
+
+ @retval EFI_SUCCESS LanguageString was correctly returned.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_PRI_LANGUAGES)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ OUT EFI_STRING *LanguageString
+ );
+
+/**
+ Allows a program to determine which secondary languages are supported
+ on a given handle for a given primary language.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the strings reside.
+ @param PrimaryLanguage Pointer to a NULL-terminated string containing a
+ single ISO 639-2 language identifier, indicating
+ the primary language.
+ @param LanguageString A string allocated by GetSecondaryLanguages()
+ containing a list of all secondary languages
+ registered on the handle.
+
+ @retval EFI_SUCCESS LanguageString was correctly returned.
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_SEC_LANGUAGES)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN CHAR16 *PrimaryLanguage,
+ OUT EFI_STRING *LanguageString
+ );
+
+/**
+ Extracts a string from a package already registered with the EFI HII database.
+
+ Note that this function prototype name is different from that in the Framework HII 0.92 specification
+ to avoid name confict with EFI_HII_GET_STRING defined in the UEFI 2.1d specification.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the string resides.
+ @param Token The string token assigned to the string.
+ @param Raw If TRUE, the string is returned unedited in the
+ internal storage format. If false, the string
+ returned is edited by replacing <cr> with <space>
+ and by removing special characters such as the
+ <wide> prefix.
+ @param LanguageString Pointer to a NULL-terminated string containing a
+ single ISO 639-2 language identifier, indicating
+ the language to print. If the LanguageString is
+ empty (starts with a NULL), the default system
+ language will be used to determine the language.
+ @param BufferLength Length of the StringBuffer.
+ @param StringBuffer The buffer designed to receive the characters in the string.
+
+ @retval EFI_SUCCESS StringBuffer is filled with a NULL-terminated string.
+ @retval EFI_INVALID_PARAMETER The handle or string token is unknown.
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough to
+ allow the entire string to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_HII_GET_STRING)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN STRING_REF Token,
+ IN BOOLEAN Raw,
+ IN CHAR16 *LanguageString,
+ IN OUT UINTN *BufferLength,
+ OUT EFI_STRING StringBuffer
+ );
+
+/**
+ Allows a program to extract a part of a string of not more than a given width.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The handle on which the string resides.
+ @param Token The string token assigned to the string.
+ @param Index On input, the offset into the string where the
+ line is to start. On output, the index is updated
+ to point beyond the last character returned in
+ the call.
+ @param LineWidth The maximum width of the line in units of narrow glyphs.
+ @param LanguageString The pointer to a NULL-terminated string containing a
+ single ISO 639-2 language identifier, indicating
+ the language to print.
+ @param BufferLength The pointer to the length of the StringBuffer.
+ @param StringBuffer The buffer designed to receive the characters in
+ the string.
+
+ @retval EFI_SUCCESS StringBuffer filled with characters that will fit
+ on the line.
+ @retval EFI_NOT_FOUND The font glyph for at least one of the characters in
+ the string is not in the font database.
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough
+ to allow the entire string to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_LINE)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN STRING_REF Token,
+ IN OUT UINT16 *Index,
+ IN UINT16 LineWidth,
+ IN CHAR16 *LanguageString,
+ IN OUT UINT16 *BufferLength,
+ OUT EFI_STRING StringBuffer
+ );
+
+/**
+ Allows a program to extract a form or form package that has previously
+ been registered with the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle Handle on which the form resides.
+ @param FormId The ID of the form to return. If the ID is zero,
+ the entire form package is returned.
+ @param BufferLength On input, the length of the Buffer. On output,
+ the length of the returned buffer,
+ @param Buffer The buffer designed to receive the form(s).
+
+ @retval EFI_SUCCESS Buffer filled with the requested forms. BufferLength
+ was updated.
+ @retval EFI_INVALID_PARAMETER The handle is unknown.
+ @retval EFI_NOT_FOUND A form on the requested handle cannot be found with
+ the requested FormId.
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough
+ to allow the form to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_FORMS)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN EFI_FORM_ID FormId,
+ IN OUT UINTN *BufferLength,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Extracts the defaults that are associated with a given handle in the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle The HII handle from which will have default data retrieved.
+ @param DefaultMask The mask used to specify some type of default
+ override when extracting the default image data.
+ @param VariablePackList An indirect pointer to the first entry of a link
+ list with type EFI_HII_VARIABLE_PACK_LIST.
+
+ @retval EFI_SUCCESS The VariablePackList was populated with the appropriate
+ default setting data.
+ @retval EFI_NOT_FOUND The IFR does not have any explicit or default map(s).
+ @retval EFI_INVALID_PARAMETER The HII database entry associated with Handle
+ contains invalid data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_DEFAULT_IMAGE)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN UINTN DefaultMask,
+ OUT EFI_HII_VARIABLE_PACK_LIST **VariablePackList
+ );
+
+/**
+ Allows the caller to update a form or form package that has previously been
+ registered with the EFI HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param Handle Handle of the package where the form to be updated resides.
+ @param Label The label inside the form package where the update is to take place.
+ @param AddData If TRUE, adding data at a given Label; otherwise,
+ if FALSE, removing data at a given Label.
+ @param Data The buffer containing the new tags to insert after the Label
+
+ @retval EFI_SUCCESS The form was updated with the new tags.
+ @retval EFI_INVALID_PARAMETER The buffer for the buffer length does not
+ contain an integral number of tags.
+ @retval EFI_NOT_FOUND The Handle, Label, or FormId was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_UPDATE_FORM)(
+ IN EFI_HII_PROTOCOL *This,
+ IN FRAMEWORK_EFI_HII_HANDLE Handle,
+ IN EFI_FORM_LABEL Label,
+ IN BOOLEAN AddData,
+ IN EFI_HII_UPDATE_DATA *Data
+ );
+
+/**
+ Retrieves the current keyboard layout.
+
+ Note that this function prototype name is different from that in the Framework HII 0.92 specification
+ to avoid name confict with EFI_HII_GET_KEYBOARD_LAYOUT defined in the UEFI 2.1d specification.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+ @param DescriptorCount A pointer to the number of Descriptor entries being
+ described in the keyboard layout being retrieved.
+ @param Descriptor A pointer to a buffer containing an array of
+ FRAMEWORK_EFI_KEY_DESCRIPTOR entries. Each entry
+ will reflect the definition of a specific physical key.
+
+ @retval EFI_SUCCESS The keyboard layout was retrieved successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_HII_GET_KEYBOARD_LAYOUT)(
+ IN EFI_HII_PROTOCOL *This,
+ OUT UINT16 *DescriptorCount,
+ OUT FRAMEWORK_EFI_KEY_DESCRIPTOR *Descriptor
+ );
+
+///
+/// The HII Protocol manages the HII database, which is a repository for data
+/// having to do with fonts, strings, forms, keyboards, and other future human
+/// interface items.
+///
+struct _EFI_HII_PROTOCOL {
+ ///
+ /// Extracts the various packs from a package list.
+ ///
+ EFI_HII_NEW_PACK NewPack;
+
+ ///
+ /// Removes a package from the HII database.
+ ///
+ EFI_HII_REMOVE_PACK RemovePack;
+
+ ///
+ /// Determines the handles that are currently active in the database.
+ ///
+ EFI_HII_FIND_HANDLES FindHandles;
+
+ ///
+ /// Exports the entire contents of the database to a buffer.
+ ///
+ EFI_HII_EXPORT ExportDatabase;
+
+ ///
+ /// Tests if all of the characters in a string have corresponding font characters.
+ ///
+ EFI_HII_TEST_STRING TestString;
+
+ ///
+ /// Translates a Unicode character into the corresponding font glyph.
+ ///
+ FRAMEWORK_EFI_HII_GET_GLYPH GetGlyph;
+
+ ///
+ /// Converts a glyph value into a format that is ready for a UGA BLT command.
+ ///
+ EFI_HII_GLYPH_TO_BLT GlyphToBlt;
+
+ ///
+ /// Allows a new string to be added to an already existing string package.
+ ///
+ FRAMEWORK_EFI_HII_NEW_STRING NewString;
+
+ ///
+ /// Allows a program to determine the primary languages that are supported
+ /// on a given handle.
+ ///
+ EFI_HII_GET_PRI_LANGUAGES GetPrimaryLanguages;
+
+ ///
+ /// Allows a program to determine which secondary languages are supported
+ /// on a given handle for a given primary language.
+ ///
+ EFI_HII_GET_SEC_LANGUAGES GetSecondaryLanguages;
+
+ ///
+ /// Extracts a string from a package that is already registered with the
+ /// EFI HII database.
+ ///
+ FRAMEWORK_EFI_HII_GET_STRING GetString;
+
+ ///
+ /// Removes any new strings that were added after the initial string export
+ /// for this handle.
+ ///
+ /// Note this function is not defined in the Framework HII 0.92 specification.
+ ///
+ EFI_HII_RESET_STRINGS ResetStrings;
+
+ ///
+ /// Allows a program to extract a part of a string of not more than a given width.
+ ///
+ EFI_HII_GET_LINE GetLine;
+
+ ///
+ /// Allows a program to extract a form or form package that has been previously registered.
+ ///
+ EFI_HII_GET_FORMS GetForms;
+
+ ///
+ /// Allows a program to extract the nonvolatile image that represents the default storage image.
+ ///
+ EFI_HII_GET_DEFAULT_IMAGE GetDefaultImage;
+
+ ///
+ /// Allows a program to update a previously registered form.
+ ///
+ EFI_HII_UPDATE_FORM UpdateForm;
+
+ ///
+ /// Allows a program to extract the current keyboard layout.
+ ///
+ FRAMEWORK_EFI_HII_GET_KEYBOARD_LAYOUT GetKeyboardLayout;
+};
+
+extern EFI_GUID gEfiHiiProtocolGuid;
+extern EFI_GUID gEfiHiiCompatibilityProtocolGuid;
+
+#endif
+
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/FrameworkMpService.h b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkMpService.h new file mode 100644 index 0000000000..b1c8f55154 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/FrameworkMpService.h @@ -0,0 +1,662 @@ +/** @file
+ When installed, the Framework MP Services Protocol produces a collection of
+ services that are needed for MP management, such as initialization and management
+ of application processors.
+
+ @par Note:
+ This protocol has been deprecated and has been replaced by the MP Services
+ Protocol from the UEFI Platform Initialization Specification 1.2, Volume 2:
+ Driver Execution Environment Core Interface.
+
+ The MP Services Protocol provides a generalized way of performing following tasks:
+ - Retrieving information of multi-processor environment and MP-related status of
+ specific processors.
+ - Dispatching user-provided function to APs.
+ - Maintain MP-related processor status.
+
+ The MP Services Protocol must be produced on any system with more than one logical
+ processor.
+
+ The Protocol is available only during boot time.
+
+ MP Services Protocol is hardware-independent. Most of the logic of this protocol
+ is architecturally neutral. It abstracts the multi-processor environment and
+ status of processors, and provides interfaces to retrieve information, maintain,
+ and dispatch.
+
+ MP Services Protocol may be consumed by ACPI module. The ACPI module may use this
+ protocol to retrieve data that are needed for an MP platform and report them to OS.
+ MP Services Protocol may also be used to program and configure processors, such
+ as MTRR synchronization for memory space attributes setting in DXE Services.
+ MP Services Protocol may be used by non-CPU DXE drivers to speed up platform boot
+ by taking advantage of the processing capabilities of the APs, for example, using
+ APs to help test system memory in parallel with other device initialization.
+ Diagnostics applications may also use this protocol for multi-processor.
+
+Copyright (c) 1999 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _FRAMEWORK_MP_SERVICE_PROTOCOL_H_
+#define _FRAMEWORK_MP_SERVICE_PROTOCOL_H_
+
+#include <FrameworkDxe.h>
+
+///
+/// Global ID for the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL.
+///
+#define FRAMEWORK_EFI_MP_SERVICES_PROTOCOL_GUID \
+ { \
+ 0xf33261e7, 0x23cb, 0x11d5, {0xbd, 0x5c, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81} \
+ }
+
+///
+/// Forward declaration for the EFI_MP_SERVICES_PROTOCOL.
+///
+typedef struct _FRAMEWORK_EFI_MP_SERVICES_PROTOCOL FRAMEWORK_EFI_MP_SERVICES_PROTOCOL;
+
+///
+/// Fixed delivery mode that may be used as the DeliveryMode parameter in SendIpi().
+///
+#define DELIVERY_MODE_FIXED 0x0
+
+///
+/// Lowest priority delivery mode that may be used as the DeliveryMode parameter in SendIpi().
+///
+#define DELIVERY_MODE_LOWEST_PRIORITY 0x1
+
+///
+/// SMI delivery mode that may be used as the DeliveryMode parameter in SendIpi().
+///
+#define DELIVERY_MODE_SMI 0x2
+
+///
+/// Remote read delivery mode that may be used as the DeliveryMode parameter in SendIpi().
+///
+#define DELIVERY_MODE_REMOTE_READ 0x3
+
+///
+/// NMI delivery mode that may be used as the DeliveryMode parameter in SendIpi().
+///
+#define DELIVERY_MODE_NMI 0x4
+
+///
+/// INIT delivery mode that may be used as the DeliveryMode parameter in SendIpi().
+///
+#define DELIVERY_MODE_INIT 0x5
+
+///
+/// Startup IPI delivery mode that may be used as the DeliveryMode parameter in SendIpi().
+///
+#define DELIVERY_MODE_SIPI 0x6
+
+///
+/// The DeliveryMode parameter in SendIpi() must be less than this maximum value.
+///
+#define DELIVERY_MODE_MAX 0x7
+
+///
+/// IPF specific value for the state field of the Self Test State Parameter.
+///
+#define EFI_MP_HEALTH_FLAGS_STATUS_HEALTHY 0x0
+
+///
+/// IPF specific value for the state field of the Self Test State Parameter.
+///
+#define EFI_MP_HEALTH_FLAGS_STATUS_PERFORMANCE_RESTRICTED 0x1
+
+///
+/// IPF specific value for the state field of the Self Test State Parameter.
+///
+#define EFI_MP_HEALTH_FLAGS_STATUS_FUNCTIONALLY_RESTRICTED 0x2
+
+typedef union {
+ ///
+ /// Bitfield structure for the IPF Self Test State Parameter.
+ ///
+ struct {
+ UINT32 Status:2;
+ UINT32 Tested:1;
+ UINT32 Reserved1:13;
+ UINT32 VirtualMemoryUnavailable:1;
+ UINT32 Ia32ExecutionUnavailable:1;
+ UINT32 FloatingPointUnavailable:1;
+ UINT32 MiscFeaturesUnavailable:1;
+ UINT32 Reserved2:12;
+ } Bits;
+ ///
+ /// IA32 and X64 BIST data of the processor.
+ ///
+ UINT32 Uint32;
+} EFI_MP_HEALTH_FLAGS;
+
+typedef struct {
+ ///
+ /// @par IA32, X64:
+ /// BIST (built-in self-test) data of the processor.
+ ///
+ /// @par IPF:
+ /// Lower 32 bits of the self-test state parameter. For definition of self-test
+ /// state parameter, please refer to Intel(R) Itanium(R) Architecture Software
+ /// Developer's Manual, Volume 2: System Architecture.
+ ///
+ EFI_MP_HEALTH_FLAGS Flags;
+ ///
+ /// @par IA32, X64:
+ /// Not used.
+ ///
+ /// @par IPF:
+ /// Higher 32 bits of self test state parameter.
+ ///
+ UINT32 TestStatus;
+} EFI_MP_HEALTH;
+
+typedef enum {
+ EfiCpuAP = 0, ///< The CPU is an AP (Application Processor).
+ EfiCpuBSP, ///< The CPU is the BSP (Boot-Strap Processor).
+ EfiCpuDesignationMaximum
+} EFI_CPU_DESIGNATION;
+
+typedef struct {
+ ///
+ /// @par IA32, X64:
+ /// The lower 8 bits contains local APIC ID, and higher bits are reserved.
+ ///
+ /// @par IPF:
+ /// The lower 16 bits contains id/eid as physical address of local SAPIC
+ /// unit, and higher bits are reserved.
+ ///
+ UINT32 ApicID;
+ ///
+ /// This field indicates whether the processor is enabled. If the value is
+ /// TRUE, then the processor is enabled. Otherwise, it is disabled.
+ ///
+ BOOLEAN Enabled;
+ ///
+ /// This field indicates whether the processor is playing the role of BSP.
+ /// If the value is EfiCpuAP, then the processor is AP. If the value is
+ /// EfiCpuBSP, then the processor is BSP.
+ ///
+ EFI_CPU_DESIGNATION Designation;
+ ///
+ /// @par IA32, X64:
+ /// The Flags field of this EFI_MP_HEALTH data structure holds BIST (built-in
+ /// self test) data of the processor. The TestStatus field is not used, and
+ /// the value is always zero.
+ ///
+ /// @par IPF:
+ /// Bit format of this field is the same as the definition of self-test state
+ /// parameter, in Intel(R) Itanium(R) Architecture Software Developer's Manual,
+ /// Volume 2: System Architecture.
+ ///
+ EFI_MP_HEALTH Health;
+ ///
+ /// Zero-based physical package number that identifies the cartridge of the
+ /// processor.
+ ///
+ UINTN PackageNumber;
+ ///
+ /// Zero-based physical core number within package of the processor.
+ ///
+ UINTN NumberOfCores;
+ ///
+ /// Zero-based logical thread number within core of the processor.
+ ///
+ UINTN NumberOfThreads;
+ ///
+ /// This field is reserved.
+ ///
+ UINT64 ProcessorPALCompatibilityFlags;
+ ///
+ /// @par IA32, X64:
+ /// This field is not used, and the value is always zero.
+ ///
+ /// @par IPF:
+ /// This field is a mask number that is handed off by the PAL about which
+ /// processor tests are performed and which are masked.
+ ///
+ UINT64 ProcessorTestMask;
+} EFI_MP_PROC_CONTEXT;
+
+/**
+ This service retrieves general information of multiprocessors in the system.
+
+ This function is used to get the following information:
+ - Number of logical processors in system
+ - Maximal number of logical processors supported by system
+ - Number of enabled logical processors.
+ - Rendezvous interrupt number (IPF-specific)
+ - Length of the rendezvous procedure.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[out] NumberOfCPUs The pointer to the total number of logical processors
+ in the system, including the BSP and disabled
+ APs. If NULL, this parameter is ignored.
+ @param[out] MaximumNumberOfCPUs Pointer to the maximum number of processors
+ supported by the system. If NULL, this
+ parameter is ignored.
+ @param[out] NumberOfEnabledCPUs The pointer to the number of enabled logical
+ processors that exist in system, including
+ the BSP. If NULL, this parameter is ignored.
+ @param[out] RendezvousIntNumber This parameter is only meaningful for IPF.
+ - IA32, X64: The returned value is zero.
+ If NULL, this parameter is ignored.
+ - IPF: Pointer to the rendezvous interrupt
+ number that is used for AP wake-up.
+ @param[out] RendezvousProcLength The pointer to the length of rendezvous procedure.
+ - IA32, X64: The returned value is 0x1000.
+ If NULL, this parameter is ignored.
+ - IPF: The returned value is zero.
+
+ @retval EFI_SUCCESS Multiprocessor general information was successfully retrieved.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MP_SERVICES_GET_GENERAL_MP_INFO)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ OUT UINTN *NumberOfCPUs OPTIONAL,
+ OUT UINTN *MaximumNumberOfCPUs OPTIONAL,
+ OUT UINTN *NumberOfEnabledCPUs OPTIONAL,
+ OUT UINTN *RendezvousIntNumber OPTIONAL,
+ OUT UINTN *RendezvousProcLength OPTIONAL
+ );
+
+/**
+ This service gets detailed MP-related information of the requested processor.
+
+ This service gets detailed MP-related information of the requested processor
+ at the instant this call is made. Note the following:
+ - The processor information may change during the course of a boot session.
+ - The data of information presented here is entirely MP related.
+ Information regarding the number of caches and their sizes, frequency of operation,
+ slot numbers is all considered platform-related information and will not be
+ presented here.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[in] ProcessorNumber The handle number of the processor. The range
+ is from 0 to the total number of logical
+ processors minus 1. The total number of
+ logical processors can be retrieved by
+ GetGeneralMPInfo().
+ @param[in,out] BufferLength On input, pointer to the size in bytes of
+ ProcessorContextBuffer. On output, if the
+ size of ProcessorContextBuffer is not large
+ enough, the value pointed by this parameter
+ is updated to size in bytes that is needed.
+ If the size of ProcessorContextBuffer is
+ sufficient, the value is not changed from
+ input.
+ @param[out] ProcessorContextBuffer The pointer to the buffer where the data of
+ requested processor will be deposited.
+ The buffer is allocated by caller.
+
+ @retval EFI_SUCCESS Processor information was successfully returned.
+ @retval EFI_BUFFER_TOO_SMALL The size of ProcessorContextBuffer is too small.
+ The value pointed by BufferLength has been updated
+ to size in bytes that is needed.
+ @retval EFI_INVALID_PARAMETER IA32, X64:BufferLength is NULL.
+ @retval EFI_INVALID_PARAMETER IA32, X64:ProcessorContextBuffer is NULL.
+ @retval EFI_INVALID_PARAMETER IA32, X64:Processor with the handle specified by
+ ProcessorNumber does not exist.
+ @retval EFI_NOT_FOUND IPF: Processor with the handle specified by
+ ProcessorNumber does not exist.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MP_SERVICES_GET_PROCESSOR_CONTEXT)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ IN UINTN ProcessorNumber,
+ IN OUT UINTN *BufferLength,
+ OUT EFI_MP_PROC_CONTEXT *ProcessorContextBuffer
+ );
+
+/**
+ This function is used to dispatch all enabled APs to the function specified
+ by Procedure. APs can run either simultaneously or one by one. The caller can
+ also configure the BSP to either wait for APs or just proceed with the next
+ task. It is the responsibility of the caller of the StartupAllAPs() to make
+ sure that the nature of the code that will be run on the BSP and the dispatched
+ APs is well controlled. The MP Services Protocol does not guarantee that the
+ function that either processor is executing is MP-safe. Hence, the tasks that
+ can be run in parallel are limited to certain independent tasks and well-
+ controlled exclusive code. EFI services and protocols may not be called by APs
+ unless otherwise specified.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[in] Procedure A pointer to the function to be run on enabled
+ APs of the system.
+ @param[in] SingleThread Flag that requests APs to execute one at a
+ time or simultaneously.
+ - IA32, X64:
+ If TRUE, then all the enabled APs execute
+ the function specified by Procedure one by
+ one, in ascending order of processor handle
+ number. If FALSE, then all the enabled APs
+ execute the function specified by Procedure
+ simultaneously.
+ - IPF:
+ If TRUE, then all the enabled APs execute
+ the function specified by Procedure simultaneously.
+ If FALSE, then all the enabled APs execute the
+ function specified by Procedure one by one, in
+ ascending order of processor handle number. The
+ time interval of AP dispatching is determined
+ by WaitEvent and TimeoutInMicrosecs.
+ @param[in] WaitEvent Event to signal when APs have finished.
+ - IA32, X64:
+ If not NULL, when all APs finish after timeout
+ expires, the event will be signaled. If NULL,
+ the parameter is ignored.
+ - IPF:
+ If SingleThread is TRUE, this parameter
+ is ignored. If SingleThread is FALSE (i.e.
+ dispatch APs one by one), this parameter
+ determines whether the BSP waits after each
+ AP is dispatched. If it is NULL, the BSP
+ does not wait after each AP is dispatched.
+ If it is not NULL, the BSP waits after each
+ AP is dispatched, and the time interval is
+ determined by TimeoutInMicrosecs. Type
+ EFI_EVENT is defined in CreateEvent() in
+ the Unified Extensible Firmware Interface
+ Specification.
+ @param[in] TimeoutInMicrosecsond Time to wait for APs to finish.
+ - IA32, X64:
+ If the value is zero, it means no timeout
+ limit. The BSP waits until all APs finish.
+ If the value is not zero, the BSP waits
+ until all APs finish or timeout expires.
+ If timeout expires, EFI_TIMEOUT is returned,
+ and the BSP will then check APs?status
+ periodically, with time interval of 16
+ microseconds.
+ - IPF:
+ If SingleThread is TRUE and FailedCPUList
+ is NULL, this parameter is ignored. If
+ SingleThread is TRUE and FailedCPUList is
+ not NULL, this parameter determines whether
+ the BSP waits until all APs finish their
+ procedure. If it is zero, the BSP does not
+ wait for APs. If it is non-zero, it waits
+ until all APs finish. If SingleThread is
+ FALSE and WaitEvent is NULL, this parameter
+ is ignored. If SingleThread is FALSE and
+ WaitEvent is not NULL, the BSP waits after
+ each AP is dispatched and this value
+ determines time interval. If the value is
+ zero, the length of time interval is 10ms.
+ If the value is non-zero, the BSP waits
+ until dispatched AP finishes and then
+ dispatch the next.
+ @param[in] ProcedureArgument The pointer to the optional parameter of the
+ function specified by Procedure.
+ @param[out] FailedCPUList List of APs that did not finish.
+ - IA32, X64:
+ If not NULL, it records handle numbers of
+ all logical processors that fail to accept
+ caller-provided function (busy or disabled).
+ If NULL, this parameter is ignored.
+ - IPF:
+ If not NULL, it records status of all
+ logical processors, with processor handle
+ number as index. If a logical processor
+ fails to accept caller-provided function
+ because it is busy, the status is EFI_NOT_READY.
+ If it fails to accept function due to other
+ reasons, the status is EFI_NOT_AVAILABLE_YET.
+ If timeout expires, the status is EFI_TIMEOUT.
+ Otherwise, the value is EFI_SUCCESS. If NULL,
+ this parameter is ignored.
+
+ @retval EFI_SUCCESS IA32, X64: All dispatched APs have finished
+ before the timeout expires.
+ @retval EFI_SUCCESS IA32, X64: Only 1 logical processor exists
+ in system.
+ @retval EFI_INVALID_PARAMETER IA32, X64: Procedure is NULL.
+ @retval EFI_TIMEOUT IA32, X64: The timeout expires before all
+ dispatched APs have finished.
+ @retval EFI_SUCCESS IPF: This function always returns EFI_SUCCESS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_MP_SERVICES_STARTUP_ALL_APS)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ IN FRAMEWORK_EFI_AP_PROCEDURE Procedure,
+ IN BOOLEAN SingleThread,
+ IN EFI_EVENT WaitEvent OPTIONAL,
+ IN UINTN TimeoutInMicroSecs,
+ IN VOID *ProcArguments OPTIONAL,
+ OUT UINTN *FailedCPUList OPTIONAL
+ );
+
+/**
+ This function is used to dispatch one enabled AP to the function provided by
+ the caller. The caller can request the BSP to either wait for the AP or just
+ proceed with the next task.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[in] Procedure A pointer to the function to be run on the
+ designated AP.
+ @param[in] ProcessorNumber The handle number of AP. The range is from
+ 0 to the total number of logical processors
+ minus 1. The total number of logical
+ processors can be retrieved by GetGeneralMPInfo().
+ @param[in] WaitEvent Event to signal when APs have finished.
+ - IA32, X64:
+ If not NULL, when the AP finishes after timeout
+ expires, the event will be signaled. If NULL,
+ the parameter is ignored.
+ - IPF:
+ This parameter determines whether the BSP
+ waits after the AP is dispatched. If it is
+ NULL, the BSP does not wait after the AP
+ is dispatched. If it is not NULL, the BSP
+ waits after the AP is dispatched, and the
+ time interval is determined by TimeoutInMicrosecs.
+ Type EFI_EVENT is defined in CreateEvent()
+ in the Unified Extensible Firmware Interface
+ Specification.
+ @param[in] TimeoutInMicrosecsond Time to wait for APs to finish.
+ - IA32, X64:
+ If the value is zero, it means no timeout
+ limit. The BSP waits until the AP finishes.
+ If the value is not zero, the BSP waits until
+ the AP finishes or timeout expires. If timeout
+ expires, EFI_TIMEOUT is returned, and the
+ BSP will then check the AP's status periodically,
+ with time interval of 16 microseconds.
+ - IPF:
+ If WaitEvent is NULL, this parameter is ignored.
+ If WaitEvent is not NULL, the BSP waits after
+ the AP is dispatched and this value determines
+ time interval. If the value is zero, the length
+ of time interval is 10ms. If the value is
+ non-zero, the BSP waits until the AP finishes.
+ @param[in] ProcedureArgument The pointer to the optional parameter of the
+ function specified by Procedure.
+
+ @retval EFI_SUCCESS Specified AP has finished before the timeout
+ expires.
+ @retval EFI_TIMEOUT The timeout expires before specified AP has
+ finished.
+ @retval EFI_INVALID_PARAMETER IA32, X64: Processor with the handle specified
+ by ProcessorNumber does not exist.
+ @retval EFI_INVALID_PARAMETER IA32, X64: Specified AP is busy or disabled.
+ @retval EFI_INVALID_PARAMETER IA32, X64: Procedure is NULL.
+ @retval EFI_INVALID_PARAMETER IA32, X64: ProcessorNumber specifies the BSP
+ @retval EFI_NOT_READY IPF: Specified AP is busy
+ @retval EFI_NOT_AVAILABLE_YET IPF: ProcessorNumber specifies the BSP
+ @retval EFI_NOT_AVAILABLE_YET IPF: Specified AP is disabled.
+ @retval EFI_NOT_AVAILABLE_YET IPF: Specified AP is unhealthy or untested.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_MP_SERVICES_STARTUP_THIS_AP)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ IN FRAMEWORK_EFI_AP_PROCEDURE Procedure,
+ IN UINTN ProcessorNumber,
+ IN EFI_EVENT WaitEvent OPTIONAL,
+ IN UINTN TimeoutInMicroSecs,
+ IN OUT VOID *ProcArguments OPTIONAL
+ );
+
+/**
+ This service switches the requested AP to be the BSP from that point onward.
+ The new BSP can take over the execution of the old BSP and continue seamlessly
+ from where the old one left off. This call can only be performed by the
+ current BSP.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[in] ProcessorNumber The handle number of AP. The range is from 0 to
+ the total number of logical processors minus 1.
+ The total number of logical processors can be
+ retrieved by GetGeneralMPInfo().
+ @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an
+ enabled AP. Otherwise, it will be disabled.
+
+ @retval EFI_SUCCESS BSP successfully switched.
+ @retval EFI_INVALID_PARAMETER The processor with the handle specified by
+ ProcessorNumber does not exist.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
+ @retval EFI_NOT_READY IA32, X64: Specified AP is busy or disabled.
+ @retval EFI_INVALID_PARAMETER IPF: Specified AP is disabled.
+ @retval EFI_INVALID_PARAMETER IPF: Specified AP is unhealthy or untested.
+ @retval EFI_NOT_READY IPF: Specified AP is busy.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_MP_SERVICES_SWITCH_BSP)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ IN UINTN ProcessorNumber,
+ IN BOOLEAN EnableOldBSP
+ );
+
+/**
+ This service sends an IPI to a specified AP. Caller can specify vector number
+ and delivery mode of the interrupt.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[in] ProcessorNumber The handle number of AP. The range is from 0 to
+ the total number of logical processors minus 1.
+ The total number of logical processors can be
+ retrieved by GetGeneralMPInfo().
+ @param[in] VectorNumber The vector number of the interrupt.
+ @param[in] DeliveryMode The delivery mode of the interrupt.
+
+ @retval EFI_SUCCESS IPI was successfully sent.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
+ @retval EFI_INVALID_PARAMETER IA32, X64: Processor with the handle specified
+ by ProcessorNumber does not exist.
+ @retval EFI_INVALID_PARAMETER IA32, X64: VectorNumber is greater than 255.
+ @retval EFI_INVALID_PARAMETER IA32, X64: DeliveryMode is greater than or equal
+ to DELIVERY_MODE_MAX.
+ @retval EFI_NOT_READY IA32, X64: IPI is not accepted by the target
+ processor within 10 microseconds.
+ @retval EFI_INVALID_PARAMETER IPF: Specified AP is disabled.
+ @retval EFI_INVALID_PARAMETER IPF: Specified AP is unhealthy or untested.
+ @retval EFI_NOT_READY IPF: Specified AP is busy.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MP_SERVICES_SEND_IPI)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ IN UINTN ProcessorNumber,
+ IN UINTN VectorNumber,
+ IN UINTN DeliveryMode
+ );
+
+/**
+ This service lets the caller enable or disable an AP. The caller can optionally
+ specify the health status of the AP by Health. It is usually used to update the
+ health status of the processor after some processor test.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[in] ProcessorNumber The handle number of AP. The range is from 0 to
+ the total number of logical processors minus 1.
+ The total number of logical processors can be
+ retrieved by GetGeneralMPInfo().
+ @param[in] NewAPState Indicates whether the new, desired state of the
+ AP is enabled or disabled. TRUE for enabling,
+ FALSE otherwise.
+ @param[in] HealthState If not NULL, it points to the value that specifies
+ the new health status of the AP. If it is NULL,
+ this parameter is ignored.
+
+ @retval EFI_SUCCESS AP successfully enabled or disabled.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
+ @retval EFI_INVALID_PARAMETER IA32, X64: Processor with the handle specified
+ by ProcessorNumber does not exist.
+ @retval EFI_INVALID_PARAMETER IPF: If an unhealthy or untested AP is to be
+ enabled.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_MP_SERVICES_ENABLEDISABLEAP)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ IN UINTN ProcessorNumber,
+ IN BOOLEAN NewAPState,
+ IN EFI_MP_HEALTH *HealthState OPTIONAL
+ );
+
+/**
+ This service lets the caller processor get its handle number, with which any
+ processor in the system can be uniquely identified. The range is from 0 to the
+ total number of logical processors minus 1. The total number of logical
+ processors can be retrieved by GetGeneralMPInfo(). This service may be called
+ from the BSP and APs.
+
+ @param[in] This The pointer to the FRAMEWORK_EFI_MP_SERVICES_PROTOCOL
+ instance.
+ @param[out] ProcessorNumber A pointer to the handle number of AP. The range is
+ from 0 to the total number of logical processors
+ minus 1. The total number of logical processors
+ can be retrieved by GetGeneralMPInfo().
+
+@retval EFI_SUCCESS This function always returns EFI_SUCCESS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_MP_SERVICES_WHOAMI)(
+ IN FRAMEWORK_EFI_MP_SERVICES_PROTOCOL *This,
+ OUT UINTN *ProcessorNumber
+ );
+
+///
+/// Framework MP Services Protocol structure.
+///
+struct _FRAMEWORK_EFI_MP_SERVICES_PROTOCOL {
+ EFI_MP_SERVICES_GET_GENERAL_MP_INFO GetGeneralMPInfo;
+ EFI_MP_SERVICES_GET_PROCESSOR_CONTEXT GetProcessorContext;
+ FRAMEWORK_EFI_MP_SERVICES_STARTUP_ALL_APS StartupAllAPs;
+ FRAMEWORK_EFI_MP_SERVICES_STARTUP_THIS_AP StartupThisAP;
+ FRAMEWORK_EFI_MP_SERVICES_SWITCH_BSP SwitchBSP;
+ EFI_MP_SERVICES_SEND_IPI SendIPI;
+ FRAMEWORK_EFI_MP_SERVICES_ENABLEDISABLEAP EnableDisableAP;
+ FRAMEWORK_EFI_MP_SERVICES_WHOAMI WhoAmI;
+};
+
+extern EFI_GUID gFrameworkEfiMpServiceProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/Legacy8259.h b/Core/IntelFrameworkPkg/Include/Protocol/Legacy8259.h new file mode 100644 index 0000000000..c843de1018 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/Legacy8259.h @@ -0,0 +1,297 @@ +/** @file
+ This protocol abstracts the 8259 interrupt controller. This includes
+ PCI IRQ routing needed to program the PCI Interrupt Line register.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_8259_H_
+#define _EFI_LEGACY_8259_H_
+
+
+#define EFI_LEGACY_8259_PROTOCOL_GUID \
+ { \
+ 0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \
+ }
+
+typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;
+
+typedef enum {
+ Efi8259Irq0,
+ Efi8259Irq1,
+ Efi8259Irq2,
+ Efi8259Irq3,
+ Efi8259Irq4,
+ Efi8259Irq5,
+ Efi8259Irq6,
+ Efi8259Irq7,
+ Efi8259Irq8,
+ Efi8259Irq9,
+ Efi8259Irq10,
+ Efi8259Irq11,
+ Efi8259Irq12,
+ Efi8259Irq13,
+ Efi8259Irq14,
+ Efi8259Irq15,
+ Efi8259IrqMax
+} EFI_8259_IRQ;
+
+typedef enum {
+ Efi8259LegacyMode,
+ Efi8259ProtectedMode,
+ Efi8259MaxMode
+} EFI_8259_MODE;
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This The protocol instance pointer.
+ @param MasterBase The base vector for the Master PIC in the 8259 controller.
+ @param SlaveBase The base vector for the Slave PIC in the 8259 controller.
+
+ @retval EFI_SUCCESS The new bases were programmed.
+ @retval EFI_DEVICE_ERROR A device error occured programming the vector bases.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ );
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This The protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+
+ @retval EFI_SUCCESS 8259 status returned.
+ @retval EFI_DEVICE_ERROR Error reading 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_MASK)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+ Also set the edge/level masks.
+
+ @param This The protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+
+ @retval EFI_SUCCESS 8259 status returned.
+ @retval EFI_DEVICE_ERROR Error writing 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MASK)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 mode of operation. The base address for the 8259 is different for
+ legacy and protected mode. The legacy mode requires the master 8259 to have a
+ master base of 0x08 and the slave base of 0x70. The protected mode base locations
+ are not defined. Interrupts must be masked by the caller before this function
+ is called. The interrupt mask from the current mode is saved. The interrupt
+ mask for the new mode is Mask, or if Mask does not exist the previously saved
+ mask is used.
+
+ @param This The protocol instance pointer.
+ @param Mode The mode of operation. i.e. the real mode or protected mode.
+ @param Mask Optional interupt mask for the new mode.
+ @param EdgeLevel Optional trigger mask for the new mode.
+
+ @retval EFI_SUCCESS 8259 programmed.
+ @retval EFI_DEVICE_ERROR Error writing to 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MODE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ );
+
+/**
+ Convert from IRQ to processor interrupt vector number.
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+ @param Vector The processor vector number that matches an Irq.
+
+ @retval EFI_SUCCESS The Vector matching Irq is returned.
+ @retval EFI_INVALID_PARAMETER The Irq not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Enable Irq by unmasking interrupt in 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+ @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.
+
+ @retval EFI_SUCCESS The Irq was enabled on 8259.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ );
+
+/**
+ Disable Irq by masking interrupt in 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+
+ @retval EFI_SUCCESS The Irq was disabled on 8259.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ PciHandle represents a PCI config space of a PCI function. Vector
+ represents Interrupt Pin (from PCI config space) and it is the data
+ that is programmed into the Interrupt Line (from the PCI config space)
+ register.
+
+ @param This The protocol instance pointer.
+ @param PciHandle The PCI function to return the vector for.
+ @param Vector The vector for the function it matches.
+
+ @retval EFI_SUCCESS A valid Vector was returned.
+ @retval EFI_INVALID_PARAMETER PciHandle not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Send an EOI to 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+
+ @retval EFI_SUCCESS EOI was successfully sent to 8259.
+ @retval EFI_INVALID_PARAMETER The Irq isnot valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the 8259 and APIC hardware control between EFI usage and
+ Compatibility16 usage.
+
+ @param SetVectorBase
+ Sets the vector bases for master and slave PICs.
+
+ @param GetMask
+ Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMask
+ Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMode
+ Sets PIC mode to 16-bit real mode or 32-bit protected mode.
+
+ @param GetVector
+ Gets the base vector assigned to an IRQ.
+
+ @param EnableIrq
+ Enables an IRQ.
+
+ @param DisableIrq
+ Disables an IRQ.
+
+ @param GetInterruptLine
+ Gets an IRQ that is assigned to a PCI device.
+
+ @param EndOfInterrupt
+ Issues the end of interrupt command.
+
+**/
+struct _EFI_LEGACY_8259_PROTOCOL {
+ EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;
+ EFI_LEGACY_8259_GET_MASK GetMask;
+ EFI_LEGACY_8259_SET_MASK SetMask;
+ EFI_LEGACY_8259_SET_MODE SetMode;
+ EFI_LEGACY_8259_GET_VECTOR GetVector;
+ EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;
+ EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;
+ EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;
+ EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;
+};
+
+extern EFI_GUID gEfiLegacy8259ProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/LegacyBios.h b/Core/IntelFrameworkPkg/Include/Protocol/LegacyBios.h new file mode 100644 index 0000000000..d431ad85e0 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/LegacyBios.h @@ -0,0 +1,1523 @@ +/** @file
+ The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage
+ under EFI and Legacy OS boot. This file also includes all the related
+ COMPATIBILIY16 structures and defintions.
+
+ Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow
+ well known naming conventions.
+
+ Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode
+ environment. Reverse thunk is the code that does the opposite.
+
+Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.98.
+
+**/
+
+#ifndef _EFI_LEGACY_BIOS_H_
+#define _EFI_LEGACY_BIOS_H_
+
+///
+///
+///
+#pragma pack(1)
+
+typedef UINT8 SERIAL_MODE;
+typedef UINT8 PARALLEL_MODE;
+
+#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
+
+///
+/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx
+/// physical address range. It is located on a 16-byte boundary and provides the physical address of the
+/// entry point for the Compatibility16 functions. These functions provide the platform-specific
+/// information that is required by the generic EfiCompatibility code. The functions are invoked via
+/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical
+/// entry point.
+///
+typedef struct {
+ ///
+ /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte
+ /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.
+ ///
+ UINT32 Signature;
+
+ ///
+ /// The value required such that byte checksum of TableLength equals zero.
+ ///
+ UINT8 TableChecksum;
+
+ ///
+ /// The length of this table.
+ ///
+ UINT8 TableLength;
+
+ ///
+ /// The major EFI revision for which this table was generated.
+ ///
+ UINT8 EfiMajorRevision;
+
+ ///
+ /// The minor EFI revision for which this table was generated.
+ ///
+ UINT8 EfiMinorRevision;
+
+ ///
+ /// The major revision of this table.
+ ///
+ UINT8 TableMajorRevision;
+
+ ///
+ /// The minor revision of this table.
+ ///
+ UINT8 TableMinorRevision;
+
+ ///
+ /// Reserved for future usage.
+ ///
+ UINT16 Reserved;
+
+ ///
+ /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.
+ ///
+ UINT16 Compatibility16CallSegment;
+
+ ///
+ /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.
+ ///
+ UINT16 Compatibility16CallOffset;
+
+ ///
+ /// The segment of the entry point within the traditional BIOS for EfiCompatibility
+ /// to invoke the PnP installation check.
+ ///
+ UINT16 PnPInstallationCheckSegment;
+
+ ///
+ /// The Offset of the entry point within the traditional BIOS for EfiCompatibility
+ /// to invoke the PnP installation check.
+ ///
+ UINT16 PnPInstallationCheckOffset;
+
+ ///
+ /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform
+ ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).
+ ///
+ UINT32 EfiSystemTable;
+
+ ///
+ /// The address of an OEM-provided identifier string. The string is null terminated.
+ ///
+ UINT32 OemIdStringPointer;
+
+ ///
+ /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional
+ /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size
+ /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI
+ /// RSD PTR with either the ACPI 1.0b or 2.0 values.
+ ///
+ UINT32 AcpiRsdPtrPointer;
+
+ ///
+ /// The OEM revision number. Usage is undefined but provided for OEM module usage.
+ ///
+ UINT16 OemRevision;
+
+ ///
+ /// The 32-bit physical address where INT15 E820 data is stored within the traditional
+ /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the
+ /// data to the indicated area.
+ ///
+ UINT32 E820Pointer;
+
+ ///
+ /// The length of the E820 data and is filled in by the EfiCompatibility code.
+ ///
+ UINT32 E820Length;
+
+ ///
+ /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.
+ /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and
+ /// copy the data to the indicated area.
+ ///
+ UINT32 IrqRoutingTablePointer;
+
+ ///
+ /// The length of the $PIR table and is filled in by the EfiCompatibility code.
+ ///
+ UINT32 IrqRoutingTableLength;
+
+ ///
+ /// The 32-bit physical address where the MP table is stored in the traditional BIOS.
+ /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data
+ /// to the indicated area.
+ ///
+ UINT32 MpTablePtr;
+
+ ///
+ /// The length of the MP table and is filled in by the EfiCompatibility code.
+ ///
+ UINT32 MpTableLength;
+
+ ///
+ /// The segment of the OEM-specific INT table/code.
+ ///
+ UINT16 OemIntSegment;
+
+ ///
+ /// The offset of the OEM-specific INT table/code.
+ ///
+ UINT16 OemIntOffset;
+
+ ///
+ /// The segment of the OEM-specific 32-bit table/code.
+ ///
+ UINT16 Oem32Segment;
+
+ ///
+ /// The offset of the OEM-specific 32-bit table/code.
+ ///
+ UINT16 Oem32Offset;
+
+ ///
+ /// The segment of the OEM-specific 16-bit table/code.
+ ///
+ UINT16 Oem16Segment;
+
+ ///
+ /// The offset of the OEM-specific 16-bit table/code.
+ ///
+ UINT16 Oem16Offset;
+
+ ///
+ /// The segment of the TPM binary passed to 16-bit CSM.
+ ///
+ UINT16 TpmSegment;
+
+ ///
+ /// The offset of the TPM binary passed to 16-bit CSM.
+ ///
+ UINT16 TpmOffset;
+
+ ///
+ /// A pointer to a string identifying the independent BIOS vendor.
+ ///
+ UINT32 IbvPointer;
+
+ ///
+ /// This field is NULL for all systems not supporting PCI Express. This field is the base
+ /// value of the start of the PCI Express memory-mapped configuration registers and
+ /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function
+ /// Compatibility16InitializeYourself().
+ /// Compatibility16InitializeYourself() is defined in Compatability16
+ /// Functions.
+ ///
+ UINT32 PciExpressBase;
+
+ ///
+ /// Maximum PCI bus number assigned.
+ ///
+ UINT8 LastPciBus;
+
+ ///
+ /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If
+ /// UmaAddress is a valid address in the shadow RAM, it also indicates that the region
+ /// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM.
+ ///
+ UINT32 UmaAddress;
+
+ ///
+ /// Upper Memory Area size in bytes to be set as Read/Write. If zero, no UMA region
+ /// will be set as Read/Write (i.e. all Shadow RAM is set as Read-Only).
+ ///
+ UINT32 UmaSize;
+
+ ///
+ /// Start Address of high memory that can be used for permanent allocation. If zero,
+ /// high memory is not available for permanent allocation.
+ ///
+ UINT32 HiPermanentMemoryAddress;
+
+ ///
+ /// Size of high memory that can be used for permanent allocation in bytes. If zero,
+ /// high memory is not available for permanent allocation.
+ ///
+ UINT32 HiPermanentMemorySize;
+} EFI_COMPATIBILITY16_TABLE;
+
+///
+/// Functions provided by the CSM binary which communicate between the EfiCompatibility
+/// and Compatability16 code.
+///
+/// Inconsistent with the specification here:
+/// The member's name started with "Compatibility16" [defined in Intel Framework
+/// Compatibility Support Module Specification / 0.97 version]
+/// has been changed to "Legacy16" since keeping backward compatible.
+///
+typedef enum {
+ ///
+ /// Causes the Compatibility16 code to do any internal initialization required.
+ /// Input:
+ /// AX = Compatibility16InitializeYourself
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE
+ /// Return:
+ /// AX = Return Status codes
+ ///
+ Legacy16InitializeYourself = 0x0000,
+
+ ///
+ /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.
+ /// Input:
+ /// AX = Compatibility16UpdateBbs
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
+ /// Return:
+ /// AX = Returned status codes
+ ///
+ Legacy16UpdateBbs = 0x0001,
+
+ ///
+ /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16
+ /// code is read/write.
+ /// Input:
+ /// AX = Compatibility16PrepareToBoot
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure
+ /// Return:
+ /// AX = Returned status codes
+ ///
+ Legacy16PrepareToBoot = 0x0002,
+
+ ///
+ /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.
+ /// Input:
+ /// AX = Compatibility16Boot
+ /// Output:
+ /// AX = Returned status codes
+ ///
+ Legacy16Boot = 0x0003,
+
+ ///
+ /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is
+ /// stored in CMOS and is the priority number of the last attempted boot device.
+ /// Input:
+ /// AX = Compatibility16RetrieveLastBootDevice
+ /// Output:
+ /// AX = Returned status codes
+ /// BX = Priority number of the boot device.
+ ///
+ Legacy16RetrieveLastBootDevice = 0x0004,
+
+ ///
+ /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.
+ /// Input:
+ /// AX = Compatibility16DispatchOprom
+ /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE
+ /// Output:
+ /// AX = Returned status codes
+ /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.
+ ///
+ Legacy16DispatchOprom = 0x0005,
+
+ ///
+ /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address
+ /// of that region.
+ /// Input:
+ /// AX = Compatibility16GetTableAddress
+ /// BX = Allocation region
+ /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 Allocate from 0xF0000 64 KB block
+ /// Bit 1 = 1 Allocate from 0xE0000 64 KB block
+ /// CX = Requested length in bytes.
+ /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.
+ /// Output:
+ /// AX = Returned status codes
+ /// DS:BX = Address of the region
+ ///
+ Legacy16GetTableAddress = 0x0006,
+
+ ///
+ /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.
+ /// Input:
+ /// AX = Compatibility16SetKeyboardLeds
+ /// CL = LED status.
+ /// Bit 0 Scroll Lock 0 = Off
+ /// Bit 1 NumLock
+ /// Bit 2 Caps Lock
+ /// Output:
+ /// AX = Returned status codes
+ ///
+ Legacy16SetKeyboardLeds = 0x0007,
+
+ ///
+ /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that
+ /// do not have an OpROM associated with them. An example is SATA.
+ /// Input:
+ /// AX = Compatibility16InstallPciHandler
+ /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure
+ /// Output:
+ /// AX = Returned status codes
+ ///
+ Legacy16InstallPciHandler = 0x0008
+} EFI_COMPATIBILITY_FUNCTIONS;
+
+
+///
+/// EFI_DISPATCH_OPROM_TABLE
+///
+typedef struct {
+ UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.
+ UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.
+ UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
+ UINT8 PciBus; ///< The PCI bus.
+ UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
+ UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
+ ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
+ ///< OpROM BIOS Setup to be executed.
+ UINT32 BbsTablePointer; ///< A pointer to the BBS table.
+ UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
+ ///< means that the relocation of this run time code is not supported.
+ ///< Inconsistent with specification here:
+ ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]
+ ///< has been changed to "RuntimeSegment" since keeping backward compatible.
+
+} EFI_DISPATCH_OPROM_TABLE;
+
+///
+/// EFI_TO_COMPATIBILITY16_INIT_TABLE
+///
+typedef struct {
+ ///
+ /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.
+ ///
+ UINT32 BiosLessThan1MB;
+
+ ///
+ /// The starting address of the high memory block.
+ ///
+ UINT32 HiPmmMemory;
+
+ ///
+ /// The length of high memory block.
+ ///
+ UINT32 HiPmmMemorySizeInBytes;
+
+ ///
+ /// The segment of the reverse thunk call code.
+ ///
+ UINT16 ReverseThunkCallSegment;
+
+ ///
+ /// The offset of the reverse thunk call code.
+ ///
+ UINT16 ReverseThunkCallOffset;
+
+ ///
+ /// The number of E820 entries copied to the Compatibility16 BIOS.
+ ///
+ UINT32 NumberE820Entries;
+
+ ///
+ /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.
+ ///
+ UINT32 OsMemoryAbove1Mb;
+
+ ///
+ /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.
+ ///
+ UINT32 ThunkStart;
+
+ ///
+ /// The size of the thunk code.
+ ///
+ UINT32 ThunkSizeInBytes;
+
+ ///
+ /// Starting address of memory under 1 MB.
+ ///
+ UINT32 LowPmmMemory;
+
+ ///
+ /// The length of low Memory block.
+ ///
+ UINT32 LowPmmMemorySizeInBytes;
+} EFI_TO_COMPATIBILITY16_INIT_TABLE;
+
+///
+/// DEVICE_PRODUCER_SERIAL.
+///
+typedef struct {
+ UINT16 Address; ///< I/O address assigned to the serial port.
+ UINT8 Irq; ///< IRQ assigned to the serial port.
+ SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
+} DEVICE_PRODUCER_SERIAL;
+
+///
+/// DEVICE_PRODUCER_SERIAL's modes.
+///@{
+#define DEVICE_SERIAL_MODE_NORMAL 0x00
+#define DEVICE_SERIAL_MODE_IRDA 0x01
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
+///@)
+
+///
+/// DEVICE_PRODUCER_PARALLEL.
+///
+typedef struct {
+ UINT16 Address; ///< I/O address assigned to the parallel port.
+ UINT8 Irq; ///< IRQ assigned to the parallel port.
+ UINT8 Dma; ///< DMA assigned to the parallel port.
+ PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
+} DEVICE_PRODUCER_PARALLEL;
+
+///
+/// DEVICE_PRODUCER_PARALLEL's modes.
+///@{
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
+///@}
+
+///
+/// DEVICE_PRODUCER_FLOPPY
+///
+typedef struct {
+ UINT16 Address; ///< I/O address assigned to the floppy.
+ UINT8 Irq; ///< IRQ assigned to the floppy.
+ UINT8 Dma; ///< DMA assigned to the floppy.
+ UINT8 NumberOfFloppy; ///< Number of floppies in the system.
+} DEVICE_PRODUCER_FLOPPY;
+
+///
+/// LEGACY_DEVICE_FLAGS
+///
+typedef struct {
+ UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
+ UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
+ UINT32 Reserved : 30; ///< Reserved for future usage.
+} LEGACY_DEVICE_FLAGS;
+
+///
+/// DEVICE_PRODUCER_DATA_HEADER
+///
+typedef struct {
+ DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
+ DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
+ DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
+ UINT8 MousePresent; ///< Flag to indicate if mouse is present.
+ LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
+} DEVICE_PRODUCER_DATA_HEADER;
+
+///
+/// ATAPI_IDENTIFY
+///
+typedef struct {
+ UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
+} ATAPI_IDENTIFY;
+
+///
+/// HDD_INFO
+///
+typedef struct {
+ ///
+ /// Status of IDE device. Values are defined below. There is one HDD_INFO structure
+ /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index
+ /// 1 is slave.
+ ///
+ UINT16 Status;
+
+ ///
+ /// PCI bus of IDE controller.
+ ///
+ UINT32 Bus;
+
+ ///
+ /// PCI device of IDE controller.
+ ///
+ UINT32 Device;
+
+ ///
+ /// PCI function of IDE controller.
+ ///
+ UINT32 Function;
+
+ ///
+ /// Command ports base address.
+ ///
+ UINT16 CommandBaseAddress;
+
+ ///
+ /// Control ports base address.
+ ///
+ UINT16 ControlBaseAddress;
+
+ ///
+ /// Bus master address.
+ ///
+ UINT16 BusMasterAddress;
+
+ UINT8 HddIrq;
+
+ ///
+ /// Data that identifies the drive data; one per possible attached drive.
+ ///
+ ATAPI_IDENTIFY IdentifyDrive[2];
+} HDD_INFO;
+
+///
+/// HDD_INFO status bits
+///
+#define HDD_PRIMARY 0x01
+#define HDD_SECONDARY 0x02
+#define HDD_MASTER_ATAPI_CDROM 0x04
+#define HDD_SLAVE_ATAPI_CDROM 0x08
+#define HDD_MASTER_IDE 0x20
+#define HDD_SLAVE_IDE 0x40
+#define HDD_MASTER_ATAPI_ZIPDISK 0x10
+#define HDD_SLAVE_ATAPI_ZIPDISK 0x80
+
+///
+/// BBS_STATUS_FLAGS;\.
+///
+typedef struct {
+ UINT16 OldPosition : 4; ///< Prior priority.
+ UINT16 Reserved1 : 4; ///< Reserved for future use.
+ UINT16 Enabled : 1; ///< If 0, ignore this entry.
+ UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.
+ ///< 1 = Boot attempted failed.
+
+ ///
+ /// State of media present.
+ /// 00 = No bootable media is present in the device.
+ /// 01 = Unknown if a bootable media present.
+ /// 10 = Media is present and appears bootable.
+ /// 11 = Reserved.
+ ///
+ UINT16 MediaPresent : 2;
+ UINT16 Reserved2 : 4; ///< Reserved for future use.
+} BBS_STATUS_FLAGS;
+
+///
+/// BBS_TABLE, device type values & boot priority values.
+///
+typedef struct {
+ ///
+ /// The boot priority for this boot device. Values are defined below.
+ ///
+ UINT16 BootPriority;
+
+ ///
+ /// The PCI bus for this boot device.
+ ///
+ UINT32 Bus;
+
+ ///
+ /// The PCI device for this boot device.
+ ///
+ UINT32 Device;
+
+ ///
+ /// The PCI function for the boot device.
+ ///
+ UINT32 Function;
+
+ ///
+ /// The PCI class for this boot device.
+ ///
+ UINT8 Class;
+
+ ///
+ /// The PCI Subclass for this boot device.
+ ///
+ UINT8 SubClass;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
+ ///
+ UINT16 MfgStringOffset;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
+ ///
+ UINT16 MfgStringSegment;
+
+ ///
+ /// BBS device type. BBS device types are defined below.
+ ///
+ UINT16 DeviceType;
+
+ ///
+ /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.
+ ///
+ BBS_STATUS_FLAGS StatusFlags;
+
+ ///
+ /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
+ /// BCV devices.
+ ///
+ UINT16 BootHandlerOffset;
+
+ ///
+ /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
+ /// BCV devices.
+ ///
+ UINT16 BootHandlerSegment;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing this device.
+ ///
+ UINT16 DescStringOffset;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing this device.
+ ///
+ UINT16 DescStringSegment;
+
+ ///
+ /// Reserved.
+ ///
+ UINT32 InitPerReserved;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq13Handler;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq18Handler;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq19Handler;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq40Handler;
+ UINT8 AssignedDriveNumber;
+ UINT32 AdditionalIrq41Handler;
+ UINT32 AdditionalIrq46Handler;
+ UINT32 IBV1;
+ UINT32 IBV2;
+} BBS_TABLE;
+
+///
+/// BBS device type values
+///@{
+#define BBS_FLOPPY 0x01
+#define BBS_HARDDISK 0x02
+#define BBS_CDROM 0x03
+#define BBS_PCMCIA 0x04
+#define BBS_USB 0x05
+#define BBS_EMBED_NETWORK 0x06
+#define BBS_BEV_DEVICE 0x80
+#define BBS_UNKNOWN 0xff
+///@}
+
+///
+/// BBS boot priority values
+///@{
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC
+#define BBS_LOWEST_PRIORITY 0xFFFD
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE
+#define BBS_IGNORE_ENTRY 0xFFFF
+///@}
+
+///
+/// SMM_ATTRIBUTES
+///
+typedef struct {
+ ///
+ /// Access mechanism used to generate the soft SMI. Defined types are below. The other
+ /// values are reserved for future usage.
+ ///
+ UINT16 Type : 3;
+
+ ///
+ /// The size of "port" in bits. Defined values are below.
+ ///
+ UINT16 PortGranularity : 3;
+
+ ///
+ /// The size of data in bits. Defined values are below.
+ ///
+ UINT16 DataGranularity : 3;
+
+ ///
+ /// Reserved for future use.
+ ///
+ UINT16 Reserved : 7;
+} SMM_ATTRIBUTES;
+
+///
+/// SMM_ATTRIBUTES type values.
+///@{
+#define STANDARD_IO 0x00
+#define STANDARD_MEMORY 0x01
+///@}
+
+///
+/// SMM_ATTRIBUTES port size constants.
+///@{
+#define PORT_SIZE_8 0x00
+#define PORT_SIZE_16 0x01
+#define PORT_SIZE_32 0x02
+#define PORT_SIZE_64 0x03
+///@}
+
+///
+/// SMM_ATTRIBUTES data size constants.
+///@{
+#define DATA_SIZE_8 0x00
+#define DATA_SIZE_16 0x01
+#define DATA_SIZE_32 0x02
+#define DATA_SIZE_64 0x03
+///@}
+
+///
+/// SMM_FUNCTION & relating constants.
+///
+typedef struct {
+ UINT16 Function : 15;
+ UINT16 Owner : 1;
+} SMM_FUNCTION;
+
+///
+/// SMM_FUNCTION Function constants.
+///@{
+#define INT15_D042 0x0000
+#define GET_USB_BOOT_INFO 0x0001
+#define DMI_PNP_50_57 0x0002
+///@}
+
+///
+/// SMM_FUNCTION Owner constants.
+///@{
+#define STANDARD_OWNER 0x0
+#define OEM_OWNER 0x1
+///@}
+
+///
+/// This structure assumes both port and data sizes are 1. SmmAttribute must be
+/// properly to reflect that assumption.
+///
+typedef struct {
+ ///
+ /// Describes the access mechanism, SmmPort, and SmmData sizes. Type
+ /// SMM_ATTRIBUTES is defined below.
+ ///
+ SMM_ATTRIBUTES SmmAttributes;
+
+ ///
+ /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.
+ ///
+ SMM_FUNCTION SmmFunction;
+
+ ///
+ /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.
+ ///
+ UINT8 SmmPort;
+
+ ///
+ /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.
+ ///
+ UINT8 SmmData;
+} SMM_ENTRY;
+
+///
+/// SMM_TABLE
+///
+typedef struct {
+ UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
+ SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
+} SMM_TABLE;
+
+///
+/// UDC_ATTRIBUTES
+///
+typedef struct {
+ ///
+ /// This bit set indicates that the ServiceAreaData is valid.
+ ///
+ UINT8 DirectoryServiceValidity : 1;
+
+ ///
+ /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if
+ /// DirectoryServiceValidity is 0.
+ ///
+ UINT8 RabcaUsedFlag : 1;
+
+ ///
+ /// This bit set indicates to execute hard disk diagnostics.
+ ///
+ UINT8 ExecuteHddDiagnosticsFlag : 1;
+
+ ///
+ /// Reserved for future use. Set to 0.
+ ///
+ UINT8 Reserved : 5;
+} UDC_ATTRIBUTES;
+
+///
+/// UD_TABLE
+///
+typedef struct {
+ ///
+ /// This field contains the bit-mapped attributes of the PARTIES information. Type
+ /// UDC_ATTRIBUTES is defined below.
+ ///
+ UDC_ATTRIBUTES Attributes;
+
+ ///
+ /// This field contains the zero-based device on which the selected
+ /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.
+ ///
+ UINT8 DeviceNumber;
+
+ ///
+ /// This field contains the zero-based index into the BbsTable for the parent device.
+ /// This index allows the user to reference the parent device information such as PCI
+ /// bus, device function.
+ ///
+ UINT8 BbsTableEntryNumberForParentDevice;
+
+ ///
+ /// This field contains the zero-based index into the BbsTable for the boot entry.
+ ///
+ UINT8 BbsTableEntryNumberForBoot;
+
+ ///
+ /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.
+ ///
+ UINT8 BbsTableEntryNumberForHddDiag;
+
+ ///
+ /// The raw Beer data.
+ ///
+ UINT8 BeerData[128];
+
+ ///
+ /// The raw data of selected service area.
+ ///
+ UINT8 ServiceAreaData[64];
+} UD_TABLE;
+
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00
+#define MAX_IDE_CONTROLLER 8
+
+///
+/// EFI_TO_COMPATIBILITY16_BOOT_TABLE
+///
+typedef struct {
+ UINT16 MajorVersion; ///< The EfiCompatibility major version number.
+ UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
+ UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.
+ UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.
+ UINT32 SmbiosTableLength;
+ //
+ // Legacy SIO state
+ //
+ DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
+ UINT16 DevicePathType; ///< The default boot type.
+ UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
+ UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the
+ ///< Compatibility16InitializeYourself() function.
+ //
+ // Controller & Drive Identify[2] per controller information
+ //
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
+ UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
+ UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.
+ UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.
+ UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can
+ ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more
+ ///< memory may have been discovered.
+ UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type
+ ///< UD_TABLE is defined below.
+} EFI_TO_COMPATIBILITY16_BOOT_TABLE;
+
+///
+/// EFI_LEGACY_INSTALL_PCI_HANDLER
+///
+typedef struct {
+ UINT8 PciBus; ///< The PCI bus of the device.
+ UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
+ UINT8 PciSegment; ///< The PCI segment of the device.
+ UINT8 PciClass; ///< The PCI class code of the device.
+ UINT8 PciSubclass; ///< The PCI subclass code of the device.
+ UINT8 PciInterface; ///< The PCI interface code of the device.
+ //
+ // Primary section
+ //
+ UINT8 PrimaryIrq; ///< The primary device IRQ.
+ UINT8 PrimaryReserved; ///< Reserved.
+ UINT16 PrimaryControl; ///< The primary device control I/O base.
+ UINT16 PrimaryBase; ///< The primary device I/O base.
+ UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
+ //
+ // Secondary Section
+ //
+ UINT8 SecondaryIrq; ///< The secondary device IRQ.
+ UINT8 SecondaryReserved; ///< Reserved.
+ UINT16 SecondaryControl; ///< The secondary device control I/O base.
+ UINT16 SecondaryBase; ///< The secondary device I/O base.
+ UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
+} EFI_LEGACY_INSTALL_PCI_HANDLER;
+
+//
+// Restore default pack value
+//
+#pragma pack()
+
+#define EFI_LEGACY_BIOS_PROTOCOL_GUID \
+ { \
+ 0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;
+
+///
+/// Flags returned by CheckPciRom().
+///
+#define NO_ROM 0x00
+#define ROM_FOUND 0x01
+#define VALID_LEGACY_ROM 0x02
+#define ROM_WITH_CONFIG 0x04 ///< Not defined in the Framework CSM Specification.
+
+///
+/// The following macros do not appear in the Framework CSM Specification and
+/// are kept for backward compatibility only. They convert 32-bit address (_Adr)
+/// to Segment:Offset 16-bit form.
+///
+///@{
+#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)
+#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)
+///@}
+
+#define CARRY_FLAG 0x01
+
+///
+/// EFI_EFLAGS_REG
+///
+typedef struct {
+ UINT32 CF:1;
+ UINT32 Reserved1:1;
+ UINT32 PF:1;
+ UINT32 Reserved2:1;
+ UINT32 AF:1;
+ UINT32 Reserved3:1;
+ UINT32 ZF:1;
+ UINT32 SF:1;
+ UINT32 TF:1;
+ UINT32 IF:1;
+ UINT32 DF:1;
+ UINT32 OF:1;
+ UINT32 IOPL:2;
+ UINT32 NT:1;
+ UINT32 Reserved4:2;
+ UINT32 VM:1;
+ UINT32 Reserved5:14;
+} EFI_EFLAGS_REG;
+
+///
+/// EFI_DWORD_REGS
+///
+typedef struct {
+ UINT32 EAX;
+ UINT32 EBX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 ESI;
+ UINT32 EDI;
+ EFI_EFLAGS_REG EFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT32 EBP;
+ UINT32 ESP;
+} EFI_DWORD_REGS;
+
+///
+/// EFI_FLAGS_REG
+///
+typedef struct {
+ UINT16 CF:1;
+ UINT16 Reserved1:1;
+ UINT16 PF:1;
+ UINT16 Reserved2:1;
+ UINT16 AF:1;
+ UINT16 Reserved3:1;
+ UINT16 ZF:1;
+ UINT16 SF:1;
+ UINT16 TF:1;
+ UINT16 IF:1;
+ UINT16 DF:1;
+ UINT16 OF:1;
+ UINT16 IOPL:2;
+ UINT16 NT:1;
+ UINT16 Reserved4:1;
+} EFI_FLAGS_REG;
+
+///
+/// EFI_WORD_REGS
+///
+typedef struct {
+ UINT16 AX;
+ UINT16 ReservedAX;
+ UINT16 BX;
+ UINT16 ReservedBX;
+ UINT16 CX;
+ UINT16 ReservedCX;
+ UINT16 DX;
+ UINT16 ReservedDX;
+ UINT16 SI;
+ UINT16 ReservedSI;
+ UINT16 DI;
+ UINT16 ReservedDI;
+ EFI_FLAGS_REG Flags;
+ UINT16 ReservedFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT16 BP;
+ UINT16 ReservedBP;
+ UINT16 SP;
+ UINT16 ReservedSP;
+} EFI_WORD_REGS;
+
+///
+/// EFI_BYTE_REGS
+///
+typedef struct {
+ UINT8 AL, AH;
+ UINT16 ReservedAX;
+ UINT8 BL, BH;
+ UINT16 ReservedBX;
+ UINT8 CL, CH;
+ UINT16 ReservedCX;
+ UINT8 DL, DH;
+ UINT16 ReservedDX;
+} EFI_BYTE_REGS;
+
+///
+/// EFI_IA32_REGISTER_SET
+///
+typedef union {
+ EFI_DWORD_REGS E;
+ EFI_WORD_REGS X;
+ EFI_BYTE_REGS H;
+} EFI_IA32_REGISTER_SET;
+
+/**
+ Thunk to 16-bit real mode and execute a software interrupt with a vector
+ of BiosInt. Regs will contain the 16-bit register context on entry and
+ exit.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] BiosInt The processor interrupt vector to invoke.
+ @param[in,out] Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode.
+
+ @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status.
+ @retval FALSE There was a BIOS error in the target code.
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_INT86)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 BiosInt,
+ IN OUT EFI_IA32_REGISTER_SET *Regs
+ );
+
+/**
+ Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the
+ 16-bit register context on entry and exit. Arguments can be passed on
+ the Stack argument
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Segment The segemnt of 16-bit mode call.
+ @param[in] Offset The offset of 16-bit mdoe call.
+ @param[in] Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode.
+ @param[in] Stack The caller allocated stack used to pass arguments.
+ @param[in] StackSize The size of Stack in bytes.
+
+ @retval FALSE Thunk completed with no BIOS errors in the target code. See Regs for status. @retval TRUE There was a BIOS error in the target code.
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_FARCALL86)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT16 Segment,
+ IN UINT16 Offset,
+ IN EFI_IA32_REGISTER_SET *Regs,
+ IN VOID *Stack,
+ IN UINTN StackSize
+ );
+
+/**
+ Test to see if a legacy PCI ROM exists for this device. Optionally return
+ the Legacy ROM instance for this PCI device.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded
+ @param[out] RomImage Return the legacy PCI ROM for this device.
+ @param[out] RomSize The size of ROM Image.
+ @param[out] Flags Indicates if ROM found and if PC-AT. Multiple bits can be set as follows:
+ - 00 = No ROM.
+ - 01 = ROM Found.
+ - 02 = ROM is a valid legacy ROM.
+
+ @retval EFI_SUCCESS The Legacy Option ROM availible for this device
+ @retval EFI_UNSUPPORTED The Legacy Option ROM is not supported.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage, OPTIONAL
+ OUT UINTN *RomSize, OPTIONAL
+ OUT UINTN *Flags
+ );
+
+/**
+ Load a legacy PC-AT OPROM on the PciHandle device. Return information
+ about how many disks were added by the OPROM and the shadow address and
+ size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:
+
+ @param[in] This The protocol instance pointer.
+ @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.
+ This value is NULL if RomImage is non-NULL. This is the normal
+ case.
+ @param[in] RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is
+ no hardware associated with the ROM and thus no PciHandle,
+ otherwise is must be NULL.
+ Example is PXE base code.
+ @param[out] Flags The type of ROM discovered. Multiple bits can be set, as follows:
+ - 00 = No ROM.
+ - 01 = ROM found.
+ - 02 = ROM is a valid legacy ROM.
+ @param[out] DiskStart The disk number of first device hooked by the ROM. If DiskStart
+ is the same as DiskEnd no disked were hooked.
+ @param[out] DiskEnd disk number of the last device hooked by the ROM.
+ @param[out] RomShadowAddress Shadow address of PC-AT ROM.
+ @param[out] RomShadowSize Size of RomShadowAddress in bytes.
+
+ @retval EFI_SUCCESS Thunk completed, see Regs for status.
+ @retval EFI_INVALID_PARAMETER PciHandle not found
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ IN VOID **RomImage,
+ OUT UINTN *Flags,
+ OUT UINT8 *DiskStart, OPTIONAL
+ OUT UINT8 *DiskEnd, OPTIONAL
+ OUT VOID **RomShadowAddress, OPTIONAL
+ OUT UINT32 *ShadowedRomSize OPTIONAL
+ );
+
+/**
+ This function attempts to traditionally boot the specified BootOption. If the EFI context has
+ been compromised, this function will not return. This procedure is not used for loading an EFI-aware
+ OS off a traditional device. The following actions occur:
+ - Get EFI SMBIOS data structures, convert them to a traditional format, and copy to
+ Compatibility16.
+ - Get a pointer to ACPI data structures and copy the Compatibility16 RSD PTR to F0000 block.
+ - Find the traditional SMI handler from a firmware volume and register the traditional SMI
+ handler with the EFI SMI handler.
+ - Build onboard IDE information and pass this information to the Compatibility16 code.
+ - Make sure all PCI Interrupt Line registers are programmed to match 8259.
+ - Reconfigure SIO devices from EFI mode (polled) into traditional mode (interrupt driven).
+ - Shadow all PCI ROMs.
+ - Set up BDA and EBDA standard areas before the legacy boot.
+ - Construct the Compatibility16 boot memory map and pass it to the Compatibility16 code.
+ - Invoke the Compatibility16 table function Compatibility16PrepareToBoot(). This
+ invocation causes a thunk into the Compatibility16 code, which sets all appropriate internal
+ data structures. The boot device list is a parameter.
+ - Invoke the Compatibility16 Table function Compatibility16Boot(). This invocation
+ causes a thunk into the Compatibility16 code, which does an INT19.
+ - If the Compatibility16Boot() function returns, then the boot failed in a graceful
+ manner--meaning that the EFI code is still valid. An ungraceful boot failure causes a reset because the state
+ of EFI code is unknown.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] BootOption The EFI Device Path from BootXXXX variable.
+ @param[in] LoadOptionSize The size of LoadOption in size.
+ @param[in] LoadOption LThe oadOption from BootXXXX variable.
+
+ @retval EFI_DEVICE_ERROR Failed to boot from any boot device and memory is uncorrupted. Note: This function normally does not returns. It will either boot the OS or reset the system if memory has been "corrupted" by loading a boot sector and passing control to it.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BootOption,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions
+ );
+
+/**
+ This function takes the Leds input parameter and sets/resets the BDA accordingly.
+ Leds is also passed to Compatibility16 code, in case any special processing is required.
+ This function is normally called from EFI Setup drivers that handle user-selectable
+ keyboard options such as boot with NUM LOCK on/off. This function does not
+ touch the keyboard or keyboard LEDs but only the BDA.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Leds The status of current Scroll, Num & Cap lock LEDS:
+ - Bit 0 is Scroll Lock 0 = Not locked.
+ - Bit 1 is Num Lock.
+ - Bit 2 is Caps Lock.
+
+ @retval EFI_SUCCESS The BDA was updated successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 Leds
+ );
+
+/**
+ Retrieve legacy BBS info and assign boot priority.
+
+ @param[in] This The protocol instance pointer.
+ @param[out] HddCount The number of HDD_INFO structures.
+ @param[out] HddInfo Onboard IDE controller information.
+ @param[out] BbsCount The number of BBS_TABLE structures.
+ @param[in,out] BbsTable Points to List of BBS_TABLE.
+
+ @retval EFI_SUCCESS Tables were returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *HddCount,
+ OUT HDD_INFO **HddInfo,
+ OUT UINT16 *BbsCount,
+ IN OUT BBS_TABLE **BbsTable
+ );
+
+/**
+ Assign drive number to legacy HDD drives prior to booting an EFI
+ aware OS so the OS can access drives without an EFI driver.
+
+ @param[in] This The protocol instance pointer.
+ @param[out] BbsCount The number of BBS_TABLE structures
+ @param[out] BbsTable List of BBS entries
+
+ @retval EFI_SUCCESS Drive numbers assigned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *BbsCount,
+ OUT BBS_TABLE **BbsTable
+ );
+
+/**
+ To boot from an unconventional device like parties and/or execute
+ HDD diagnostics.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Attributes How to interpret the other input parameters.
+ @param[in] BbsEntry The 0-based index into the BbsTable for the parent
+ device.
+ @param[in] BeerData A pointer to the 128 bytes of ram BEER data.
+ @param[in] ServiceAreaData A pointer to the 64 bytes of raw Service Area data. The
+ caller must provide a pointer to the specific Service
+ Area and not the start all Service Areas.
+
+ @retval EFI_INVALID_PARAMETER If error. Does NOT return if no error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UDC_ATTRIBUTES Attributes,
+ IN UINTN BbsEntry,
+ IN VOID *BeerData,
+ IN VOID *ServiceAreaData
+ );
+
+/**
+ Shadow all legacy16 OPROMs that haven't been shadowed.
+ Warning: Use this with caution. This routine disconnects all EFI
+ drivers. If used externally, then the caller must re-connect EFI
+ drivers.
+
+ @param[in] This The protocol instance pointer.
+
+ @retval EFI_SUCCESS OPROMs were shadowed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This
+ );
+
+/**
+ Get a region from the LegacyBios for S3 usage.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] LegacyMemorySize The size of required region.
+ @param[in] Region The region to use.
+ 00 = Either 0xE0000 or 0xF0000 block.
+ - Bit0 = 1 0xF0000 block.
+ - Bit1 = 1 0xE0000 block.
+ @param[in] Alignment Address alignment. Bit mapped. The first non-zero
+ bit from right is alignment.
+ @param[out] LegacyMemoryAddress The Region Assigned
+
+ @retval EFI_SUCCESS The Region was assigned.
+ @retval EFI_ACCESS_DENIED The function was previously invoked.
+ @retval Other The Region was not assigned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN UINTN Region,
+ IN UINTN Alignment,
+ OUT VOID **LegacyMemoryAddress
+ );
+
+/**
+ Get a region from the LegacyBios for Tiano usage. Can only be invoked once.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] LegacyMemorySize The size of data to copy.
+ @param[in] LegacyMemoryAddress The Legacy Region destination address.
+ Note: must be in region assigned by
+ LegacyBiosGetLegacyRegion.
+ @param[in] LegacyMemorySourceAddress The source of the data to copy.
+
+ @retval EFI_SUCCESS The Region assigned.
+ @retval EFI_ACCESS_DENIED Destination was outside an assigned region.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN VOID *LegacyMemoryAddress,
+ IN VOID *LegacyMemorySourceAddress
+ );
+
+///
+/// Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()
+/// member function allows the BDS to support booting a traditional OS.
+/// EFI thunks drivers that make EFI bindings for BIOS INT services use
+/// all the other member functions.
+///
+struct _EFI_LEGACY_BIOS_PROTOCOL {
+ ///
+ /// Performs traditional software INT. See the Int86() function description.
+ ///
+ EFI_LEGACY_BIOS_INT86 Int86;
+
+ ///
+ /// Performs a far call into Compatibility16 or traditional OpROM code.
+ ///
+ EFI_LEGACY_BIOS_FARCALL86 FarCall86;
+
+ ///
+ /// Checks if a traditional OpROM exists for this device.
+ ///
+ EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;
+
+ ///
+ /// Loads a traditional OpROM in traditional OpROM address space.
+ ///
+ EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;
+
+ ///
+ /// Boots a traditional OS.
+ ///
+ EFI_LEGACY_BIOS_BOOT LegacyBoot;
+
+ ///
+ /// Updates BDA to reflect the current EFI keyboard LED status.
+ ///
+ EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;
+
+ ///
+ /// Allows an external agent, such as BIOS Setup, to get the BBS data.
+ ///
+ EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;
+
+ ///
+ /// Causes all legacy OpROMs to be shadowed.
+ ///
+ EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;
+
+ ///
+ /// Performs all actions prior to boot. Used when booting an EFI-aware OS
+ /// rather than a legacy OS.
+ ///
+ EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;
+
+ ///
+ /// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.
+ ///
+ EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;
+
+ ///
+ /// Allows EFI to copy data to the area specified by GetLegacyRegion.
+ ///
+ EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;
+
+ ///
+ /// Allows the user to boot off an unconventional device such as a PARTIES partition.
+ ///
+ EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;
+};
+
+extern EFI_GUID gEfiLegacyBiosProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/LegacyBiosPlatform.h b/Core/IntelFrameworkPkg/Include/Protocol/LegacyBiosPlatform.h new file mode 100644 index 0000000000..0d309b5f1b --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/LegacyBiosPlatform.h @@ -0,0 +1,761 @@ +/** @file
+ The EFI Legacy BIOS Patform Protocol is used to mate a Legacy16
+ implementation with this EFI code. The EFI driver that produces
+ the Legacy BIOS protocol is generic and consumes this protocol.
+ A driver that matches the Legacy16 produces this protocol
+
+Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_BIOS_PLATFORM_H_
+#define _EFI_LEGACY_BIOS_PLATFORM_H_
+
+///
+/// Legacy BIOS Platform depends on HDD_INFO and EFI_COMPATIBILITY16_TABLE that
+/// are defined with the Legacy BIOS Protocol
+///
+#include <Protocol/LegacyBios.h>
+
+#define EFI_LEGACY_BIOS_PLATFORM_PROTOCOL_GUID \
+ { \
+ 0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x9, 0x7, 0x9c, 0xc, 0xb4 } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL EFI_LEGACY_BIOS_PLATFORM_PROTOCOL;
+
+/**
+ This enum specifies the Mode param values for GetPlatformInfo()
+**/
+typedef enum {
+ ///
+ /// This mode is invoked twice. The first invocation has LegacySegment and
+ /// LegacyOffset set to 0. The mode returns the MP table address in EFI memory, along with its size.
+ /// The second invocation has LegacySegment and LegacyOffset set to the location
+ /// in the 0xF0000 or 0xE0000 block to which the MP table is to be copied. The second
+ /// invocation allows any MP table address fixes to occur in the EFI memory copy of the
+ /// MP table. The caller, not EfiGetPlatformBinaryMpTable, copies the modified MP
+ /// table to the allocated region in 0xF0000 or 0xE0000 block after the second invocation.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table Pointer to the MP table.
+ ///
+ /// TableSize Size in bytes of the MP table.
+ ///
+ /// Location Location to place table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit-mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ // LegacySegment Segment in which EfiCompatibility code will place the MP table.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the MP table.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS The MP table was returned.
+ ///
+ /// EFI_UNSUPPORTED The MP table is not supported on this platform.
+ ///
+ EfiGetPlatformBinaryMpTable = 0,
+ ///
+ /// This mode returns a block of data. The content and usage is IBV or OEM defined.
+ /// OEMs or IBVs normally use this function for nonstandard Compatibility16 runtime soft
+ /// INTs. It is the responsibility of this routine to coalesce multiple OEM 16 bit functions, if
+ /// they exist, into one coherent package that is understandable by the Compatibility16 code.
+ /// This function is invoked twice. The first invocation has LegacySegment and
+ /// LegacyOffset set to 0. The function returns the table address in EFI memory, as well as its size.
+ /// The second invocation has LegacySegment and LegacyOffset set to the location
+ /// in the 0xF0000 or 0xE0000 block to which the data (table) is to be copied. The second
+ /// invocation allows any data (table) address fixes to occur in the EFI memory copy of
+ /// the table. The caller, not GetOemIntData(), copies the modified data (table) to the
+ /// allocated region in 0xF0000 or 0xE0000 block after the second invocation.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table Pointer to OEM legacy 16 bit code or data.
+ ///
+ /// TableSize Size of data.
+ ///
+ /// Location Location to place table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ /// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS The data was returned successfully.
+ ///
+ /// EFI_UNSUPPORTED Oem INT is not supported on this platform.
+ ///
+ EfiGetPlatformBinaryOemIntData = 1,
+ ///
+ /// This mode returns a block of data. The content and usage is IBV defined. OEMs or
+ /// IBVs normally use this mode for nonstandard Compatibility16 runtime 16 bit routines. It
+ /// is the responsibility of this routine to coalesce multiple OEM 16 bit functions, if they
+ /// exist, into one coherent package that is understandable by the Compatibility16 code.
+ ///
+ /// Example usage: A legacy mobile BIOS that has a pre-existing runtime
+ /// interface to return the battery status to calling applications.
+ ///
+ /// This mode is invoked twice. The first invocation has LegacySegment and
+ /// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
+ /// The second invocation has LegacySegment and LegacyOffset set to the location
+ /// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
+ /// invocation allows any table address fixes to occur in the EFI memory copy of the table.
+ /// The caller, not EfiGetPlatformBinaryOem16Data, copies the modified table to
+ /// the allocated region in 0xF0000 or 0xE0000 block after the second invocation.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table Pointer to OEM legacy 16 bit code or data.
+ ///
+ /// TableSize Size of data.
+ ///
+ /// Location Location to place the table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ /// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS The data was returned successfully.
+ ///
+ /// EFI_UNSUPPORTED Oem16 is not supported on this platform.
+ ///
+ EfiGetPlatformBinaryOem16Data = 2,
+///
+/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
+/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
+/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
+/// exist, into one coherent package that is understandable by the Compatibility16 code.
+///
+/// Example usage: A legacy mobile BIOS that has a pre existing runtime
+/// interface to return the battery status to calling applications.
+///
+/// This mode is invoked twice. The first invocation has LegacySegment and
+/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
+///
+/// The second invocation has LegacySegment and LegacyOffset set to the location
+/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
+/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
+/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
+/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
+///
+/// Note: There are two generic mechanisms by which this mode can be used.
+/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
+/// the data into the F0000 or E0000 block in the Compatibility16 code. The
+/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
+/// be viewed as two UINT16 entries.
+/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
+/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
+/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
+/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
+/// as a single UINT32 entry as determined by the IBV.
+///
+/// The function parameters associated with this mode are:
+///
+/// TableSize Size of data.
+///
+/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
+/// Bit 0 = 1 0xF0000 64 KB block.
+/// Bit 1 = 1 0xE0000 64 KB block.
+/// Multiple bits can be set.
+///
+/// Alignment Bit mapped address alignment granularity.
+/// The first nonzero bit from the right is the address granularity.
+///
+/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+///
+/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+///
+/// The return values associated with this mode are:
+/// EFI_SUCCESS The data was returned successfully.
+/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
+///
+EfiGetPlatformBinaryOem32Data = 3,
+ ///
+ /// This mode returns a TPM binary image for the onboard TPM device.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table TPM binary image for the onboard TPM device.
+ ///
+ /// TableSize Size of BinaryImage in bytes.
+ ///
+ /// Location Location to place the table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ /// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS BinaryImage is valid.
+ ///
+ /// EFI_UNSUPPORTED Mode is not supported on this platform.
+ ///
+ /// EFI_NOT_FOUND No BinaryImage was found.
+ ///
+ EfiGetPlatformBinaryTpmBinary = 4,
+ ///
+ /// The mode finds the Compatibility16 Rom Image.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// System ROM image for the platform.
+ ///
+ /// TableSize Size of Table in bytes.
+ ///
+ /// Location Ignored.
+ ///
+ /// Alignment Ignored.
+ ///
+ /// LegacySegment Ignored.
+ ///
+ /// LegacyOffset Ignored.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS ROM image found.
+ ///
+ /// EFI_NOT_FOUND ROM not found.
+ ///
+ EfiGetPlatformBinarySystemRom = 5,
+ ///
+ /// This mode returns the Base address of PciExpress memory mapped configuration
+ /// address space.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table System ROM image for the platform.
+ ///
+ /// TableSize Size of Table in bytes.
+ ///
+ /// Location Ignored.
+ ///
+ /// Alignment Ignored.
+ ///
+ /// LegacySegment Ignored.
+ ///
+ /// LegacyOffset Ignored.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS Address is valid.
+ ///
+ /// EFI_UNSUPPORTED System does not PciExpress.
+ ///
+ EfiGetPlatformPciExpressBase = 6,
+ ///
+ EfiGetPlatformPmmSize = 7,
+ ///
+ EfiGetPlatformEndOpromShadowAddr = 8,
+ ///
+} EFI_GET_PLATFORM_INFO_MODE;
+
+/**
+ This enum specifies the Mode param values for GetPlatformHandle().
+**/
+typedef enum {
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the VGA
+ /// controller used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all VGA handles found.
+ ///
+ /// HandleCount Number of VGA handles found.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiGetPlatformVgaHandle = 0,
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the IDE
+ /// controller used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all IDE handles found.
+ ///
+ /// HandleCount Number of IDE handles found.
+ ///
+ /// AdditionalData Pointer to HddInfo.
+ /// Information about all onboard IDE controllers.
+ ///
+ EfiGetPlatformIdeHandle = 1,
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the ISA bus
+ /// controller used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all ISA bus handles found.
+ ///
+ /// HandleCount Number of ISA bus handles found.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiGetPlatformIsaBusHandle = 2,
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the USB
+ /// device used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all USB handles found.
+ ///
+ /// HandleCount Number of USB bus handles found.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiGetPlatformUsbHandle = 3
+} EFI_GET_PLATFORM_HANDLE_MODE;
+
+/**
+ This enum specifies the Mode param values for PlatformHooks().
+ Note: Any OEM defined hooks start with 0x8000.
+**/
+typedef enum {
+ ///
+ /// This mode allows any preprocessing before scanning OpROMs.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0.
+ ///
+ /// DeviceHandle Handle of device OpROM is associated with.
+ ///
+ /// ShadowAddress Address where OpROM is shadowed.
+ ///
+ /// Compatibility16Table NULL.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiPlatformHookPrepareToScanRom = 0,
+ ///
+ /// This mode shadows legacy OpROMS that may not have a physical device associated with
+ /// them. It returns EFI_SUCCESS if the ROM was shadowed.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0.
+ ///
+ /// DeviceHandle 0.
+ ///
+ /// ShadowAddress First free OpROM area, after other OpROMs have been dispatched..
+ ///
+ /// Compatibility16Table Pointer to the Compatability16 Table.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiPlatformHookShadowServiceRoms= 1,
+ ///
+ /// This mode allows platform to perform any required operation after an OpROM has
+ /// completed its initialization.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0.
+ ///
+ /// DeviceHandle Handle of device OpROM is associated with.
+ ///
+ /// ShadowAddress Address where OpROM is shadowed.
+ ///
+ /// Compatibility16Table NULL.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiPlatformHookAfterRomInit = 2
+} EFI_GET_PLATFORM_HOOK_MODE;
+
+///
+/// This IRQ has not been assigned to PCI.
+///
+#define PCI_UNUSED 0x00
+///
+/// This IRQ has been assigned to PCI.
+///
+#define PCI_USED 0xFF
+///
+/// This IRQ has been used by an SIO legacy device and cannot be used by PCI.
+///
+#define LEGACY_USED 0xFE
+
+#pragma pack(1)
+
+typedef struct {
+ ///
+ /// IRQ for this entry.
+ ///
+ UINT8 Irq;
+ ///
+ /// Status of this IRQ.
+ ///
+ /// PCI_UNUSED 0x00. This IRQ has not been assigned to PCI.
+ ///
+ /// PCI_USED 0xFF. This IRQ has been assigned to PCI.
+ ///
+ /// LEGACY_USED 0xFE. This IRQ has been used by an SIO legacy
+ /// device and cannot be used by PCI.
+ ///
+ UINT8 Used;
+} EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY;
+
+//
+// Define PIR table structures
+//
+#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
+
+typedef struct {
+ ///
+ /// $PIR.
+ ///
+ UINT32 Signature;
+ ///
+ /// 0x00.
+ ///
+ UINT8 MinorVersion;
+ ///
+ /// 0x01 for table version 1.0.
+ ///
+ UINT8 MajorVersion;
+ ///
+ /// 0x20 + RoutingTableEntries * 0x10.
+ ///
+ UINT16 TableSize;
+ ///
+ /// PCI interrupt router bus.
+ ///
+ UINT8 Bus;
+ ///
+ /// PCI interrupt router device/function.
+ ///
+ UINT8 DevFun;
+ ///
+ /// If nonzero, bit map of IRQs reserved for PCI.
+ ///
+ UINT16 PciOnlyIrq;
+ ///
+ /// Vendor ID of a compatible PCI interrupt router.
+ ///
+ UINT16 CompatibleVid;
+ ///
+ /// Device ID of a compatible PCI interrupt router.
+ ///
+ UINT16 CompatibleDid;
+ ///
+ /// If nonzero, a value passed directly to the IRQ miniport's Initialize function.
+ ///
+ UINT32 Miniport;
+ ///
+ /// Reserved for future usage.
+ ///
+ UINT8 Reserved[11];
+ ///
+ /// This byte plus the sum of all other bytes in the LocalPirqTable equal 0x00.
+ ///
+ UINT8 Checksum;
+} EFI_LEGACY_PIRQ_TABLE_HEADER;
+
+
+typedef struct {
+ ///
+ /// If nonzero, a value assigned by the IBV.
+ ///
+ UINT8 Pirq;
+ ///
+ /// If nonzero, the IRQs that can be assigned to this device.
+ ///
+ UINT16 IrqMask;
+} EFI_LEGACY_PIRQ_ENTRY;
+
+typedef struct {
+ ///
+ /// PCI bus of the entry.
+ ///
+ UINT8 Bus;
+ ///
+ /// PCI device of this entry.
+ ///
+ UINT8 Device;
+ ///
+ /// An IBV value and IRQ mask for PIRQ pins A through D.
+ ///
+ EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
+ ///
+ /// If nonzero, the slot number assigned by the board manufacturer.
+ ///
+ UINT8 Slot;
+ ///
+ /// Reserved for future use.
+ ///
+ UINT8 Reserved;
+} EFI_LEGACY_IRQ_ROUTING_ENTRY;
+
+#pragma pack()
+
+
+/**
+ Finds the binary data or other platform information.
+
+ @param This The protocol instance pointer.
+ @param Mode Specifies what data to return. See See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param Table Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param TableSize Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param Location Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param Alignment Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param LegacySegment Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param LegacyOffset Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+
+ @retval EFI_SUCCESS Data returned successfully.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Binary image or table not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_INFO_MODE Mode,
+ OUT VOID **Table,
+ OUT UINTN *TableSize,
+ OUT UINTN *Location,
+ OUT UINTN *Alignment,
+ IN UINT16 LegacySegment,
+ IN UINT16 LegacyOffset
+ );
+
+/**
+ Returns a buffer of handles for the requested subfunction.
+
+ @param This The protocol instance pointer.
+ @param Mode Specifies what handle to return. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param Type Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param HandleBuffer Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param HandleCount Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param AdditionalData Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+
+ @retval EFI_SUCCESS Handle is valid.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Handle is not known.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
+ IN UINT16 Type,
+ OUT EFI_HANDLE **HandleBuffer,
+ OUT UINTN *HandleCount,
+ IN VOID **AdditionalData OPTIONAL
+ );
+
+/**
+ Load and initialize the Legacy BIOS SMM handler.
+
+ @param This The protocol instance pointer.
+ @param EfiToLegacy16BootTable A pointer to Legacy16 boot table.
+
+ @retval EFI_SUCCESS SMM code loaded.
+ @retval EFI_DEVICE_ERROR SMM code failed to load
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_SMM_INIT)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN VOID *EfiToLegacy16BootTable
+ );
+
+/**
+ Allows platform to perform any required action after a LegacyBios operation.
+ Invokes the specific sub function specified by Mode.
+
+ @param This The protocol instance pointer.
+ @param Mode Specifies what handle to return. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param Type Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param DeviceHandle Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param ShadowAddress Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param Compatibility16Table Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param AdditionalData Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+
+ @retval EFI_SUCCESS The operation performed successfully. Mode specific.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_HOOKS)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HOOK_MODE Mode,
+ IN UINT16 Type,
+ IN EFI_HANDLE DeviceHandle, OPTIONAL
+ IN OUT UINTN *ShadowAddress, OPTIONAL
+ IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table, OPTIONAL
+ OUT VOID **AdditionalData OPTIONAL
+ );
+
+/**
+ Returns information associated with PCI IRQ routing.
+ This function returns the following information associated with PCI IRQ routing:
+ * An IRQ routing table and number of entries in the table.
+ * The $PIR table and its size.
+ * A list of PCI IRQs and the priority order to assign them.
+
+ @param This The protocol instance pointer.
+ @param RoutingTable The pointer to PCI IRQ Routing table.
+ This location is the $PIR table minus the header.
+ @param RoutingTableEntries The number of entries in table.
+ @param LocalPirqTable $PIR table.
+ @param PirqTableSize $PIR table size.
+ @param LocalIrqPriorityTable A list of interrupts in priority order to assign.
+ @param IrqPriorityTableEntries The number of entries in the priority table.
+
+ @retval EFI_SUCCESS Data was successfully returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ OUT VOID **RoutingTable,
+ OUT UINTN *RoutingTableEntries,
+ OUT VOID **LocalPirqTable, OPTIONAL
+ OUT UINTN *PirqTableSize, OPTIONAL
+ OUT VOID **LocalIrqPriorityTable, OPTIONAL
+ OUT UINTN *IrqPriorityTableEntries OPTIONAL
+ );
+
+/**
+ Translates the given PIRQ accounting for bridge.
+ This function translates the given PIRQ back through all buses, if required,
+ and returns the true PIRQ and associated IRQ.
+
+ @param This The protocol instance pointer.
+ @param PciBus The PCI bus number for this device.
+ @param PciDevice The PCI device number for this device.
+ @param PciFunction The PCI function number for this device.
+ @param Pirq Input is PIRQ reported by device, and output is true PIRQ.
+ @param PciIrq The IRQ already assigned to the PIRQ, or the IRQ to be
+ assigned to the PIRQ.
+
+ @retval EFI_SUCCESS The PIRQ was translated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN UINTN PciBus,
+ IN UINTN PciDevice,
+ IN UINTN PciFunction,
+ IN OUT UINT8 *Pirq,
+ OUT UINT8 *PciIrq
+ );
+
+/**
+ Attempt to legacy boot the BootOption. If the EFI contexted has been
+ compromised this function will not return.
+
+ @param This The protocol instance pointer.
+ @param BbsDevicePath The EFI Device Path from BootXXXX variable.
+ @param BbsTable The Internal BBS table.
+ @param LoadOptionSize The size of LoadOption in size.
+ @param LoadOption The LoadOption from BootXXXX variable
+ @param EfiToLegacy16BootTable A pointer to BootTable structure
+
+ @retval EFI_SUCCESS Ready to boot.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
+ IN VOID *BbsTable,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions,
+ IN VOID *EfiToLegacy16BootTable
+ );
+
+/**
+ This protocol abstracts the platform portion of the traditional BIOS.
+**/
+struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL {
+ ///
+ /// Gets binary data or other platform information.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
+ ///
+ /// Returns a buffer of all handles matching the requested subfunction.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
+ ///
+ /// Loads and initializes the traditional BIOS SMM handler.
+ EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
+ ///
+ /// Allows platform to perform any required actions after a LegacyBios operation.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
+ ///
+ /// Gets $PIR table.
+ EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
+ ///
+ /// Translates the given PIRQ to the final value after traversing any PCI bridges.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
+ ///
+ /// Final platform function before the system attempts to boot to a traditional OS.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
+};
+
+extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/LegacyInterrupt.h b/Core/IntelFrameworkPkg/Include/Protocol/LegacyInterrupt.h new file mode 100644 index 0000000000..8b2d56b2d3 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/LegacyInterrupt.h @@ -0,0 +1,128 @@ +/** @file
+ This protocol abstracts the PIRQ programming from the generic EFI Compatibility Support Modules (CSMs).
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Framework for the EFI Compatibility Support Module specification.
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_INTERRUPT_H_
+#define _EFI_LEGACY_INTERRUPT_H_
+
+
+#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \
+ { \
+ 0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \
+ }
+
+typedef struct _EFI_LEGACY_INTERRUPT_PROTOCOL EFI_LEGACY_INTERRUPT_PROTOCOL;
+
+/**
+ Get the number of PIRQs this hardware supports.
+
+ @param This The protocol instance pointer.
+ @param NumberPirsq The number of PIRQs that are supported.
+
+ @retval EFI_SUCCESS The number of PIRQs was returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *NumberPirqs
+ );
+
+/**
+ Gets the PCI location associated with this protocol.
+
+ @param This The Protocol instance pointer.
+ @param Bus The PCI Bus.
+ @param Device The PCI Device.
+ @param Function The PCI Function.
+
+ @retval EFI_SUCCESS The Bus, Device, and Function were returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_LOCATION)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *Bus,
+ OUT UINT8 *Device,
+ OUT UINT8 *Function
+ );
+
+/**
+ Read the PIRQ register and return the data
+
+ @param This The protocol instance pointer.
+ @param PirqNumber The PIRQ register to read.
+ @param PirqData The data read.
+
+ @retval EFI_SUCCESS The data was read.
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_READ_PIRQ)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ OUT UINT8 *PirqData
+ );
+
+/**
+ Write the specified PIRQ register with the given data.
+
+ @param This The protocol instance pointer.
+ @param PirqNumber A PIRQ register to read.
+ @param PirqData The data to write.
+
+ @retval EFI_SUCCESS The PIRQ was programmed.
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_WRITE_PIRQ)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ IN UINT8 PirqData
+ );
+
+struct _EFI_LEGACY_INTERRUPT_PROTOCOL {
+ ///
+ /// Gets the number of PIRQs supported.
+ ///
+ EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
+
+ ///
+ /// Gets the PCI bus, device, and function that is associated with this protocol.
+ ///
+ EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
+
+ ///
+ /// Reads the indicated PIRQ register.
+ ///
+ EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
+
+ ///
+ /// Writes to the indicated PIRQ register.
+ ///
+ EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
+};
+
+extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/LegacyRegion.h b/Core/IntelFrameworkPkg/Include/Protocol/LegacyRegion.h new file mode 100644 index 0000000000..b18e8bc40b --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/LegacyRegion.h @@ -0,0 +1,125 @@ +/** @file
+ This protocol manages the legacy memory regions between 0xc0000 - 0xfffff.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_REGION_H_
+#define _EFI_LEGACY_REGION_H_
+
+
+#define EFI_LEGACY_REGION_PROTOCOL_GUID \
+ { \
+ 0xfc9013a, 0x568, 0x4ba9, {0x9b, 0x7e, 0xc9, 0xc3, 0x90, 0xa6, 0x60, 0x9b } \
+ }
+
+typedef struct _EFI_LEGACY_REGION_PROTOCOL EFI_LEGACY_REGION_PROTOCOL;
+
+/**
+ Sets hardware to decode or not decode a region.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+ @param Start The start of the region to decode.
+ @param Length The size in bytes of the region.
+ @param On The decode/nondecode flag.
+
+ @retval EFI_SUCCESS The decode range successfully changed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_DECODE)(
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ IN BOOLEAN *On
+ );
+
+/**
+ Sets a region to read only.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance.
+ @param Start The start of region to lock.
+ @param Length The size in bytes of the region.
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was made read only.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_LOCK)(
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ Sets a region to read only and ensures that flash is locked from being
+ inadvertently modified.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+ @param Start The start of region to lock.
+ @param Length The size in bytes of the region.
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was made read only and flash is locked.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_BOOT_LOCK)(
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ Sets a region to read-write.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+ @param Start The start of region to lock.
+ @param Length The size in bytes of the region.
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was successfully made read-write.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_UNLOCK)(
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ Abstracts the hardware control of the physical address region 0xC0000-C0xFFFFF
+ for the traditional BIOS.
+**/
+struct _EFI_LEGACY_REGION_PROTOCOL {
+ EFI_LEGACY_REGION_DECODE Decode; ///< Specifies a region for the chipset to decode.
+ EFI_LEGACY_REGION_LOCK Lock; ///< Makes the specified OpROM region read only or locked.
+ EFI_LEGACY_REGION_BOOT_LOCK BootLock; ///< Sets a region to read only and ensures tat flash is locked from.
+ ///< inadvertent modification.
+ EFI_LEGACY_REGION_UNLOCK UnLock; ///< Makes the specified OpROM region read-write or unlocked.
+};
+
+extern EFI_GUID gEfiLegacyRegionProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SectionExtraction.h b/Core/IntelFrameworkPkg/Include/Protocol/SectionExtraction.h new file mode 100644 index 0000000000..ef1d24ae52 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SectionExtraction.h @@ -0,0 +1,161 @@ +/** @file
+ This file declares Section Extraction Protocol.
+
+ This interface provides a means of decoding a set of sections into a linked list of
+ leaf sections. This provides for an extensible and flexible file format.
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume Specification.
+ Version 0.9.
+
+**/
+
+#ifndef _SECTION_EXTRACTION_PROTOCOL_H_
+#define _SECTION_EXTRACTION_PROTOCOL_H_
+
+//
+// Protocol GUID definition
+//
+#define EFI_SECTION_EXTRACTION_PROTOCOL_GUID \
+ { \
+ 0x448F5DA4, 0x6DD7, 0x4FE1, {0x93, 0x07, 0x69, 0x22, 0x41, 0x92, 0x21, 0x5D } \
+ }
+
+typedef struct _EFI_SECTION_EXTRACTION_PROTOCOL EFI_SECTION_EXTRACTION_PROTOCOL;
+
+//
+// Protocol member functions
+//
+/**
+ Creates and returns a new section stream handle to represent the new section stream.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamLength The size in bytes of the section stream.
+ @param SectionStream A buffer containing the new section stream.
+ @param SectionStreamHandle A pointer to a caller-allocated UINTN that,
+ on output, contains the new section stream handle.
+
+ @retval EFI_SUCCESS The SectionStream was successfully processed, and
+ the section stream handle was returned.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to
+ process the request.
+ @retval EFI_INVALID_PARAMETER The section stream may be corrupt or the value
+ of SectionStreamLength may be incorrect.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_OPEN_SECTION_STREAM)(
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamLength,
+ IN VOID *SectionStream,
+ OUT UINTN *SectionStreamHandle
+ );
+
+/**
+ Reads and returns a single section from a section stream.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamHandle Indicates from which section stream to read.
+ @param SectionType The pointer to an EFI_SECTION_TYPE. If SectionType == NULL,
+ the contents of the entire section stream are returned
+ in Buffer. If SectionType is not NULL, only the
+ requested section is returned. EFI_SECTION_ALL
+ matches all section types and can be used as a
+ wild card to extract all sections in order.
+ @param SectionDefinitionGuid The pointer to an EFI_GUID. If SectionType ==
+ EFI_SECTION_GUID_DEFINED, SectionDefinitionGuid
+ indicates what section GUID to search for. If
+ SectionType !=EFI_SECTION_GUID_DEFINED, then
+ SectionDefinitionGuid is unused and is ignored.
+ @param SectionInstance Indicates which instance of the requested section
+ type to return when SectionType is not NULL.
+ @param SectionStreamHandle A pointer to a caller-allocated UINTN that, on output,
+ contains the new section stream handle.
+ @param Buffer Pointer to a pointer to a buffer in which the section
+ contents are returned.
+ @param BufferSize A pointer to a caller-allocated UINTN.
+ @param AuthenticationStatus A pointer to a caller-allocated UINT32 in
+ which any meta-data from encapsulation GUID-defined
+ sections is returned.
+
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section contents were returned in Buffer.
+ @retval EFI_PROTOCOL_ERROR A GUID-defined section was encountered inthe section
+ stream with its EFI_GUIDED_SECTION_PROCESSING_REQUIRED
+ bit set, but there was no corresponding GUIDed
+ Section Extraction Protocol in the handle database.
+ @retval EFI_NOT_FOUND An error was encountered when parsing the SectionStream,
+ which indicates that the SectionStream is not
+ correctly formatted. Or, the requested section does not exist.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to process
+ the request.
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The size of the input buffer is insufficient
+ to contain the requested section. The input
+ buffer is filled and section contents are truncated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_SECTION)(
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamHandle,
+ IN EFI_SECTION_TYPE *SectionType,
+ IN EFI_GUID *SectionDefinitionGuid,
+ IN UINTN SectionInstance,
+ IN VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ Deletes a section stream handle and returns all associated resources to the system.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamHandle Indicates the section stream to close.
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section stream handle was returned.
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CLOSE_SECTION_STREAM)(
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamHandle
+ );
+
+//
+// Protocol definition
+//
+struct _EFI_SECTION_EXTRACTION_PROTOCOL {
+ ///
+ /// Takes a bounded stream of sections and returns a section stream handle.
+ ///
+ EFI_OPEN_SECTION_STREAM OpenSectionStream;
+
+ ///
+ /// Given a section stream handle, retrieves the requested section and
+ /// meta-data from the section stream.
+ ///
+ EFI_GET_SECTION GetSection;
+
+ ///
+ /// Given a section stream handle, closes the section stream.
+ ///
+ EFI_CLOSE_SECTION_STREAM CloseSectionStream;
+};
+
+extern EFI_GUID gEfiSectionExtractionProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmAccess.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmAccess.h new file mode 100644 index 0000000000..16d66b93ad --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmAccess.h @@ -0,0 +1,130 @@ +/** @file
+ This file declares the SMM SMRAM Access abstraction protocol, which is used to control
+ the visibility of the SMRAM on the platform. The expectation is
+ that the north bridge or memory controller would publish this protocol.
+ For example, the Memory Controller Hub (MCH) has the hardware provision for this
+ type of control. Because of the protected, distinguished class of memory for IA-32
+ systems, the expectation is that this protocol would be supported only on IA-32 systems.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+**/
+
+#ifndef _SMM_ACCESS_H_
+#define _SMM_ACCESS_H_
+
+#include <Guid/SmramMemoryReserve.h>
+
+typedef struct _EFI_SMM_ACCESS_PROTOCOL EFI_SMM_ACCESS_PROTOCOL;
+
+#define EFI_SMM_ACCESS_PROTOCOL_GUID \
+ { \
+ 0x3792095a, 0xe309, 0x4c1e, {0xaa, 0x01, 0x85, 0xf5, 0x65, 0x5a, 0x17, 0xf1 } \
+ }
+
+//
+// SMM Access specification Member Function
+//
+/**
+ Opens the SMRAM area to be accessible by a boot-service driver.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param DescriptorIndex Indicates that the driver wishes to open
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_OPEN)(
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param DescriptorIndex Indicates that the driver wishes to close
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_DEVICE_ERROR The given DescriptorIndex is not open.
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CLOSE)(
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param DescriptorIndex Indicates that the driver wishes to lock
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_DEVICE_ERROR The given DescriptorIndex is not open.
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_LOCK)(
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Queries the memory controller for the possible regions that will support SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+ @param SmramMapSize A pointer to the size, in bytes, of the SmramMemoryMap buffer.
+ @param SmramMap A pointer to the buffer in which firmware places the current memory map.
+
+ @retval EFI_SUCCESS The chipset supported the given resource.
+ @retval EFI_BUFFER_TOO_SMALL The SmramMap parameter was too small.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CAPABILITIES)(
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ IN OUT UINTN *SmramMapSize,
+ IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
+ );
+
+/**
+ This protocol is used to control the visibility of the SMRAM on the platform.
+**/
+struct _EFI_SMM_ACCESS_PROTOCOL {
+ EFI_SMM_OPEN Open; ///< Opens the SMRAM.
+ EFI_SMM_CLOSE Close; ///< Closes the SMRAM.
+ EFI_SMM_LOCK Lock; ///< Locks the SMRAM.
+ EFI_SMM_CAPABILITIES GetCapabilities; ///< Gets information on possible SMRAM regions.
+ BOOLEAN LockState; ///< Indicates the current state of the SMRAM. Set to TRUE if any region is locked.
+ BOOLEAN OpenState; ///< Indicates the current state of the SMRAM. Set to TRUE if any region is open.
+};
+
+extern EFI_GUID gEfiSmmAccessProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmBase.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmBase.h new file mode 100644 index 0000000000..0429c574d1 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmBase.h @@ -0,0 +1,310 @@ +/** @file
+ This file declares SMM Base abstraction protocol.
+ This protocol is used to install SMM handlers for support of subsequent SMI/PMI activations. This
+ protocol is available on both IA-32 and Itanium-based systems.
+
+ The EFI_SMM_BASE_PROTOCOL is a set of services that is exported by a processor device. It is
+ a required protocol for the platform processor. This protocol can be used in both boot services and
+ runtime mode. However, only the following member functions need to exist during runtime:
+ - InSmm()
+ - Communicate()
+ This protocol is responsible for registering the handler services. The order in which the handlers are
+ executed is prescribed only with respect to the MakeLast flag in the RegisterCallback()
+ service. The driver exports these registration and unregistration services in boot services mode, but
+ the registered handlers will execute through the preboot and runtime. The only way to change the
+ behavior of a registered driver after ExitBootServices() has been invoked is to use some
+ private communication mechanism with the driver to order it to quiesce. This model permits typical
+ use cases, such as invoking the handler to enter ACPI mode, where the OS loader would make this
+ call before boot services are terminated. On the other hand, handlers for services such as chipset
+ workarounds for the century rollover in CMOS should provide commensurate services throughout
+ preboot and OS runtime.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _SMM_BASE_H_
+#define _SMM_BASE_H_
+
+//
+// Share some common definitions with PI SMM
+//
+#include <Framework/SmmCis.h>
+#include <Protocol/SmmCommunication.h>
+
+///
+/// Global ID for the EFI_SMM_BASE_PROTOCOL.
+///
+#define EFI_SMM_BASE_PROTOCOL_GUID \
+ { \
+ 0x1390954D, 0xda95, 0x4227, {0x93, 0x28, 0x72, 0x82, 0xc2, 0x17, 0xda, 0xa8 } \
+ }
+
+///
+/// Forward declaration for EFI_SMM_BASE_PROTOCOL.
+///
+typedef struct _EFI_SMM_BASE_PROTOCOL EFI_SMM_BASE_PROTOCOL;
+
+///
+/// EFI SMM Handler return codes
+///
+///@{
+#define EFI_HANDLER_SUCCESS 0x0000
+#define EFI_HANDLER_CRITICAL_EXIT 0x0001
+#define EFI_HANDLER_SOURCE_QUIESCED 0x0002
+#define EFI_HANDLER_SOURCE_PENDING 0x0003
+///@}
+
+/**
+ Entry Point to Callback service
+
+ @param[in] SmmImageHandle A handle allocated by the SMM infrastructure code
+ to uniquely designate a specific DXE SMM driver.
+ @param[in] CommunicationBuffer A pointer to a collection of data in memory
+ that will be conveyed from a non-SMM environment
+ into an SMM environment. The buffer must be
+ contiguous and physically mapped, and must be
+ a physical address.
+ @param[in] SourceSize The size of the CommunicationBuffer.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CALLBACK_ENTRY_POINT)(
+ IN EFI_HANDLE SmmImageHandle,
+ IN OUT VOID *CommunicationBuffer OPTIONAL,
+ IN OUT UINTN *SourceSize OPTIONAL
+ );
+
+//
+// SMM Base Protocol Definition
+//
+/**
+ Register a given driver into SMRAM. This is the equivalent of performing
+ the LoadImage/StartImage into System Management Mode.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] FilePath The location of the image to be installed as the handler.
+ @param[in] SourceBuffer An optional source buffer in case the image file
+ is in memory.
+ @param[in] SourceSize The size of the source image file, if in memory.
+ @param[out] ImageHandle The handle that the base driver uses to decode
+ the handler. Unique among SMM handlers only;
+ not unique across DXE/EFI.
+ @param[in] LegacyIA32Binary An optional parameter specifying that the associated
+ file is a real-mode IA-32 binary.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_OUT_OF_RESOURCES There were no additional SMRAM resources to load the handler
+ @retval EFI_UNSUPPORTED This platform does not support 16-bit handlers.
+ @retval EFI_UNSUPPORTED The platform is in runtime.
+ @retval EFI_INVALID_PARAMETER The handlers were not the correct image type.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_REGISTER_HANDLER)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN VOID *SourceBuffer OPTIONAL,
+ IN UINTN SourceSize,
+ OUT EFI_HANDLE *ImageHandle,
+ IN BOOLEAN LegacyIA32Binary OPTIONAL
+ );
+
+/**
+ Removes a handler from execution within SMRAM. This is the equivalent of performing
+ the UnloadImage in System Management Mode.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] ImageHandle The handler to be removed.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_INVALID_PARAMETER The handler did not exist.
+ @retval EFI_UNSUPPORTED The platform is in runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_UNREGISTER_HANDLER)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle
+ );
+
+/**
+ The SMM Inter-module Communicate Service Communicate() function
+ provides a service to send/receive messages from a registered
+ EFI service. The BASE protocol driver is responsible for doing
+ any of the copies such that the data lives in boot-service-accessible RAM.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] ImageHandle The handle of the registered driver.
+ @param[in,out] CommunicationBuffer The pointer to the buffer to convey into SMRAM.
+ @param[in,out] SourceSize The size of the data buffer being passed in.
+ On exit, the size of data being returned.
+ Zero if the handler does not wish to reply with any data.
+
+ @retval EFI_SUCCESS The message was successfully posted.
+ @retval EFI_INVALID_PARAMETER The buffer was NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_COMMUNICATE)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle,
+ IN OUT VOID *CommunicationBuffer,
+ IN OUT UINTN *SourceSize
+ );
+
+/**
+ Register a callback to execute within SMM.
+ This allows receipt of messages created with EFI_SMM_BASE_PROTOCOL.Communicate().
+
+ @param[in] This Protocol instance pointer.
+ @param[in] SmmImageHandle Handle of the callback service.
+ @param[in] CallbackAddress Address of the callback service.
+ @param[in] MakeLast If present, will stipulate that the handler is posted to
+ be executed last in the dispatch table.
+ @param[in] FloatingPointSave An optional parameter that informs the
+ EFI_SMM_ACCESS_PROTOCOL Driver core if it needs to save
+ the floating point register state. If any handler
+ require this, the state will be saved for all handlers.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_OUT_OF_RESOURCES Not enough space in the dispatch queue.
+ @retval EFI_UNSUPPORTED The platform is in runtime.
+ @retval EFI_UNSUPPORTED The caller is not in SMM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CALLBACK_SERVICE)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE SmmImageHandle,
+ IN EFI_SMM_CALLBACK_ENTRY_POINT CallbackAddress,
+ IN BOOLEAN MakeLast OPTIONAL,
+ IN BOOLEAN FloatingPointSave OPTIONAL
+ );
+
+/**
+ The SmmAllocatePool() function allocates a memory region of Size bytes from memory of
+ type PoolType and returns the address of the allocated memory in the location referenced
+ by Buffer. This function allocates pages from EFI SMRAM Memory as needed to grow the
+ requested pool type. All allocations are eight-byte aligned.
+
+ @param[in] This Protocol instance pointer.
+ @param[in] PoolType The type of pool to allocate.
+ The only supported type is EfiRuntimeServicesData;
+ the interface will internally map this runtime request to
+ SMRAM for IA-32 and leave as this type for the Itanium
+ processor family. Other types can be ignored.
+ @param[in] Size The number of bytes to allocate from the pool.
+ @param[out] Buffer A pointer to a pointer to the allocated buffer if the call
+ succeeds; undefined otherwise.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+ @retval EFI_UNSUPPORTED The platform is in runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ALLOCATE_POOL)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ );
+
+/**
+ The SmmFreePool() function returns the memory specified by Buffer to the system.
+ On return, the memory's type is EFI SMRAM Memory. The Buffer that is freed must
+ have been allocated by SmmAllocatePool().
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Buffer The pointer to the buffer allocation.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+ @retval EFI_INVALID_PARAMETER The buffer was invalid.
+ @retval EFI_UNSUPPORTED The platform is in runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_FREE_POOL)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN VOID *Buffer
+ );
+
+/**
+ This routine tells caller if execution context is SMM or not.
+
+ @param[in] This The protocol instance pointer.
+ @param[out] InSmm Whether the caller is inside SMM for IA-32
+ or servicing a PMI for the Itanium processor
+ family.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_INVALID_PARAMETER InSmm was NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_INSIDE_OUT)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ OUT BOOLEAN *InSmm
+ );
+
+/**
+ The GetSmstLocation() function returns the location of the System Management
+ Service Table. The use of the API is such that a driver can discover the
+ location of the SMST in its entry point and then cache it in some driver
+ global variable so that the SMST can be invoked in subsequent callbacks.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Smst The pointer to the SMST.
+
+ @retval EFI_SUCCESS The operation was successful
+ @retval EFI_INVALID_PARAMETER Smst was invalid.
+ @retval EFI_UNSUPPORTED Not in SMM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GET_SMST_LOCATION)(
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN OUT EFI_SMM_SYSTEM_TABLE **Smst
+ );
+
+///
+/// This protocol is used to install SMM handlers for support of subsequent SMI/PMI
+/// activations. This protocol is available on both IA-32 and Itanium-based systems.
+///
+struct _EFI_SMM_BASE_PROTOCOL {
+ EFI_SMM_REGISTER_HANDLER Register;
+ EFI_SMM_UNREGISTER_HANDLER UnRegister;
+ EFI_SMM_COMMUNICATE Communicate;
+ EFI_SMM_CALLBACK_SERVICE RegisterCallback;
+ EFI_SMM_INSIDE_OUT InSmm;
+ EFI_SMM_ALLOCATE_POOL SmmAllocatePool;
+ EFI_SMM_FREE_POOL SmmFreePool;
+ EFI_SMM_GET_SMST_LOCATION GetSmstLocation;
+};
+
+extern EFI_GUID gEfiSmmBaseProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmControl.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmControl.h new file mode 100644 index 0000000000..d49831ca90 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmControl.h @@ -0,0 +1,180 @@ +/** @file
+ This file declares the SMM Control abstraction protocol.
+ This protocol is used to initiate SMI/PMI activations. This protocol could be published by either:
+ - A processor driver to abstract the SMI/PMI IPI
+ - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an
+ Intel chipset
+ Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
+ event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based
+ systems.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _SMM_CONTROL_H_
+#define _SMM_CONTROL_H_
+
+
+typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;
+
+#define EFI_SMM_CONTROL_PROTOCOL_GUID \
+ { \
+ 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \
+ }
+//
+// SMM Access specification Data Structures
+//
+typedef struct {
+ ///
+ /// Describes the I/O location of the particular port that engendered the synchronous
+ /// SMI. For example, this location can include but is not limited to the traditional
+ /// PCAT* APM port of 0B2h.
+ ///
+ UINT8 SmiTriggerRegister;
+ ///
+ /// Describes the value that was written to the respective activation port.
+ ///
+ UINT8 SmiDataRegister;
+} EFI_SMM_CONTROL_REGISTER;
+
+//
+// SMM Control specification member function
+//
+/**
+ Invokes SMI activation from either the preboot or runtime environment.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+ @param ArgumentBuffer The optional sized data to pass into the protocol activation.
+ @param ArgumentBufferSize The optional size of the data.
+ @param Periodic An optional mechanism to periodically repeat activation.
+ @param ActivationInterval An optional parameter to repeat at this period one
+ time or, if the Periodic Boolean is set, periodically.
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+ @retval EFI_DEVICE_ERROR The timing is unsupported.
+ @retval EFI_INVALID_PARAMETER The activation period is unsupported.
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ACTIVATE)(
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN OUT INT8 *ArgumentBuffer OPTIONAL,
+ IN OUT UINTN *ArgumentBufferSize OPTIONAL,
+ IN BOOLEAN Periodic OPTIONAL,
+ IN UINTN ActivationInterval OPTIONAL
+ );
+
+/**
+ Clears any system state that was created in response to the Active call.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+ @param Periodic Optional parameter to repeat at this period one
+ time or, if the Periodic Boolean is set, periodically.
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+ @retval EFI_DEVICE_ERROR The source could not be cleared.
+ @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_DEACTIVATE)(
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN BOOLEAN Periodic OPTIONAL
+ );
+
+/**
+ Provides information on the source register used to generate the SMI.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+ @param SmiRegister A pointer to the SMI register description structure.
+
+ @retval EFI_SUCCESS The register structure has been returned.
+ @retval EFI_DEVICE_ERROR The source could not be cleared.
+ @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GET_REGISTER_INFO)(
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister
+ );
+
+/**
+ @par Protocol Description:
+ This protocol is used to initiate SMI/PMI activations.
+
+ @param Trigger
+ Initiates the SMI/PMI activation.
+
+ @param Clear
+ Quiesces the SMI/PMI activation.
+
+ @param GetRegisterInfo
+ Provides data on the register used as the source of the SMI.
+
+ @param MinimumTriggerPeriod
+ Minimum interval at which the platform can set the period.
+
+ @retval EFI_SUCCESS The register structure has been returned.
+**/
+
+//
+// SMM Control Protocol
+//
+/**
+ This protocol is used to initiate SMI/PMI activations.
+ This protocol could be published by either:
+ - A processor driver to abstract the SMI/PMI IPI.
+ - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset.
+ Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this.
+
+ The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This
+ protocol is usable both in boot services and at runtime. The runtime aspect enables an
+ implementation of EFI_SMM_BASE_PROTOCOL.Communicate() to layer upon this service
+ and provide an SMI callback from a general EFI runtime driver.
+ This protocol provides an abstraction to the platform hardware that generates an
+ SMI or PMI. There are often I/O ports that, when accessed, will engender the SMI or PMI.
+ Also, this hardware optionally supports the periodic genearation of these signals.
+
+**/
+struct _EFI_SMM_CONTROL_PROTOCOL {
+ ///
+ /// Initiates the SMI/PMI activation.
+ ///
+ EFI_SMM_ACTIVATE Trigger;
+ ///
+ /// Quiesces the SMI/PMI activation.
+ ///
+ EFI_SMM_DEACTIVATE Clear;
+ ///
+ /// Provides data on the register used as the source of the SMI.
+ ///
+ EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;
+ ///
+ /// Minimum interval at which the platform can set the period. A maximum is not
+ /// specified in that the SMM infrastructure code can emulate a maximum interval that is
+ /// greater than the hardware capabilities by using software emulation in the SMM
+ /// infrastructure code.
+ ///
+ UINTN MinimumTriggerPeriod;
+};
+
+extern EFI_GUID gEfiSmmControlProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmCpuIo.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmCpuIo.h new file mode 100644 index 0000000000..53c49b56f3 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmCpuIo.h @@ -0,0 +1,88 @@ +/** @file
+ SMM CPU I/O protocol as defined in the Intel Framework specification.
+
+ This protocol provides CPU I/O and memory access within SMM.
+
+Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SMM_CPU_IO_H_
+#define _SMM_CPU_IO_H_
+
+#include <Protocol/SmmCpuIo2.h>
+
+#define EFI_SMM_CPU_IO_GUID \
+ { \
+ 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41} \
+ }
+
+typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;
+
+/**
+ Provides the basic memory and I/O interfaces used to abstract accesses to devices.
+
+ The I/O operations are carried out exactly as requested. The caller is
+ responsible for any alignment and I/O width issues that the bus, device,
+ platform, or type of I/O might require.
+
+ @param[in] This The EFI_SMM_CPU_IO_INTERFACE instance.
+ @param[in] Width Signifies the width of the I/O operations.
+ @param[in] Address The base address of the I/O operations. The caller is
+ responsible for aligning the Address, if required.
+ @param[in] Count The number of I/O operations to perform.
+ @param[in,out] Buffer For read operations, the destination buffer to store
+ the results. For write operations, the source buffer
+ from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the device.
+ @retval EFI_UNSUPPORTED The Address is not valid for this system.
+ @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack
+ of resources.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CPU_IO)(
+ IN EFI_SMM_CPU_IO_INTERFACE *This,
+ IN EFI_SMM_IO_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ ///
+ /// This service provides the various modalities of memory and I/O read.
+ ///
+ EFI_SMM_CPU_IO Read;
+ ///
+ /// This service provides the various modalities of memory and I/O write.
+ ///
+ EFI_SMM_CPU_IO Write;
+} EFI_SMM_IO_ACCESS;
+
+///
+/// SMM CPU I/O Protocol provides CPU I/O and memory access within SMM.
+///
+struct _EFI_SMM_CPU_IO_INTERFACE {
+ ///
+ /// Allows reads and writes to memory-mapped I/O space.
+ ///
+ EFI_SMM_IO_ACCESS Mem;
+ ///
+ /// Allows reads and writes to I/O space.
+ ///
+ EFI_SMM_IO_ACCESS Io;
+};
+
+extern EFI_GUID gEfiSmmCpuIoGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmCpuSaveState.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmCpuSaveState.h new file mode 100644 index 0000000000..ba0d033392 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmCpuSaveState.h @@ -0,0 +1,175 @@ +/** @file
+ This file declares the SMM CPU Save State protocol, which provides the processor
+ save-state information for IA-32 and Itanium processors.
+
+Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.91.
+**/
+
+#ifndef _SMM_CPU_SAVE_STATE_H_
+#define _SMM_CPU_SAVE_STATE_H_
+
+#define EFI_SMM_CPU_SAVE_STATE_PROTOCOL_GUID \
+ { \
+ 0x21f302ad, 0x6e94, 0x471b, {0x84, 0xbc, 0xb1, 0x48, 0x0, 0x40, 0x3a, 0x1d} \
+ }
+
+typedef struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL EFI_SMM_CPU_SAVE_STATE_PROTOCOL;
+
+#define EFI_SMM_MIN_REV_ID_x64 0x30006
+
+#pragma pack (1)
+
+///
+/// CPU save-state strcuture for IA32 and X64.
+///
+/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because the
+/// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
+/// breaks on many compilers with high warning levels. Instead, the UINT8 Reserved[0x200]
+/// field has been moved into EFI_SMM_CPU_STATE32. This maintains binary compatibility for
+/// the layout and also maintains source comaptibility for access of all fields in this
+/// union.
+///
+/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
+/// the Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure. These
+/// have been changed to use the base types defined in the UEFI Specification.
+///
+typedef struct {
+ UINT8 Reserved[0x200];
+ UINT8 Reserved1[0xf8]; // fe00h
+ UINT32 SMBASE; // fef8h
+ UINT32 SMMRevId; // fefch
+ UINT16 IORestart; // ff00h
+ UINT16 AutoHALTRestart; // ff02h
+ UINT32 IEDBASE; // ff04h
+ UINT8 Reserved2[0x98]; // ff08h
+ UINT32 IOMemAddr; // ffa0h
+ UINT32 IOMisc; // ffa4h
+ UINT32 _ES;
+ UINT32 _CS;
+ UINT32 _SS;
+ UINT32 _DS;
+ UINT32 _FS;
+ UINT32 _GS;
+ UINT32 _LDTBase;
+ UINT32 _TR;
+ UINT32 _DR7;
+ UINT32 _DR6;
+ UINT32 _EAX;
+ UINT32 _ECX;
+ UINT32 _EDX;
+ UINT32 _EBX;
+ UINT32 _ESP;
+ UINT32 _EBP;
+ UINT32 _ESI;
+ UINT32 _EDI;
+ UINT32 _EIP;
+ UINT32 _EFLAGS;
+ UINT32 _CR3;
+ UINT32 _CR0;
+} EFI_SMM_CPU_STATE32;
+
+///
+/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
+/// the Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure. These
+/// have been changed to use the base types defined in the UEFI Specification.
+///
+typedef struct {
+ UINT8 Reserved1[0x1d0]; // fc00h
+ UINT32 GdtBaseHiDword; // fdd0h
+ UINT32 LdtBaseHiDword; // fdd4h
+ UINT32 IdtBaseHiDword; // fdd8h
+ UINT8 Reserved2[0xc]; // fddch
+ UINT64 IO_EIP; // fde8h
+ UINT8 Reserved3[0x50]; // fdf0h
+ UINT32 _CR4; // fe40h
+ UINT8 Reserved4[0x48]; // fe44h
+ UINT32 GdtBaseLoDword; // fe8ch
+ UINT32 GdtLimit; // fe90h
+ UINT32 IdtBaseLoDword; // fe94h
+ UINT32 IdtLimit; // fe98h
+ UINT32 LdtBaseLoDword; // fe9ch
+ UINT32 LdtLimit; // fea0h
+ UINT32 LdtInfo; // fea4h
+ UINT8 Reserved5[0x50]; // fea8h
+ UINT32 SMBASE; // fef8h
+ UINT32 SMMRevId; // fefch
+ UINT16 AutoHALTRestart; // ff00h
+ UINT16 IORestart; // ff02h
+ UINT32 IEDBASE; // ff04h
+ UINT8 Reserved6[0x14]; // ff08h
+ UINT64 _R15; // ff1ch
+ UINT64 _R14;
+ UINT64 _R13;
+ UINT64 _R12;
+ UINT64 _R11;
+ UINT64 _R10;
+ UINT64 _R9;
+ UINT64 _R8;
+ UINT64 _RAX; // ff5ch
+ UINT64 _RCX;
+ UINT64 _RDX;
+ UINT64 _RBX;
+ UINT64 _RSP;
+ UINT64 _RBP;
+ UINT64 _RSI;
+ UINT64 _RDI;
+ UINT64 IOMemAddr; // ff9ch
+ UINT32 IOMisc; // ffa4h
+ UINT32 _ES; // ffa8h
+ UINT32 _CS;
+ UINT32 _SS;
+ UINT32 _DS;
+ UINT32 _FS;
+ UINT32 _GS;
+ UINT32 _LDTR; // ffc0h
+ UINT32 _TR;
+ UINT64 _DR7; // ffc8h
+ UINT64 _DR6;
+ UINT64 _RIP; // ffd8h
+ UINT64 IA32_EFER; // ffe0h
+ UINT64 _RFLAGS; // ffe8h
+ UINT64 _CR3; // fff0h
+ UINT64 _CR0; // fff8h
+} EFI_SMM_CPU_STATE64;
+
+///
+/// Union of CPU save-state strcutures for IA32 and X64.
+///
+/// This union declaration does not exctly match the Framework SMM CIS 0.91 because the
+/// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
+/// breaks on many compilers with high warning levels. Instead, the UINT8 Reserved[0x200]
+/// field has been moved into EFI_SMM_CPU_STATE32. This maintains binary compatibility for
+/// the layout and also maintains source comaptibility for access of all fields in this
+/// union.
+///
+typedef union {
+ EFI_SMM_CPU_STATE32 x86;
+ EFI_SMM_CPU_STATE64 x64;
+} EFI_SMM_CPU_STATE;
+
+#pragma pack ()
+
+///
+/// Provides a programatic means to access SMM save state.
+///
+struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL {
+ ///
+ /// Reference to a list of save states.
+ ///
+ EFI_SMM_CPU_STATE **CpuSaveState;
+};
+
+extern EFI_GUID gEfiSmmCpuSaveStateProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmGpiDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmGpiDispatch.h new file mode 100644 index 0000000000..62f9a51602 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmGpiDispatch.h @@ -0,0 +1,136 @@ +/** @file
+ This file declares the Smm Gpi Smi Child Protocol.
+
+ The EFI_SMM_GPI_DISPATCH_PROTOCOL is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9. It provides the ability to install child handlers for the given event types.
+ Several inputs can be enabled. This purpose of this interface is to generate an
+ SMI in response to any of these inputs having a true value provided.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SMM_GPI_DISPATCH_H_
+#define _SMM_GPI_DISPATCH_H_
+
+
+//
+// Global ID for the GPI SMI Protocol
+//
+#define EFI_SMM_GPI_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xe0744b81, 0x9513, 0x49cd, {0x8c, 0xea, 0xe9, 0x24, 0x5e, 0x70, 0x39, 0xda } \
+ }
+
+typedef struct _EFI_SMM_GPI_DISPATCH_PROTOCOL EFI_SMM_GPI_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+
+//
+// GpiMask is a bit mask of 32 possible general purpose inputs that can generate
+// an SMI. Bit 0 corresponds to logical GPI[0], 1 corresponds to logical GPI[1], and so on.
+//
+// The logical GPI index to physical pin on device is described by the GPI device name
+// found on the same handle as the GpiSmi child dispatch protocol. The GPI device name
+// is defined as protocol with a GUID name and NULL protocol pointer.
+//
+typedef struct {
+ UINTN GpiNum;
+} EFI_SMM_GPI_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+
+/**
+ Dispatch function for a GPI SMI handler.
+
+ @param DispatchHandle The handle of this dispatch function.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The DispatchContext fields are filled in by the
+ dispatching driver prior to invoking this dispatch
+ function.
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_GPI_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_GPI_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This The pointer to the EFI_SMM_GPI_DISPATCH_PROTOCOL instance.
+ @param DispatchFunction Function to install.
+ @param DispatchContext The pointer to the dispatch function's context.
+ Indicates to the register
+ function the GPI(s) for which the dispatch function
+ should be invoked.
+ @param DispatchHandle The handle generated by the dispatcher to track the
+ function instance.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered, and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The GPI input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GPI_REGISTER)(
+ IN EFI_SMM_GPI_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_GPI_DISPATCH DispatchFunction,
+ IN EFI_SMM_GPI_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregisters a General Purpose Input (GPI) service.
+
+ @param This The pointer to the EFI_SMM_GPI_DISPATCH_PROTOCOL instance.
+ @param DispatchHandle The handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered, and the SMI source has been disabled,
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER DispatchHandle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GPI_UNREGISTER)(
+ IN EFI_SMM_GPI_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM GPI SMI Dispatch Protocol
+//
+struct _EFI_SMM_GPI_DISPATCH_PROTOCOL {
+ EFI_SMM_GPI_REGISTER Register;
+ EFI_SMM_GPI_UNREGISTER UnRegister;
+
+ ///
+ /// Denotes the maximum value of inputs that can have handlers attached.
+ ///
+ UINTN NumSupportedGpis;
+};
+
+extern EFI_GUID gEfiSmmGpiDispatchProtocolGuid;
+
+#endif
+
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmIchnDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmIchnDispatch.h new file mode 100644 index 0000000000..56e9e3844e --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmIchnDispatch.h @@ -0,0 +1,189 @@ +/** @file
+ Provides the parent dispatch service for a given SMI source generator.
+ The EFI_SMM_ICHN_DISPATCH_PROTOCOL provides the ability to install child handlers for
+ the given event types.
+
+Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_ICHN_DISPATCH_H_
+#define _EFI_SMM_ICHN_DISPATCH_H_
+
+
+//
+// Global ID for the ICH SMI Protocol
+//
+#define EFI_SMM_ICHN_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xc50b323e, 0x9075, 0x4f2a, {0xac, 0x8e, 0xd2, 0x59, 0x6a, 0x10, 0x85, 0xcc } \
+ }
+
+typedef struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL EFI_SMM_ICHN_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// ICHN Specific SMIs. These are miscellaneous SMI sources that are supported by the
+// ICHN specific SMI implementation. These may change over time. TrapNumber is only
+// valid if the Type is Trap.
+//
+typedef enum {
+ //
+ // NOTE: NEVER delete items from this list/enumeration! Doing so will prevent other versions
+ // of the code from compiling. If the ICH version your driver is written for doesn't support
+ // some of these SMIs, then simply return EFI_UNSUPPORTED when a child/client tries to register
+ // for them.
+ //
+ IchnMch,
+ IchnPme,
+ IchnRtcAlarm,
+ IchnRingIndicate,
+ IchnAc97Wake,
+ IchnSerialIrq,
+ IchnY2KRollover,
+ IchnTcoTimeout,
+ IchnOsTco,
+ IchnNmi,
+ IchnIntruderDetect,
+ IchnBiosWp,
+ IchnMcSmi,
+ IchnPmeB0,
+ IchnThrmSts,
+ IchnSmBus,
+ IchnIntelUsb2,
+ IchnMonSmi7,
+ IchnMonSmi6,
+ IchnMonSmi5,
+ IchnMonSmi4,
+ IchnDevTrap13,
+ IchnDevTrap12,
+ IchnDevTrap11,
+ IchnDevTrap10,
+ IchnDevTrap9,
+ IchnDevTrap8,
+ IchnDevTrap7,
+ IchnDevTrap6,
+ IchnDevTrap5,
+ IchnDevTrap3,
+ IchnDevTrap2,
+ IchnDevTrap1,
+ IchnDevTrap0,
+ IchnIoTrap3,
+ IchnIoTrap2,
+ IchnIoTrap1,
+ IchnIoTrap0,
+ IchnPciExpress,
+ IchnMonitor,
+ IchnSpi,
+ IchnQRT,
+ IchnGpioUnlock,
+ //
+ // INSERT NEW ITEMS JUST BEFORE THIS LINE
+ //
+ NUM_ICHN_TYPES // the number of items in this enumeration
+} EFI_SMM_ICHN_SMI_TYPE;
+
+typedef struct {
+ EFI_SMM_ICHN_SMI_TYPE Type;
+} EFI_SMM_ICHN_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a ICHN specific SMI handler.
+
+ @param DispatchHandle The handle of this dispatch function.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_ICHN_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver.
+
+ @param This The pointer to the EFI_SMM_ICHN_DISPATCH_PROTOCOL instance.
+ @param DispatchFunction The function to install.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The caller fills in this context before calling
+ the register function to indicate to the register
+ function the ICHN SMI source for which the dispatch
+ function should be invoked.
+ @param DispatchHandle The handle generated by the dispatcher to track the function
+ instance.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver could not enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The ICHN input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ICHN_REGISTER)(
+ IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_ICHN_DISPATCH DispatchFunction,
+ IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This The pointer to the EFI_SMM_ICHN_DISPATCH_PROTOCOL instance.
+ @param DispatchHandle The handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered, and the SMI source has been disabled,
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER The handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ICHN_UNREGISTER)(
+ IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM ICHN specific SMI Dispatch Protocol
+//
+/**
+ Provides the parent dispatch service for a given SMI source generator.
+**/
+struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL {
+ EFI_SMM_ICHN_REGISTER Register; ///< Installs a child service to be dispatched by this protocol.
+ EFI_SMM_ICHN_UNREGISTER UnRegister; ///< Removes a child service dispatched by this protocol.
+};
+
+extern EFI_GUID gEfiSmmIchnDispatchProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmPeriodicTimerDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmPeriodicTimerDispatch.h new file mode 100644 index 0000000000..962665f384 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmPeriodicTimerDispatch.h @@ -0,0 +1,176 @@ +/** @file
+ Provides the parent dispatch service for the periodical timer SMI source generator.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_PERIODIC_TIMER_DISPATCH_H_
+#define _EFI_SMM_PERIODIC_TIMER_DISPATCH_H_
+
+
+//
+// Global ID for the Periodic Timer SMI Protocol
+//
+#define EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x9cca03fc, 0x4c9e, 0x4a19, {0x9b, 0x6, 0xed, 0x7b, 0x47, 0x9b, 0xde, 0x55 } \
+ }
+
+typedef struct _EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+
+typedef struct {
+ ///
+ /// The minimum period of time that the child gets called, in 100 nanosecond units.
+ /// The child will be called back after a time greater than the time Period.
+ ///
+ UINT64 Period;
+ ///
+ /// The period of time interval between SMIs. Children of this interface
+ /// should use this field when registering for periodic timer intervals when a finer
+ /// granularity periodic SMI is desired. Valid values for this field are those returned
+ /// by GetNextInterval. A value of 0 indicates the parent is allowed to use any SMI
+ /// interval period to satisfy the requested period.
+ ///
+ UINT64 SmiTickInterval;
+ ///
+ /// The actual time in 100 nanosecond units elapsed since last called. A
+ /// value of 0 indicates an unknown amount of time.
+ ///
+ UINT64 ElapsedTime;
+} EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Periodic Timer SMI handler.
+
+ @param DispatchHandle The handle of this dispatch function.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Returns the next SMI tick period supported by the chipset. The order
+ returned is from longest to shortest interval period.
+
+ @param This The protocol instance pointer.
+ @param SmiTickInterval The pointer to pointer of next shorter SMI interval
+ period supported by the child. This parameter works as a get-first,
+ get-next field. The first time this function is called, *SmiTickInterval
+ should be set to NULL to get the longest SMI interval. The returned
+ *SmiTickInterval should be passed in on subsequent calls to get the
+ next shorter interval period until *SmiTickInterval = NULL.
+
+ @retval EFI_SUCCESS The service returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_INTERVAL)(
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN OUT UINT64 **SmiTickInterval
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This The pointer to the EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL instance.
+ @param DispatchFunction The function to install.
+ @param DispatchContext The pointer to the dispatch function's context.
+ Indicates to the register
+ function the period at which the dispatch function
+ should be invoked.
+ @param DispatchHandle The handle generated by the dispatcher to track the function instance.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered, and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The period input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_REGISTER)(
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH DispatchFunction,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregisters a periodic timer service.
+
+ @param This The pointer to the EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL instance.
+ @param DispatchHandle The handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered, and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER The handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_UNREGISTER)(
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Periodic Timer Dispatch Protocol
+//
+/**
+ Provides the parent dispatch service for the periodical timer SMI source generator.
+**/
+struct _EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL {
+ ///
+ /// Installs a child service to be dispatched by this protocol.
+ ///
+ EFI_SMM_PERIODIC_TIMER_REGISTER Register;
+
+ ///
+ /// Removes a child service dispatched by this protocol.
+ ///
+ EFI_SMM_PERIODIC_TIMER_UNREGISTER UnRegister;
+
+ ///
+ /// Returns the next SMI tick period that is supported by the chipset.
+ ///
+ EFI_SMM_PERIODIC_TIMER_INTERVAL GetNextShorterInterval;
+};
+
+extern EFI_GUID gEfiSmmPeriodicTimerDispatchProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmPowerButtonDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmPowerButtonDispatch.h new file mode 100644 index 0000000000..eaf5aa6371 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmPowerButtonDispatch.h @@ -0,0 +1,141 @@ +/** @file
+ Provides the parent dispatch service for the power button SMI source generator.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_POWER_BUTTON_DISPATCH_H_
+#define _EFI_SMM_POWER_BUTTON_DISPATCH_H_
+
+
+//
+// Global ID for the Power Button SMI Protocol
+//
+#define EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xb709efa0, 0x47a6, 0x4b41, {0xb9, 0x31, 0x12, 0xec, 0xe7, 0xa8, 0xee, 0x56 } \
+ }
+
+typedef struct _EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// Power Button. Example, Use for changing LEDs before ACPI OS is on.
+// - DXE/BDS Phase
+// - OS Install Phase
+//
+typedef enum {
+ PowerButtonEntry,
+ PowerButtonExit
+} EFI_POWER_BUTTON_PHASE;
+
+typedef struct {
+ EFI_POWER_BUTTON_PHASE Phase;
+} EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Power Button SMI handler.
+
+ @param[in] DispatchHandle The handle of this dispatch function.
+ @param[in] DispatchContext The pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_POWER_BUTTON_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Provides the parent dispatch service for a given SMI source generator
+
+ @param[in] This The pointer to the
+ EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL instance.
+ @param[in] DispatchFunction The function to install.
+ @param[in] DispatchContext The pointer to the dispatch function's context.
+ Indicates to the register
+ function the Power Button SMI phase for which
+ to invoke the dispatch function.
+ @param[out] DispatchHandle Handle generated by the dispatcher to track
+ the function instance.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The Power Button SMI
+ phase is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_POWER_BUTTON_REGISTER)(
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH DispatchFunction,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregisters a power-button service.
+
+ @param[in] This The pointer to the EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL instance.
+ @param[in] DispatchHandle The handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered, and the SMI source has been
+ disabled, if there are no other registered
+ child dispatch functions for this SMI
+ source.
+ @retval EFI_INVALID_PARAMETER The handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_POWER_BUTTON_UNREGISTER)(
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the SMM power button SMI source generator.
+
+**/
+struct _EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL {
+ ///
+ /// Installs a child service to be dispatched by this protocol.
+ ///
+ EFI_SMM_POWER_BUTTON_REGISTER Register;
+
+ ///
+ /// Removes a child service dispatched by this protocol.
+ ///
+ EFI_SMM_POWER_BUTTON_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmPowerButtonDispatchProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmStandbyButtonDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmStandbyButtonDispatch.h new file mode 100644 index 0000000000..bb6e6ac796 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmStandbyButtonDispatch.h @@ -0,0 +1,143 @@ +/** @file
+ Provides the parent dispatch service for the standby button SMI source generator.
+
+ The SMM Standby Button Dispatch Protocol is defined in
+ the Intel Platform Innovation Framework for EFI SMM Core Interface Specification
+ (SMM CIS) Version 0.9.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_
+#define _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_
+
+//
+// Share some common definitions with PI SMM
+//
+#include <Protocol/SmmStandbyButtonDispatch2.h>
+
+//
+// Global ID for the Standby Button SMI Protocol
+//
+#define EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x78965b98, 0xb0bf, 0x449e, {0x8b, 0x22, 0xd2, 0x91, 0x4e, 0x49, 0x8a, 0x98 } \
+ }
+
+typedef struct _EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+
+typedef struct {
+ /// Describes whether the child handler should be invoked upon the entry to the button
+ /// activation or upon exit (i.e., upon receipt of the button press event or upon release of
+ /// the event).
+ EFI_STANDBY_BUTTON_PHASE Phase;
+} EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+
+/**
+ Dispatch function for a Standby Button SMI handler.
+
+ @param DispatchHandle The handle of this dispatch function.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Provides the parent dispatch service for a given SMI source generator
+
+ @param This The pointer to the EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL instance.
+ @param DispatchFunction The function to install.
+ @param DispatchContext The pointer to the dispatch function's context.
+ Indicates to the register function the Standby
+ Button SMI phase for which to invoke the dispatch
+ function.
+ @param DispatchHandle The handle generated by the dispatcher to track the
+ function instance.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered, and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver could not enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The Standby Button SMI
+ phase is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_REGISTER)(
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH DispatchFunction,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver.
+
+ @param This The pointer to the EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL instance.
+ @param DispatchHandle The handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered, and the SMI source has been disabled,
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER The handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_UNREGISTER)(
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Standby Button SMI Dispatch Protocol
+//
+/**
+ This protocol provices the parent dispatch service for the standby button SMI source generator.
+ Provides the ability to install child handlers for the given event types.
+ **/
+struct _EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL {
+ ///
+ /// Installs a child service to be dispatched by this protocol.
+ ///
+ EFI_SMM_STANDBY_BUTTON_REGISTER Register;\
+ ///
+ /// Removes a child service dispatched by this protocol.
+ ///
+ EFI_SMM_STANDBY_BUTTON_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmStandbyButtonDispatchProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmSwDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmSwDispatch.h new file mode 100644 index 0000000000..de19e536e3 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmSwDispatch.h @@ -0,0 +1,151 @@ +/** @file
+ Provides the parent dispatch service for a given SMI source generator.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework for EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_SW_DISPATCH_H_
+#define _EFI_SMM_SW_DISPATCH_H_
+
+
+//
+// Global ID for the SW SMI Protocol
+//
+#define EFI_SMM_SW_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xe541b773, 0xdd11, 0x420c, {0xb0, 0x26, 0xdf, 0x99, 0x36, 0x53, 0xf8, 0xbf } \
+ }
+
+typedef struct _EFI_SMM_SW_DISPATCH_PROTOCOL EFI_SMM_SW_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// A particular chipset may not support all possible software SMI input values.
+// For example, the ICH supports only values 00h to 0FFh. The parent only allows a single
+// child registration for each SwSmiInputValue.
+//
+typedef struct {
+ UINTN SwSmiInputValue;
+} EFI_SMM_SW_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Software SMI handler.
+
+ @param DispatchHandle The handle of this dispatch function.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The SwSmiInputValue field is filled in
+ by the software dispatch driver prior to
+ invoking this dispatch function.
+ The dispatch function will only be called
+ for input values for which it is registered.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_SW_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver.
+
+ @param This The pointer to the EFI_SMM_SW_DISPATCH_PROTOCOL instance.
+ @param DispatchFunction The function to install.
+ @param DispatchContext The pointer to the dispatch function's context.
+ Indicates to the register
+ function the Software SMI input value for which
+ to invoke the dispatch function.
+ @param DispatchHandle The handle generated by the dispatcher to track
+ the function instance.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The SW driver could not enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The SW SMI input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SW_REGISTER)(
+ IN EFI_SMM_SW_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_SW_DISPATCH DispatchFunction,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This The pointer to the EFI_SMM_SW_DISPATCH_PROTOCOL instance.
+ @param DispatchHandle The handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER The handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SW_UNREGISTER)(
+ IN EFI_SMM_SW_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+
+//
+// Interface structure for the SMM Software SMI Dispatch Protocol
+//
+/**
+ Provides the parent dispatch service for a given SMI source generator.
+**/
+///
+/// Inconsistent with the specification here:
+/// In The Framework specification SmmCis, this definition is named as
+/// _EFI_SMM_ICHN_DISPATCH_PROTOCOL by mistake.
+///
+struct _EFI_SMM_SW_DISPATCH_PROTOCOL {
+ ///
+ /// Installs a child service to be dispatched by this protocol.
+ ///
+ EFI_SMM_SW_REGISTER Register;
+
+ ///
+ /// Removes a child service dispatched by this protocol.
+ ///
+ EFI_SMM_SW_UNREGISTER UnRegister;
+
+ ///
+ /// A read-only field that describes the maximum value that can be used
+ /// in the EFI_SMM_SW_DISPATCH_PROTOCOL.Register() service.
+ ///
+ UINTN MaximumSwiValue;
+};
+
+extern EFI_GUID gEfiSmmSwDispatchProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmSxDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmSxDispatch.h new file mode 100644 index 0000000000..7d1dec47fd --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmSxDispatch.h @@ -0,0 +1,135 @@ +/** @file
+ Provides the parent dispatch service for a given Sx-state source generator.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_SX_DISPATCH_H_
+#define _EFI_SMM_SX_DISPATCH_H_
+
+//
+// Share some common definitions with PI SMM
+//
+#include <Protocol/SmmSxDispatch2.h>
+
+//
+// Global ID for the Sx SMI Protocol
+//
+#define EFI_SMM_SX_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x14fc52be, 0x1dc, 0x426c, {0x91, 0xae, 0xa2, 0x3c, 0x3e, 0x22, 0xa, 0xe8 } \
+ }
+
+typedef struct _EFI_SMM_SX_DISPATCH_PROTOCOL EFI_SMM_SX_DISPATCH_PROTOCOL;
+
+typedef struct {
+ EFI_SLEEP_TYPE Type;
+ EFI_SLEEP_PHASE Phase;
+} EFI_SMM_SX_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Sx state SMI handler.
+
+ @param DispatchHandle The handle of this dispatch function.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The Type and Phase fields are filled in by the Sx dispatch driver
+ prior to invoking this dispatch function. For this interface,
+ the Sx driver will call the dispatch function for all Sx type
+ and phases, so the Sx state handler(s) must check the Type and
+ Phase field of EFI_SMM_SX_DISPATCH_CONTEXT, and act accordingly.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_SX_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver.
+
+ @param This The pointer to the EFI_SMM_SX_DISPATCH_PROTOCOL instance.
+ @param DispatchFunction The function to install.
+ @param DispatchContext The pointer to the dispatch function's context.
+ The caller fills in this context before calling
+ the register function to indicates to the register
+ function which Sx state type and phase the caller
+ wishes to be called back on. For this interface,
+ the Sx driver will call the registered handlers for
+ all Sx type and phases, so the Sx state handler(s)
+ must check the Type and Phase field of the Dispatch
+ context, and act accordingly.
+ @param DispatchHandle The handle of dispatch function, for interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_UNSUPPORTED The Sx driver or hardware does not support that
+ Sx Type/Phase.
+ @retval EFI_DEVICE_ERROR The Sx driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. Type & Phase are not
+ within a valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SX_REGISTER)(
+ IN EFI_SMM_SX_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_SX_DISPATCH DispatchFunction,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregisters an Sx-state service
+
+ @param This The pointer to the EFI_SMM_SX_DISPATCH_PROTOCOL instance.
+ @param DispatchHandle The handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully unregistered, and the
+ SMI source has been disabled, if there are no other registered child
+ dispatch functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SX_UNREGISTER)(
+ IN EFI_SMM_SX_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Child Dispatch Protocol
+//
+/**
+ Provides the parent dispatch service for a given Sx-state source generator.
+**/
+struct _EFI_SMM_SX_DISPATCH_PROTOCOL {
+ EFI_SMM_SX_REGISTER Register; ///< Installs a child service to be dispatched by this protocol.
+ EFI_SMM_SX_UNREGISTER UnRegister; ///< Removes a child service dispatched by this protocol.
+};
+
+extern EFI_GUID gEfiSmmSxDispatchProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Include/Protocol/SmmUsbDispatch.h b/Core/IntelFrameworkPkg/Include/Protocol/SmmUsbDispatch.h new file mode 100644 index 0000000000..c3e0813210 --- /dev/null +++ b/Core/IntelFrameworkPkg/Include/Protocol/SmmUsbDispatch.h @@ -0,0 +1,136 @@ +/** @file
+ Provides the parent dispatch service for the USB SMI source generator.
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_USB_DISPATCH_H_
+#define _EFI_SMM_USB_DISPATCH_H_
+
+//
+// Share some common definitions with PI SMM
+//
+#include <Protocol/SmmUsbDispatch2.h>
+
+//
+// Global ID for the USB Protocol
+//
+#define EFI_SMM_USB_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xa05b6ffd, 0x87af, 0x4e42, {0x95, 0xc9, 0x62, 0x28, 0xb6, 0x3c, 0xf3, 0xf3 } \
+ }
+
+typedef struct _EFI_SMM_USB_DISPATCH_PROTOCOL EFI_SMM_USB_DISPATCH_PROTOCOL;
+
+typedef struct {
+ ///
+ /// Describes whether this child handler will be invoked in response to a USB legacy
+ /// emulation event, such as port-trap on the PS/2* keyboard control registers, or to a
+ /// USB wake event, such as resumption from a sleep state.
+ ///
+ EFI_USB_SMI_TYPE Type;
+ ///
+ /// The device path is part of the context structure and describes the location of the
+ /// particular USB host controller in the system for which this register event will occur.
+ /// This location is important because of the possible integration of several USB host
+ /// controllers in a system.
+ ///
+ EFI_DEVICE_PATH_PROTOCOL *Device;
+} EFI_SMM_USB_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a USB SMI handler.
+
+ @param[in] DispatchHandle Handle of this dispatch function.
+ @param[in] DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_USB_DISPATCH)(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_USB_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver.
+
+ @param[in] This The pointer to the EFI_SMM_USB_DISPATCH_PROTOCOL instance.
+ @param[in] DispatchFunction The pointer to dispatch function to be invoked
+ for this SMI source.
+ @param[in] DispatchContext The pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the USB SMI types for which the dispatch
+ function should be invoked.
+ @param[out] DispatchHandle The handle generated by the dispatcher to track the
+ function instance.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The USB SMI type
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_USB_REGISTER)(
+ IN EFI_SMM_USB_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_USB_DISPATCH DispatchFunction,
+ IN EFI_SMM_USB_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregisters a USB service.
+
+ @param[in] This The pointer to the EFI_SMM_USB_DISPATCH_PROTOCOL instance.
+ @param[in] DispatchHandle Handle of the service to remove.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER The DispatchHandle was not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_USB_UNREGISTER)(
+ IN EFI_SMM_USB_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+///
+/// The EFI_SMM_USB_DISPATCH_PROTOCOL provides the ability to install child handlers for the
+/// given event types.
+///
+struct _EFI_SMM_USB_DISPATCH_PROTOCOL {
+ EFI_SMM_USB_REGISTER Register;
+ EFI_SMM_USB_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmUsbDispatchProtocolGuid;
+
+#endif
diff --git a/Core/IntelFrameworkPkg/IntelFrameworkPkg.dec b/Core/IntelFrameworkPkg/IntelFrameworkPkg.dec new file mode 100644 index 0000000000..5cfe99c53a --- /dev/null +++ b/Core/IntelFrameworkPkg/IntelFrameworkPkg.dec @@ -0,0 +1,186 @@ +## @file
+# Intel Framework Package Reference Implementations
+#
+# This package provides definitions and libraries that comply to Intel Framework Specifications.
+# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES
+# OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = IntelFrameworkPkg
+ PACKAGE_UNI_FILE = IntelFrameworkPkg.uni
+ PACKAGE_GUID = 2759ded5-bb57-4b06-af4f-c398fa552719
+ PACKAGE_VERSION = 0.96
+
+[Includes]
+ Include # Root include for the package
+
+[Guids]
+ ## Include/Guid/DataHubRecords.h
+ gEfiCacheSubClassGuid = { 0x7f0013a7, 0xdc79, 0x4b22, { 0x80, 0x99, 0x11, 0xf7, 0x5f, 0xdc, 0x82, 0x9d }}
+
+ ## Include/Guid/DataHubRecords.h
+ gEfiMemorySubClassGuid = { 0x4E8F4EBB, 0x64B9, 0x4e05, { 0x9b, 0x18, 0x4c, 0xfe, 0x49, 0x23, 0x50, 0x97 }}
+
+ ## Include/Guid/DataHubRecords.h
+ gEfiMiscSubClassGuid = { 0x772484B2, 0x7482, 0x4b91, { 0x9f, 0x9a, 0xad, 0x43, 0xf8, 0x1c, 0x58, 0x81 }}
+
+ ## Include/Guid/DataHubRecords.h
+ gEfiProcessorSubClassGuid = { 0x26fdeb7e, 0xb8af, 0x4ccf, { 0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 }}
+
+ ## Include/Guid/Capsule.h
+ gEfiCapsuleGuid = { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
+
+ ## Include/Guid/Capsule.h
+ gEfiConfigFileNameGuid = { 0x98B8D59B, 0xE8BA, 0x48EE, { 0x98, 0xDD, 0xC2, 0x95, 0x39, 0x2F, 0x1E, 0xDB }}
+
+ ## Include/Guid/SmramMemoryReserve.h
+ gEfiSmmPeiSmramMemoryReserveGuid = { 0x6dadf1d1, 0xd4cc, 0x4910, { 0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d }}
+
+ ## Include/Guid/SmmCommunicate.h
+ gSmmCommunicateHeaderGuid = { 0xf328e36c, 0x23b6, 0x4a95, { 0x85, 0x4b, 0x32, 0xe1, 0x95, 0x34, 0xcd, 0x75 }}
+
+ ## Include/Guid/FirmwareFileSystem.h
+ gEfiFirmwareFileSystemGuid = { 0x7A9354D9, 0x0468, 0x444a, {0x81, 0xCE, 0x0B, 0xF6, 0x17, 0xD8, 0x90, 0xDF }}
+
+ ## Include/Guid/BlockIo.h
+ gEfiPeiIdeBlockIoPpiGuid = { 0x964e5b22, 0x6459, 0x11d2, { 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b }}
+
+ ## Include/Guid/BlockIo.h
+ gEfiPei144FloppyBlockIoPpiGuid = { 0xda6855bd, 0x07b7, 0x4c05, { 0x9e, 0xd8, 0xe2, 0x59, 0xfd, 0x36, 0x0e, 0x22 }}
+
+[Ppis]
+ ## Include/Ppi/BootScriptExecuter.h
+ gEfiPeiBootScriptExecuterPpiGuid = { 0xabd42895, 0x78cf, 0x4872, { 0x84, 0x44, 0x1b, 0x5c, 0x18, 0x0b, 0xfb, 0xff }}
+
+ ## Include/Ppi/Security.h
+ gEfiPeiSecurityPpiGuid = { 0x1388066E, 0x3A57, 0x4EFA, { 0x98, 0xF3, 0xC1, 0x2F, 0x3A, 0x95, 0x8A, 0x29 }}
+
+ ## Include/Ppi/Smbus.h
+ gEfiPeiSmbusPpiGuid = { 0xabd42895, 0x78cf, 0x4872, { 0x84, 0x44, 0x1b, 0x5c, 0x18, 0x0b, 0xfb, 0xda }}
+
+ ## Include/Ppi/PciCfg.h
+ gEfiPciCfgPpiInServiceTableGuid = { 0xe1f2eba0, 0xf7b9, 0x4a26, { 0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 }}
+
+ ## Include/Ppi/ReadOnlyVariable.h
+ gEfiPeiReadOnlyVariablePpiGuid = { 0x3CDC90C6, 0x13FB, 0x4A75, { 0x9E, 0x79, 0x59, 0xE9, 0xDD, 0x78, 0xB9, 0xFA }}
+
+ ## Include/Ppi/SectionExtraction.h
+ gEfiPeiSectionExtractionPpiGuid = { 0x4F89E208, 0xE144, 0x4804, { 0x9E, 0xC8, 0x0F, 0x89, 0x4F, 0x7E, 0x36, 0xD7 }}
+
+ ## Include/Ppi/FvLoadFile.h
+ gEfiPeiFvFileLoaderPpiGuid = { 0x7e1f0d85, 0x4ff, 0x4bb2, { 0x86, 0x6a, 0x31, 0xa2, 0x99, 0x6a, 0x48, 0xa8 }}
+
+ ## Include/Ppi/FindFv.h
+ gEfiFindFvPpiGuid = { 0x36164812, 0xa023, 0x44e5, { 0xbd, 0x85, 0x05, 0xbf, 0x3c, 0x77, 0x00, 0xaa }}
+
+ ## Include/Ppi/S3Resume.h
+ gEfiPeiS3ResumePpiGuid = { 0x4426CCB2, 0xE684, 0x4a8a, { 0xae, 0x40, 0x20, 0xd4, 0xb0, 0x25, 0xb7, 0x10 }}
+
+[Protocols]
+ ## Include/Protocol/AcpiS3Save.h
+ gEfiAcpiS3SaveProtocolGuid = { 0x125F2DE1, 0xFB85, 0x440C, { 0xA5, 0x4C, 0x4D, 0x99, 0x35, 0x8A, 0x8D, 0x38 }}
+
+ ## Include/Protocol/AcpiSupport.h
+ gEfiAcpiSupportProtocolGuid = { 0xdbff9d55, 0x89b7, 0x46da, { 0xbd, 0xdf, 0x67, 0x7d, 0x3d, 0xc0, 0x24, 0x1d }}
+
+ ## Include/Protocol/BootScriptSave.h
+ gEfiBootScriptSaveProtocolGuid = { 0x470e1529, 0xb79e, 0x4e32, { 0xa0, 0xfe, 0x6a, 0x15, 0x6d, 0x29, 0xf9, 0xb2 }}
+
+ ## Include/Protocol/LegacyBios.h
+ gEfiLegacyBiosProtocolGuid = { 0xdb9a1e3d, 0x45cb, 0x4abb, { 0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d }}
+
+ ## Include/Protocol/LegacyBiosPlatform.h
+ gEfiLegacyBiosPlatformProtocolGuid = { 0x783658a3, 0x4172, 0x4421, { 0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4 }}
+
+ ## Include/Protocol/LegacyInterrupt.h
+ gEfiLegacyInterruptProtocolGuid = { 0x31ce593d, 0x108a, 0x485d, { 0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe }}
+
+ ## Include/Protocol/LegacyRegion.h
+ gEfiLegacyRegionProtocolGuid = { 0x0fc9013a, 0x0568, 0x4ba9, { 0x9b, 0x7e, 0xc9, 0xc3, 0x90, 0xa6, 0x60, 0x9b }}
+
+ ## Include/Protocol/Legacy8259.h
+ gEfiLegacy8259ProtocolGuid = { 0x38321dba, 0x4fe0, 0x4e17, { 0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 }}
+
+ ## Include/Protocol/CpuIo.h
+ gEfiCpuIoProtocolGuid = { 0xB0732526, 0x38C8, 0x4b40, { 0x88, 0x77, 0x61, 0xc7, 0xb0, 0x6a, 0xac, 0x45 }}
+
+ ## Include/Protocol/DataHub.h
+ gEfiDataHubProtocolGuid = { 0xae80d021, 0x618e, 0x11d4, { 0xbc, 0xd7, 0x00, 0x80, 0xc7, 0x3c, 0x88, 0x81 }}
+
+ ## Include/Protocol/FirmwareVolume.h
+ gEfiFirmwareVolumeProtocolGuid = { 0x389F751F, 0x1838, 0x4388, { 0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8 }}
+
+ ## Include/Protocol/SectionExtraction.h
+ gEfiSectionExtractionProtocolGuid = { 0x448F5DA4, 0x6DD7, 0x4FE1, { 0x93, 0x07, 0x69, 0x22, 0x41, 0x92, 0x21, 0x5D }}
+
+ ## Include/Protocol/FrameworkHii.h
+ gEfiHiiProtocolGuid = { 0xd7ad636e, 0xb997, 0x459b, { 0xbf, 0x3f, 0x88, 0x46, 0x89, 0x79, 0x80, 0xe1 }}
+
+ ## Include/Protocol/FrameworkHii.h
+ gEfiHiiCompatibilityProtocolGuid = { 0x5542cce1, 0xdf5c, 0x4d1b, { 0xab, 0xca, 0x36, 0x4f, 0x77, 0xd3, 0x99, 0xfb }}
+
+ ## Include/Protocol/FrameworkMpService.h
+ gFrameworkEfiMpServiceProtocolGuid = { 0xf33261e7, 0x23cb, 0x11d5, {0xbd, 0x5c, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81}}
+
+ ## Include/Protocol/SmmBase.h
+ gEfiSmmBaseProtocolGuid = { 0x1390954D, 0xda95, 0x4227, { 0x93, 0x28, 0x72, 0x82, 0xc2, 0x17, 0xda, 0xa8 }}
+
+ ## Include/Protocol/SmmAccess.h
+ gEfiSmmAccessProtocolGuid = { 0x3792095a, 0xe309, 0x4c1e, { 0xaa, 0x01, 0x85, 0xf5, 0x65, 0x5a, 0x17, 0xf1 }}
+
+ ## Include/Protocol/SmmControl.h
+ gEfiSmmControlProtocolGuid = { 0x8d12e231, 0xc667, 0x4fd1, { 0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 }}
+
+ ## Include/Protocol/SmmSwDispatch.h
+ gEfiSmmSwDispatchProtocolGuid = { 0xe541b773, 0xdd11, 0x420c, { 0xb0, 0x26, 0xdf, 0x99, 0x36, 0x53, 0xf8, 0xbf }}
+
+ ## Include/Protocol/SmmSxDispatch.h
+ gEfiSmmSxDispatchProtocolGuid = { 0x14fc52be, 0x01dc, 0x426c, { 0x91, 0xae, 0xa2, 0x3c, 0x3e, 0x22, 0x0a, 0xe8 }}
+
+ ## Include/Protocol/SmmPeriodicTimerDispatch.h
+ gEfiSmmPeriodicTimerDispatchProtocolGuid = { 0x9cca03fc, 0x4c9e, 0x4a19, { 0x9b, 0x06, 0xed, 0x7b, 0x47, 0x9b, 0xde, 0x55 }}
+
+ ## Include/Protocol/SmmUsbDispatch.h
+ gEfiSmmUsbDispatchProtocolGuid = { 0xa05b6ffd, 0x87af, 0x4e42, { 0x95, 0xc9, 0x62, 0x28, 0xb6, 0x3c, 0xf3, 0xf3 }}
+
+ ## Include/Protocol/SmmGpiDispatch.h
+ gEfiSmmGpiDispatchProtocolGuid = { 0xe0744b81, 0x9513, 0x49cd, { 0x8c, 0xea, 0xe9, 0x24, 0x5e, 0x70, 0x39, 0xda }}
+
+ ## Include/Protocol/SmmStandbyButtonDispatch.h
+ gEfiSmmStandbyButtonDispatchProtocolGuid = { 0x78965b98, 0xb0bf, 0x449e, { 0x8b, 0x22, 0xd2, 0x91, 0x4e, 0x49, 0x8a, 0x98 }}
+
+ ## Include/Protocol/SmmPowerButtonDispatch.h
+ gEfiSmmPowerButtonDispatchProtocolGuid = { 0xb709efa0, 0x47a6, 0x4b41, { 0xb9, 0x31, 0x12, 0xec, 0xe7, 0xa8, 0xee, 0x56 }}
+
+ ## Include/Protocol/SmmIchnDispatch.h
+ gEfiSmmIchnDispatchProtocolGuid = { 0xc50b323e, 0x9075, 0x4f2a, { 0xac, 0x8e, 0xd2, 0x59, 0x6a, 0x10, 0x85, 0xcc }}
+
+ ## Include/Protocol/SmmCpuIo.h
+ gEfiSmmCpuIoGuid = { 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41}}
+
+ ## Include/Protocol/FrameworkFormCallback.h
+ gEfiFormCallbackProtocolGuid = { 0xF3E4543D, 0xCF35, 0x6CEF, { 0x35, 0xC4, 0x4F, 0xE6, 0x34, 0x4D, 0xFC, 0x54 }}
+
+ ## Include/Protocol/FrameworkFormBrowser.h
+ gEfiFormBrowserProtocolGuid = { 0xE5A1333E, 0xE1B4, 0x4D55, { 0xCE, 0xEB, 0x35, 0xC3, 0xEF, 0x13, 0x34, 0x43 }}
+
+ ## Include/Protocol/FrameworkFormBrowser.h
+ gEfiFormBrowserCompatibilityProtocolGuid = { 0xfb7c852, 0xadca, 0x4853, { 0x8d, 0xf, 0xfb, 0xa7, 0x1b, 0x1c, 0xe1, 0x1a }}
+
+ ## Include/Protocol/FrameworkFirmwareVolumeBlock.h
+ gFramerworkEfiFirmwareVolumeBlockProtocolGuid = { 0xDE28BC59, 0x6228, 0x41BD, { 0xBD, 0xF6, 0xA3, 0xB9, 0xAD, 0xB5, 0x8D, 0xA1 }}
+
+ ## Include/Protocol/SmmCpuSaveState.h
+ gEfiSmmCpuSaveStateProtocolGuid = { 0x21f302ad, 0x6e94, 0x471b, {0x84, 0xbc, 0xb1, 0x48, 0x0, 0x40, 0x3a, 0x1d}}
+
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ IntelFrameworkPkgExtra.uni
diff --git a/Core/IntelFrameworkPkg/IntelFrameworkPkg.dsc b/Core/IntelFrameworkPkg/IntelFrameworkPkg.dsc new file mode 100644 index 0000000000..93a76d641c --- /dev/null +++ b/Core/IntelFrameworkPkg/IntelFrameworkPkg.dsc @@ -0,0 +1,72 @@ +## @file
+# Intel Framework Package Reference Implementations
+#
+# This DSC file is used for Package Level build.
+#
+# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = IntelFramework
+ PLATFORM_GUID = E76EB141-6EDB-43f3-A455-EF24A79673DD
+ PLATFORM_VERSION = 0.96
+ DSC_SPECIFICATION = 0x00010005
+ OUTPUT_DIRECTORY = Build/IntelFramework
+ SUPPORTED_ARCHITECTURES = IA32|IPF|X64|EBC|ARM
+ BUILD_TARGETS = DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+[PcdsFixedAtBuild]
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0f
+
+[PcdsPatchableInModule]
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+
+[PcdsFeatureFlag]
+ gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|FALSE
+
+###################################################################################################
+#
+# Components Section - list of the modules and components that will be processed by compilation
+# tools and the EDK II tools to generate PE32/PE32+/Coff image files.
+#
+# Note: The EDK II DSC file is not used to specify how compiled binary images get placed
+# into firmware volume images. This section is just a list of modules to compile from
+# source into UEFI-compliant binaries.
+# It is the FDF file that contains information on combining binary files into firmware
+# volume images, whose concept is beyond UEFI and is described in PI specification.
+# Binary modules do not need to be listed in this section, as they should be
+# specified in the FDF file. For example: Shell binary (Shell_Full.efi), FAT binary (Fat.efi),
+# Logo (Logo.bmp), and etc.
+# There may also be modules listed in this section that are not required in the FDF file,
+# When a module listed here is excluded from FDF file, then UEFI-compliant binary will be
+# generated for it, but the binary will not be put into any firmware volume.
+#
+###################################################################################################
+[Components]
+ IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.inf
+ IntelFrameworkPkg/Library/FrameworkUefiLib/FrameworkUefiLib.inf
+ IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.inf
+ IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLibSmbusPpi.inf
+ IntelFrameworkPkg/Library/PeiHobLibFramework/PeiHobLibFramework.inf
+
diff --git a/Core/IntelFrameworkPkg/IntelFrameworkPkg.uni b/Core/IntelFrameworkPkg/IntelFrameworkPkg.uni Binary files differnew file mode 100644 index 0000000000..b358886f8c --- /dev/null +++ b/Core/IntelFrameworkPkg/IntelFrameworkPkg.uni diff --git a/Core/IntelFrameworkPkg/IntelFrameworkPkgExtra.uni b/Core/IntelFrameworkPkg/IntelFrameworkPkgExtra.uni Binary files differnew file mode 100644 index 0000000000..77e969c727 --- /dev/null +++ b/Core/IntelFrameworkPkg/IntelFrameworkPkgExtra.uni diff --git a/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h new file mode 100644 index 0000000000..a3b6af6ac7 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h @@ -0,0 +1,122 @@ +/** @file
+ Internal include file of DXE CPU IO Library.
+ It includes all necessary protocol/library class's header file
+ for implementation of IoLib library instance. It is included
+ all source code of this library instance.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeCpuIoLibInternal.h
+
+**/
+
+#ifndef _DXE_CPUIO_LIB_INTERNAL_H_
+#define _DXE_CPUIO_LIB_INTERNAL_H_
+
+
+#include <FrameworkDxe.h>
+
+#include <Protocol/CpuIo.h>
+
+#include <Library/IoLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseLib.h>
+
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI CPU I/O space.
+
+**/
+UINT64
+EFIAPI
+IoReadWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ );
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Data The value to write to the I/O port.
+
+ @return The paramter of Data.
+
+**/
+UINT64
+EFIAPI
+IoWriteWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+/**
+ Reads memory-mapped registers in the EFI system memory space.
+
+ Reads the MMIO registers specified by Address with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioReadWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ );
+
+/**
+ Writes memory-mapped registers in the EFI system memory space.
+
+ Writes the MMIO registers specified by Address with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Data The value to write to the I/O port.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioWriteWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.inf b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.inf new file mode 100644 index 0000000000..e3c6890442 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.inf @@ -0,0 +1,52 @@ +## @file
+# I/O Library implementation that uses the CPU I/O Protocol for I/O and MMIO operations.
+#
+# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeIoLibCpuIo
+ MODULE_UNI_FILE = DxeIoLibCpuIo.uni
+ FILE_GUID = e94cd42a-3aad-4ea0-9b09-945891c60ccd
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = IoLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER
+ CONSTRUCTOR = IoLibConstructor
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources]
+ IoLibMmioBuffer.c
+ DxeCpuIoLibInternal.h
+ IoHighLevel.c
+ IoLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ UefiBootServicesTableLib
+
+[Protocols]
+ gEfiCpuIoProtocolGuid ## CONSUMES
+
+[Depex.common.DXE_DRIVER, Depex.common.DXE_RUNTIME_DRIVER, Depex.common.DXE_SAL_DRIVER, Depex.common.DXE_SMM_DRIVER]
+ gEfiCpuIoProtocolGuid
+
diff --git a/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.uni b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.uni Binary files differnew file mode 100644 index 0000000000..06f0aefbe5 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.uni diff --git a/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoHighLevel.c b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoHighLevel.c new file mode 100644 index 0000000000..2ba291f415 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoHighLevel.c @@ -0,0 +1,2315 @@ +/** @file
+ High-level Io/Mmio functions.
+
+ All assertions for bit field operations are handled bit field functions in the
+ Base Library.
+
+ Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoHighLevel.c
+
+ The following IoLib instances share the same version of this file:
+
+ BaseIoLibIntrinsic
+ DxeIoLibCpuIo
+ PeiIoLibCpuIo
+
+**/
+
+
+#include "DxeCpuIoLibInternal.h"
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) | OrData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) & AndData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) | OrData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) & AndData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) | OrData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) & AndData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
diff --git a/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c new file mode 100644 index 0000000000..eb846e08ad --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c @@ -0,0 +1,622 @@ +/** @file
+ I/O Library.
+ The implementation of I/O operation for this library instance
+ are based on EFI_CPU_IO_PROTOCOL.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.c
+
+**/
+
+
+#include "DxeCpuIoLibInternal.h"
+
+//
+// Globle varible to cache pointer to CpuIo protocol.
+//
+EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;
+
+/**
+ The constructor function caches the pointer to CpuIo protocol.
+
+ The constructor function locates CpuIo protocol from protocol database.
+ It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+IoLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI CPU I/O space.
+
+**/
+UINT64
+EFIAPI
+IoReadWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ )
+{
+ EFI_STATUS Status;
+ UINT64 Data;
+
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all I/O read and write operations are serialized.
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Data The value to write to the I/O port.
+
+ @return The paramter of Data.
+
+**/
+UINT64
+EFIAPI
+IoWriteWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Reads memory-mapped registers in the EFI system memory space.
+
+ Reads the MMIO registers specified by Address with registers width specified by Width.
+ The read value is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioReadWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ )
+{
+ EFI_STATUS Status;
+ UINT64 Data;
+
+ Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Writes memory-mapped registers in the EFI system memory space.
+
+ Writes the MMIO registers specified by Address with registers width and value specified by Width
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ This function must guarantee that all MMIO read and write operations are serialized.
+
+ @param Address The MMIO register to read.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Data The value to write to the I/O port.
+
+ @return Data read from registers in the EFI system memory space.
+
+**/
+UINT64
+EFIAPI
+MmioWriteWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
+ ASSERT_EFI_ERROR (Status);
+
+ return Data;
+}
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
+}
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ //
+ // Make sure Port is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Port & 7) == 0);
+ return IoReadWorker (Port, EfiCpuIoWidthUint64);
+}
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ )
+{
+ //
+ // Make sure Port is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Port & 7) == 0);
+ return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
+}
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ )
+{
+ return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ )
+{
+ //
+ // Make sure Address is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Address & 1) == 0);
+ return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ //
+ // Make sure Address is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Address & 1) == 0);
+ return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ )
+{
+ //
+ // Make sure Address is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Address & 3) == 0);
+ return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ //
+ // Make sure Address is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Address & 3) == 0);
+ return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ )
+{
+ //
+ // Make sure Address is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Address & 7) == 0);
+ return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ )
+{
+ //
+ // Make sure Address is aligned on a 64-bit boundary.
+ //
+ ASSERT ((Address & 7) == 0);
+ return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
+}
diff --git a/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLibMmioBuffer.c b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLibMmioBuffer.c new file mode 100644 index 0000000000..b4b9ad5d2f --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLibMmioBuffer.c @@ -0,0 +1,416 @@ +/** @file
+ I/O Library MMIO Buffer Functions.
+
+ Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLibMmioBuffer.c
+
+**/
+
+
+#include "DxeCpuIoLibInternal.h"
+
+/**
+ Copy data from MMIO region to system memory by using 8-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 8-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT8 *
+EFIAPI
+MmioReadBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT8 *Buffer
+ )
+{
+ UINT8 *ReturnBuffer;
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ReturnBuffer = Buffer;
+
+ while (Length-- > 0) {
+ *(Buffer++) = MmioRead8 (StartAddress++);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 16-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 16-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT16 *
+EFIAPI
+MmioReadBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT16 *Buffer
+ )
+{
+ UINT16 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length > 0) {
+ *(Buffer++) = MmioRead16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Length -= sizeof (UINT16);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 32-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 32-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT32 *
+EFIAPI
+MmioReadBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT32 *Buffer
+ )
+{
+ UINT32 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length > 0) {
+ *(Buffer++) = MmioRead32 (StartAddress);
+ StartAddress += sizeof (UINT32);
+ Length -= sizeof (UINT32);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 64-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 64-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT64 *
+EFIAPI
+MmioReadBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT64 *Buffer
+ )
+{
+ UINT64 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length > 0) {
+ *(Buffer++) = MmioRead64 (StartAddress);
+ StartAddress += sizeof (UINT64);
+ Length -= sizeof (UINT64);
+ }
+
+ return ReturnBuffer;
+}
+
+
+/**
+ Copy data from system memory to MMIO region by using 8-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 8-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer
+
+**/
+UINT8 *
+EFIAPI
+MmioWriteBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT8 *Buffer
+ )
+{
+ VOID* ReturnBuffer;
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ReturnBuffer = (UINT8 *) Buffer;
+
+ while (Length-- > 0) {
+ MmioWrite8 (StartAddress++, *(Buffer++));
+ }
+
+ return ReturnBuffer;
+
+}
+
+/**
+ Copy data from system memory to MMIO region by using 16-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 16-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer
+
+**/
+UINT16 *
+EFIAPI
+MmioWriteBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT16 *Buffer
+ )
+{
+ UINT16 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+ ReturnBuffer = (UINT16 *) Buffer;
+
+ while (Length > 0) {
+ MmioWrite16 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT16);
+ Length -= sizeof (UINT16);
+ }
+
+ return ReturnBuffer;
+}
+
+
+/**
+ Copy data from system memory to MMIO region by using 32-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 32-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer
+
+**/
+UINT32 *
+EFIAPI
+MmioWriteBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT32 *Buffer
+ )
+{
+ UINT32 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+ ReturnBuffer = (UINT32 *) Buffer;
+
+ while (Length > 0) {
+ MmioWrite32 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT32);
+ Length -= sizeof (UINT32);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from system memory to MMIO region by using 64-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 64-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer
+
+**/
+UINT64 *
+EFIAPI
+MmioWriteBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT64 *Buffer
+ )
+{
+ UINT64 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+ ReturnBuffer = (UINT64 *) Buffer;
+
+ while (Length > 0) {
+ MmioWrite64 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT64);
+ Length -= sizeof (UINT64);
+ }
+
+ return ReturnBuffer;
+}
+
diff --git a/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c b/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c new file mode 100644 index 0000000000..e6892cbafe --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c @@ -0,0 +1,276 @@ +/** @file
+ This file implement EfiMain() for library class DxeSmmDriverEntryPoint.
+ EfiMain() is common driver entry point for all SMM driver who uses DxeSmmDriverEntryPoint
+ library class.
+
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include <FrameworkSmm.h>
+
+#include <Protocol/LoadedImage.h>
+#include <Protocol/SmmBase.h>
+#include <Protocol/DevicePath.h>
+
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+
+/**
+ This function returns the size, in bytes,
+ of the device path data structure specified by DevicePath.
+ If DevicePath is NULL, then 0 is returned.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The size of a device path in bytes.
+
+**/
+UINTN
+EFIAPI
+SmmGetDevicePathSize (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ CONST EFI_DEVICE_PATH_PROTOCOL *Start;
+
+ if (DevicePath == NULL) {
+ return 0;
+ }
+
+ //
+ // Search for the end of the device path structure
+ //
+ Start = DevicePath;
+ while (!IsDevicePathEnd (DevicePath)) {
+ DevicePath = NextDevicePathNode (DevicePath);
+ }
+
+ //
+ // Compute the size and add back in the size of the end device path structure
+ //
+ return ((UINTN) DevicePath - (UINTN) Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+}
+
+/**
+ This function appends the device path SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a device path data structure.
+
+ @return A pointer to the new device path is returned.
+ NULL is returned if space for the new device path could not be allocated from pool.
+ It is up to the caller to free the memory used by FirstDevicePath and SecondDevicePath
+ if they are no longer needed.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+SmmAppendDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+{
+ EFI_STATUS Status;
+ UINTN Size;
+ UINTN Size1;
+ UINTN Size2;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath2;
+
+ ASSERT (FirstDevicePath != NULL && SecondDevicePath != NULL);
+
+ //
+ // Allocate space for the combined device path. It only has one end node of
+ // length EFI_DEVICE_PATH_PROTOCOL
+ //
+ Size1 = SmmGetDevicePathSize (FirstDevicePath);
+ Size2 = SmmGetDevicePathSize (SecondDevicePath);
+ Size = Size1 + Size2 - sizeof (EFI_DEVICE_PATH_PROTOCOL);
+
+ Status = gBS->AllocatePool (EfiBootServicesData, Size, (VOID **) &NewDevicePath);
+
+ if (EFI_SUCCESS == Status) {
+ //
+ // CopyMem in gBS is used as this service should always be ready. We didn't choose
+ // to use a BaseMemoryLib function as such library instance may have constructor.
+ //
+ gBS->CopyMem ((VOID *) NewDevicePath, (VOID *) FirstDevicePath, Size1);
+ //
+ // Over write Src1 EndNode and do the copy
+ //
+ DevicePath2 = (EFI_DEVICE_PATH_PROTOCOL *) ((CHAR8 *) NewDevicePath + (Size1 - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ gBS->CopyMem ((VOID *) DevicePath2, (VOID *) SecondDevicePath, Size2);
+ }
+
+ return NewDevicePath;
+}
+
+/**
+ Unload function that is registered in the LoadImage protocol. It un-installs
+ protocols produced and deallocates pool used by the driver. Called by the core
+ when unloading the driver.
+
+ @param ImageHandle ImageHandle of the unloaded driver
+
+ @return Status of the ProcessModuleUnloadList.
+
+**/
+EFI_STATUS
+EFIAPI
+_DriverUnloadHandler (
+ EFI_HANDLE ImageHandle
+ )
+{
+ //
+ // Call the unload handlers for all the modules.
+ //
+ // Note: All libraries were constructed in SMM space,
+ // therefore we can not destruct them in Unload
+ // handler.
+ //
+ return ProcessModuleUnloadList (ImageHandle);
+}
+
+/**
+ Enrty point to DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ EFI_SMM_BASE_PROTOCOL *SmmBase;
+ BOOLEAN InSmm;
+ EFI_DEVICE_PATH_PROTOCOL *CompleteFilePath;
+ EFI_DEVICE_PATH_PROTOCOL *ImageDevicePath;
+ EFI_HANDLE Handle;
+
+ //
+ // Cache a pointer to the Boot Services Table
+ //
+ gBS = SystemTable->BootServices;
+
+ //
+ // Retrieve SMM Base Protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiSmmBaseProtocolGuid,
+ NULL,
+ (VOID **) &SmmBase
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Check to see if we are already in SMM
+ //
+ SmmBase->InSmm (SmmBase, &InSmm);
+
+ //
+ //
+ //
+ if (!InSmm) {
+ //
+ // Retrieve the Loaded Image Protocol
+ //
+ Status = gBS->HandleProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID*)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+ //
+ // Retrieve the Device Path Protocol from the DeviceHandle from which this driver was loaded
+ //
+ Status = gBS->HandleProtocol (
+ LoadedImage->DeviceHandle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID*)&ImageDevicePath
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build the full device path to the currently execuing image
+ //
+ CompleteFilePath = SmmAppendDevicePath (ImageDevicePath, LoadedImage->FilePath);
+
+ //
+ // Load the image in memory to SMRAM; it will automatically generate the
+ // SMI.
+ //
+ Status = SmmBase->Register (SmmBase, CompleteFilePath, LoadedImage->ImageBase, 0, &Handle, FALSE);
+ ASSERT_EFI_ERROR (Status);
+ //
+ // Optionally install the unload handler
+ //
+ if (_gDriverUnloadImageCount > 0) {
+ Status = gBS->HandleProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+ LoadedImage->Unload = _DriverUnloadHandler;
+ }
+
+ return Status;
+ }
+
+ //
+ // Call constructor for all libraries
+ //
+ ProcessLibraryConstructorList (ImageHandle, SystemTable);
+
+ //
+ // Call the list of driver entry points
+ //
+ Status = ProcessModuleEntryPointList (ImageHandle, SystemTable);
+ if (EFI_ERROR (Status)) {
+ ProcessLibraryDestructorList (ImageHandle, SystemTable);
+ }
+
+ return Status;
+}
+
+/**
+ Enrty point wrapper of DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ return _ModuleEntryPoint (ImageHandle, SystemTable);
+}
diff --git a/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.inf b/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.inf new file mode 100644 index 0000000000..9a5b523ea0 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.inf @@ -0,0 +1,55 @@ +## @file
+# Framework SMM driver entry point library.
+#
+# Register driver in SMRAM and wrapper driver's library constructors and entry point.
+#
+# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeSmmDriverEntryPoint
+ MODULE_UNI_FILE = DxeSmmDriverEntryPoint.uni
+ FILE_GUID = 79C5C7B7-1083-42a6-AD15-2A4E7C4274D7
+ MODULE_TYPE = DXE_SMM_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = UefiDriverEntryPoint|DXE_SMM_DRIVER
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ DriverEntryPoint.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+
+[LibraryClasses]
+ DebugLib
+ UefiBootServicesTableLib
+ DevicePathLib
+
+[Protocols]
+ gEfiLoadedImageProtocolGuid ## CONSUMES
+ gEfiSmmBaseProtocolGuid ## CONSUMES
+ gEfiDevicePathProtocolGuid ## CONSUMES
+
+[Depex]
+ gEfiSmmBaseProtocolGuid
+
diff --git a/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.uni b/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.uni Binary files differnew file mode 100644 index 0000000000..0965afce01 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.uni diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/Console.c b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/Console.c new file mode 100644 index 0000000000..244e532f57 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/Console.c @@ -0,0 +1,476 @@ +/** @file
+ This module provide help function for displaying unicode string.
+
+ Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+#include "UefiLibInternal.h"
+
+typedef struct {
+ CHAR16 WChar;
+ UINT32 Width;
+} UNICODE_WIDTH_ENTRY;
+
+GLOBAL_REMOVE_IF_UNREFERENCED CONST UNICODE_WIDTH_ENTRY mUnicodeWidthTable[] = {
+ //
+ // General script area
+ //
+ {(CHAR16)0x1FFF, 1},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all narrow glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x007F, 1}, // C0 controls and basic Latin. 0x0000-0x007F
+ {(CHAR16)0x00FF, 1}, // C1 controls and Latin-1 support. 0x0080-0x00FF
+ {(CHAR16)0x017F, 1}, // Latin extended-A. 0x0100-0x017F
+ {(CHAR16)0x024F, 1}, // Latin extended-B. 0x0180-0x024F
+ {(CHAR16)0x02AF, 1}, // IPA extensions. 0x0250-0x02AF
+ {(CHAR16)0x02FF, 1}, // Spacing modifier letters. 0x02B0-0x02FF
+ {(CHAR16)0x036F, 1}, // Combining diacritical marks. 0x0300-0x036F
+ {(CHAR16)0x03FF, 1}, // Greek. 0x0370-0x03FF
+ {(CHAR16)0x04FF, 1}, // Cyrillic. 0x0400-0x04FF
+ {(CHAR16)0x052F, 0}, // Unassigned. As Armenian in ver3.0. 0x0500-0x052F
+ {(CHAR16)0x058F, 1}, // Armenian. 0x0530-0x058F
+ {(CHAR16)0x05FF, 1}, // Hebrew. 0x0590-0x05FF
+ {(CHAR16)0x06FF, 1}, // Arabic. 0x0600-0x06FF
+ {(CHAR16)0x08FF, 0}, // Unassigned. 0x0700-0x08FF
+ {(CHAR16)0x097F, 1}, // Devanagari. 0x0900-0x097F
+ {(CHAR16)0x09FF, 1}, // Bengali. 0x0980-0x09FF
+ {(CHAR16)0x0A7F, 1}, // Gurmukhi. 0x0A00-0x0A7F
+ {(CHAR16)0x0AFF, 1}, // Gujarati. 0x0A80-0x0AFF
+ {(CHAR16)0x0B7F, 1}, // Oriya. 0x0B00-0x0B7F
+ {(CHAR16)0x0BFF, 1}, // Tamil. (See page 7-92). 0x0B80-0x0BFF
+ {(CHAR16)0x0C7F, 1}, // Telugu. 0x0C00-0x0C7F
+ {(CHAR16)0x0CFF, 1}, // Kannada. (See page 7-100). 0x0C80-0x0CFF
+ {(CHAR16)0x0D7F, 1}, // Malayalam (See page 7-104). 0x0D00-0x0D7F
+ {(CHAR16)0x0DFF, 0}, // Unassigned. 0x0D80-0x0DFF
+ {(CHAR16)0x0E7F, 1}, // Thai. 0x0E00-0x0E7F
+ {(CHAR16)0x0EFF, 1}, // Lao. 0x0E80-0x0EFF
+ {(CHAR16)0x0FBF, 1}, // Tibetan. 0x0F00-0x0FBF
+ {(CHAR16)0x109F, 0}, // Unassigned. 0x0FC0-0x109F
+ {(CHAR16)0x10FF, 1}, // Georgian. 0x10A0-0x10FF
+ {(CHAR16)0x11FF, 1}, // Hangul Jamo. 0x1100-0x11FF
+ {(CHAR16)0x1DFF, 0}, // Unassigned. 0x1200-0x1DFF
+ {(CHAR16)0x1EFF, 1}, // Latin extended additional. 0x1E00-0x1EFF
+ {(CHAR16)0x1FFF, 1}, // Greek extended. 0x1F00-0x1FFF
+ *
+ */
+
+ //
+ // Symbol area
+ //
+ {(CHAR16)0x2FFF, 1},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all narrow glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x206F, 1}, // General punctuation. (See page7-154). 0x200-0x206F
+ {(CHAR16)0x209F, 1}, // Superscripts and subscripts. 0x2070-0x209F
+ {(CHAR16)0x20CF, 1}, // Currency symbols. 0x20A0-0x20CF
+ {(CHAR16)0x20FF, 1}, // Combining diacritical marks for symbols. 0x20D0-0x20FF
+ {(CHAR16)0x214F, 1}, // Letterlike sympbols. 0x2100-0x214F
+ {(CHAR16)0x218F, 1}, // Number forms. 0x2150-0x218F
+ {(CHAR16)0x21FF, 1}, // Arrows. 0x2190-0x21FF
+ {(CHAR16)0x22FF, 1}, // Mathematical operators. 0x2200-0x22FF
+ {(CHAR16)0x23FF, 1}, // Miscellaneous technical. 0x2300-0x23FF
+ {(CHAR16)0x243F, 1}, // Control pictures. 0x2400-0x243F
+ {(CHAR16)0x245F, 1}, // Optical character recognition. 0x2440-0x245F
+ {(CHAR16)0x24FF, 1}, // Enclosed alphanumerics. 0x2460-0x24FF
+ {(CHAR16)0x257F, 1}, // Box drawing. 0x2500-0x257F
+ {(CHAR16)0x259F, 1}, // Block elements. 0x2580-0x259F
+ {(CHAR16)0x25FF, 1}, // Geometric shapes. 0x25A0-0x25FF
+ {(CHAR16)0x26FF, 1}, // Miscellaneous symbols. 0x2600-0x26FF
+ {(CHAR16)0x27BF, 1}, // Dingbats. 0x2700-0x27BF
+ {(CHAR16)0x2FFF, 0}, // Reserved. 0x27C0-0x2FFF
+ *
+ */
+
+ //
+ // CJK phonetics and symbol area
+ //
+ {(CHAR16)0x33FF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x303F, 2}, // CJK symbols and punctuation. 0x3000-0x303F
+ {(CHAR16)0x309F, 2}, // Hiragana. 0x3040-0x309F
+ {(CHAR16)0x30FF, 2}, // Katakana. 0x30A0-0x30FF
+ {(CHAR16)0x312F, 2}, // Bopomofo. 0x3100-0x312F
+ {(CHAR16)0x318F, 2}, // Hangul compatibility jamo. 0x3130-0x318F
+ {(CHAR16)0x319F, 2}, // Kanbun. 0x3190-0x319F
+ {(CHAR16)0x31FF, 0}, // Reserved. As Bopomofo extended in ver3.0. 0x31A0-0x31FF
+ {(CHAR16)0x32FF, 2}, // Enclosed CJK letters and months. 0x3200-0x32FF
+ {(CHAR16)0x33FF, 2}, // CJK compatibility. 0x3300-0x33FF
+ *
+ */
+
+ //
+ // CJK ideograph area
+ //
+ {(CHAR16)0x9FFF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x4DFF, 0}, // Reserved. 0x3400-0x4DBF as CJK unified ideographs
+ // extension A in ver3.0. 0x3400-0x4DFF
+ {(CHAR16)0x9FFF, 2}, // CJK unified ideographs. 0x4E00-0x9FFF
+ *
+ */
+
+ //
+ // Reserved
+ //
+ {(CHAR16)0xABFF, 0}, // Reserved. 0xA000-0xA490 as Yi syllables. 0xA490-0xA4D0
+ // as Yi radicals in ver3.0. 0xA000-0xABFF
+ //
+ // Hangul syllables
+ //
+ {(CHAR16)0xD7FF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0xD7A3, 2}, // Hangul syllables. 0xAC00-0xD7A3
+ {(CHAR16)0xD7FF, 0}, // Reserved. 0xD7A3-0xD7FF
+ *
+ */
+
+ //
+ // Surrogates area
+ //
+ {(CHAR16)0xDFFF, 0}, // Surrogates, not used now. 0xD800-0xDFFF
+
+ //
+ // Private use area
+ //
+ {(CHAR16)0xF8FF, 0}, // Private use area. 0xE000-0xF8FF
+
+ //
+ // Compatibility area and specials
+ //
+ {(CHAR16)0xFAFF, 2}, // CJK compatibility ideographs. 0xF900-0xFAFF
+ {(CHAR16)0xFB4F, 1}, // Alphabetic presentation forms. 0xFB00-0xFB4F
+ {(CHAR16)0xFDFF, 1}, // Arabic presentation forms-A. 0xFB50-0xFDFF
+ {(CHAR16)0xFE1F, 0}, // Reserved. As variation selectors in ver3.0. 0xFE00-0xFE1F
+ {(CHAR16)0xFE2F, 1}, // Combining half marks. 0xFE20-0xFE2F
+ {(CHAR16)0xFE4F, 2}, // CJK compatibility forms. 0xFE30-0xFE4F
+ {(CHAR16)0xFE6F, 1}, // Small Form Variants. 0xFE50-0xFE6F
+ {(CHAR16)0xFEFF, 1}, // Arabic presentation forms-B. 0xFE70-0xFEFF
+ {(CHAR16)0xFFEF, 1}, // Half width and full width forms. 0xFF00-0xFFEF
+ {(CHAR16)0xFFFF, 0}, // Speicials. 0xFFF0-0xFFFF
+};
+
+/**
+ Retrieves the width of a Unicode character.
+
+ This function computes and returns the width of the Unicode character specified
+ by UnicodeChar.
+
+ @param UnicodeChar A Unicode character.
+
+ @retval 0 The width if UnicodeChar could not be determined.
+ @retval 1 UnicodeChar is a narrow glyph.
+ @retval 2 UnicodeChar is a wide glyph.
+
+**/
+UINTN
+EFIAPI
+GetGlyphWidth (
+ IN CHAR16 UnicodeChar
+ )
+{
+ UINTN Index;
+ UINTN Low;
+ UINTN High;
+ CONST UNICODE_WIDTH_ENTRY *Item;
+
+ Item = NULL;
+ Low = 0;
+ High = (sizeof (mUnicodeWidthTable)) / (sizeof (UNICODE_WIDTH_ENTRY)) - 1;
+ while (Low <= High) {
+ Index = (Low + High) >> 1;
+ Item = &(mUnicodeWidthTable[Index]);
+ if (Index == 0) {
+ if (UnicodeChar <= Item->WChar) {
+ break;
+ }
+
+ return 0;
+ }
+
+ if (UnicodeChar > Item->WChar) {
+ Low = Index + 1;
+ } else if (UnicodeChar <= mUnicodeWidthTable[Index - 1].WChar) {
+ High = Index - 1;
+ } else {
+ //
+ // Index - 1 < UnicodeChar <= Index. Found
+ //
+ break;
+ }
+ }
+
+ if (Low <= High) {
+ return Item->Width;
+ }
+
+ return 0;
+}
+
+/**
+ Computes the display length of a Null-terminated Unicode String.
+
+ This function computes and returns the display length of the Null-terminated Unicode
+ string specified by String. If String is NULL then 0 is returned. If any of the widths
+ of the Unicode characters in String can not be determined, then 0 is returned. The display
+ width of String can be computed by summing the display widths of each Unicode character
+ in String. Unicode characters that are narrow glyphs have a width of 1, and Unicode
+ characters that are width glyphs have a width of 2.
+ If String is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param String A pointer to a Null-terminated Unicode string.
+
+ @return The display length of the Null-terminated Unicode string specified by String.
+
+**/
+UINTN
+EFIAPI
+UnicodeStringDisplayLength (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Length;
+ UINTN Width;
+
+ if (String == NULL) {
+ return 0;
+ }
+
+ Length = 0;
+ while (*String != 0) {
+ Width = GetGlyphWidth (*String);
+ if (Width == 0) {
+ return 0;
+ }
+
+ Length += Width;
+ String++;
+ }
+
+ return Length;
+}
+
+/**
+ Draws a dialog box to the console output device specified by
+ ConOut defined in the EFI_SYSTEM_TABLE and waits for a keystroke
+ from the console input device specified by ConIn defined in the
+ EFI_SYSTEM_TABLE.
+
+ If there are no strings in the variable argument list, then ASSERT().
+ If all the strings in the variable argument list are empty, then ASSERT().
+
+ @param[in] Attribute Specifies the foreground and background color of the popup.
+ @param[out] Key A pointer to the EFI_KEY value of the key that was
+ pressed. This is an optional parameter that may be NULL.
+ If it is NULL then no wait for a keypress will be performed.
+ @param[in] ... The variable argument list that contains pointers to Null-
+ terminated Unicode strings to display in the dialog box.
+ The variable argument list is terminated by a NULL.
+
+**/
+VOID
+EFIAPI
+CreatePopUp (
+ IN UINTN Attribute,
+ OUT EFI_INPUT_KEY *Key, OPTIONAL
+ ...
+ )
+{
+ EFI_STATUS Status;
+ VA_LIST Args;
+ EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *ConOut;
+ EFI_SIMPLE_TEXT_OUTPUT_MODE SavedConsoleMode;
+ UINTN Columns;
+ UINTN Rows;
+ UINTN Column;
+ UINTN Row;
+ UINTN NumberOfLines;
+ UINTN MaxLength;
+ CHAR16 *String;
+ UINTN Length;
+ CHAR16 *Line;
+ UINTN EventIndex;
+
+ //
+ // Determine the length of the longest line in the popup and the the total
+ // number of lines in the popup
+ //
+ VA_START (Args, Key);
+ MaxLength = 0;
+ NumberOfLines = 0;
+ while ((String = VA_ARG (Args, CHAR16 *)) != NULL) {
+ MaxLength = MAX (MaxLength, StrLen (String));
+ NumberOfLines++;
+ }
+ VA_END (Args);
+
+ //
+ // If the total number of lines in the popup is zero, then ASSERT()
+ //
+ ASSERT (NumberOfLines != 0);
+
+ //
+ // If the maximum length of all the strings is zero, then ASSERT()
+ //
+ ASSERT (MaxLength != 0);
+
+ //
+ // Cache a pointer to the Simple Text Output Protocol in the EFI System Table
+ //
+ ConOut = gST->ConOut;
+
+ //
+ // Save the current console cursor position and attributes
+ //
+ CopyMem (&SavedConsoleMode, ConOut->Mode, sizeof (SavedConsoleMode));
+
+ //
+ // Retrieve the number of columns and rows in the current console mode
+ //
+ ConOut->QueryMode (ConOut, SavedConsoleMode.Mode, &Columns, &Rows);
+
+ //
+ // Disable cursor and set the foreground and background colors specified by Attribute
+ //
+ ConOut->EnableCursor (ConOut, FALSE);
+ ConOut->SetAttribute (ConOut, Attribute);
+
+ //
+ // Limit NumberOfLines to height of the screen minus 3 rows for the box itself
+ //
+ NumberOfLines = MIN (NumberOfLines, Rows - 3);
+
+ //
+ // Limit MaxLength to width of the screen minus 2 columns for the box itself
+ //
+ MaxLength = MIN (MaxLength, Columns - 2);
+
+ //
+ // Compute the starting row and starting column for the popup
+ //
+ Row = (Rows - (NumberOfLines + 3)) / 2;
+ Column = (Columns - (MaxLength + 2)) / 2;
+
+ //
+ // Allocate a buffer for a single line of the popup with borders and a Null-terminator
+ //
+ Line = AllocateZeroPool ((MaxLength + 3) * sizeof (CHAR16));
+ ASSERT (Line != NULL);
+
+ //
+ // Draw top of popup box
+ //
+ SetMem16 (Line, (MaxLength + 2) * 2, BOXDRAW_HORIZONTAL);
+ Line[0] = BOXDRAW_DOWN_RIGHT;
+ Line[MaxLength + 1] = BOXDRAW_DOWN_LEFT;
+ Line[MaxLength + 2] = L'\0';
+ ConOut->SetCursorPosition (ConOut, Column, Row++);
+ ConOut->OutputString (ConOut, Line);
+
+ //
+ // Draw middle of the popup with strings
+ //
+ VA_START (Args, Key);
+ while ((String = VA_ARG (Args, CHAR16 *)) != NULL && NumberOfLines > 0) {
+ Length = StrLen (String);
+ SetMem16 (Line, (MaxLength + 2) * 2, L' ');
+ if (Length <= MaxLength) {
+ //
+ // Length <= MaxLength
+ //
+ CopyMem (Line + 1 + (MaxLength - Length) / 2, String , Length * sizeof (CHAR16));
+ } else {
+ //
+ // Length > MaxLength
+ //
+ CopyMem (Line + 1, String + (Length - MaxLength) / 2 , MaxLength * sizeof (CHAR16));
+ }
+ Line[0] = BOXDRAW_VERTICAL;
+ Line[MaxLength + 1] = BOXDRAW_VERTICAL;
+ Line[MaxLength + 2] = L'\0';
+ ConOut->SetCursorPosition (ConOut, Column, Row++);
+ ConOut->OutputString (ConOut, Line);
+ NumberOfLines--;
+ }
+ VA_END (Args);
+
+ //
+ // Draw bottom of popup box
+ //
+ SetMem16 (Line, (MaxLength + 2) * 2, BOXDRAW_HORIZONTAL);
+ Line[0] = BOXDRAW_UP_RIGHT;
+ Line[MaxLength + 1] = BOXDRAW_UP_LEFT;
+ Line[MaxLength + 2] = L'\0';
+ ConOut->SetCursorPosition (ConOut, Column, Row++);
+ ConOut->OutputString (ConOut, Line);
+
+ //
+ // Free the allocated line buffer
+ //
+ FreePool (Line);
+
+ //
+ // Restore the cursor visibility, position, and attributes
+ //
+ ConOut->EnableCursor (ConOut, SavedConsoleMode.CursorVisible);
+ ConOut->SetCursorPosition (ConOut, SavedConsoleMode.CursorColumn, SavedConsoleMode.CursorRow);
+ ConOut->SetAttribute (ConOut, SavedConsoleMode.Attribute);
+
+ //
+ // Wait for a keystroke
+ //
+ if (Key != NULL) {
+ while (TRUE) {
+ Status = gST->ConIn->ReadKeyStroke (gST->ConIn, Key);
+ if (!EFI_ERROR (Status)) {
+ break;
+ }
+
+ //
+ // If we encounter error, continue to read another key in.
+ //
+ if (Status != EFI_NOT_READY) {
+ continue;
+ }
+ gBS->WaitForEvent (1, &gST->ConIn->WaitForKey, &EventIndex);
+ }
+ }
+}
diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/FrameworkUefiLib.inf b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/FrameworkUefiLib.inf new file mode 100644 index 0000000000..7057ef6e26 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/FrameworkUefiLib.inf @@ -0,0 +1,82 @@ +## @file
+# Library to abstract Framework extensions that conflict with UEFI 2.0 Specification.
+#
+# This library is helpful to port Framework/Tinao code that has conflicts with UEFI 2.0.
+# It hides the old conflicts with library functions and supporting implementations of
+# the old (EDK/EFI 1.10) and new (EDK II/UEFI 2.0) way.
+#
+# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = FrameworkUefiLib
+ MODULE_UNI_FILE = FrameworkUefiLib.uni
+ FILE_GUID = B2F0D71A-A39F-4094-854B-0C6BA6910CCE
+ MODULE_TYPE = UEFI_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = UefiLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER
+
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources]
+ UefiLibPrint.c
+ UefiNotTiano.c
+ UefiDriverModel.c
+ Console.c
+ UefiLib.c
+ UefiLibInternal.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+[LibraryClasses]
+ PrintLib
+ PcdLib
+ MemoryAllocationLib
+ DebugLib
+ BaseMemoryLib
+ BaseLib
+ UefiBootServicesTableLib
+ DevicePathLib
+
+[Guids]
+ gEfiEventReadyToBootGuid ## SOMETIMES_CONSUMES ## Event
+ gEfiEventLegacyBootGuid ## SOMETIMES_CONSUMES ## Event
+
+[Protocols]
+ gEfiDriverBindingProtocolGuid ## SOMETIMES_PRODUCES
+ gEfiSimpleTextOutProtocolGuid ## SOMETIMES_CONSUMES
+ gEfiGraphicsOutputProtocolGuid ## SOMETIMES_CONSUMES
+ gEfiHiiFontProtocolGuid ## SOMETIMES_CONSUMES
+ gEfiComponentNameProtocolGuid ## SOMETIMES_PRODUCES
+ gEfiComponentName2ProtocolGuid ## SOMETIMES_PRODUCES
+ gEfiDriverConfigurationProtocolGuid ## SOMETIMES_PRODUCES
+ gEfiDriverConfiguration2ProtocolGuid ## SOMETIMES_PRODUCES
+ gEfiDriverDiagnosticsProtocolGuid ## SOMETIMES_PRODUCES
+ gEfiDriverDiagnostics2ProtocolGuid ## SOMETIMES_PRODUCES
+ gEfiUgaDrawProtocolGuid ## SOMETIMES_CONSUMES
+
+
+[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize ## SOMETIMES_CONSUMES
+
+[FeaturePcd]
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable ## CONSUMES
+ gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable ## CONSUMES
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable ## CONSUMES
+ gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable ## CONSUMES
+ gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport ## CONSUMES
+
diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/FrameworkUefiLib.uni b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/FrameworkUefiLib.uni Binary files differnew file mode 100644 index 0000000000..5ea7cae04e --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/FrameworkUefiLib.uni diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiDriverModel.c b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiDriverModel.c new file mode 100644 index 0000000000..9cd35fb3ca --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiDriverModel.c @@ -0,0 +1,1056 @@ +/** @file
+ Library functions that abstract driver model protocols
+ installation.
+
+ Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials are
+ licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "UefiLibInternal.h"
+
+/**
+ Installs and completes the initialization of a Driver Binding Protocol instance.
+
+ Installs the Driver Binding Protocol specified by DriverBinding onto the handle
+ specified by DriverBindingHandle. If DriverBindingHandle is NULL, then DriverBinding
+ is installed onto a newly created handle. DriverBindingHandle is typically the same
+ as the driver's ImageHandle, but it can be different if the driver produces multiple
+ Driver Binding Protocols.
+ If DriverBinding is NULL, then ASSERT().
+ If DriverBinding can not be installed onto a handle, then ASSERT().
+
+ @param ImageHandle The image handle of the driver.
+ @param SystemTable The EFI System Table that was passed to the driver's entry point.
+ @param DriverBinding A Driver Binding Protocol instance that this driver is producing.
+ @param DriverBindingHandle The handle that DriverBinding is to be installed onto. If this
+ parameter is NULL, then a new handle is created.
+
+ @retval EFI_SUCCESS The protocol installation is completed successfully.
+ @retval EFI_OUT_OF_RESOURCES There was not enough system resources to install the protocol.
+ @retval Others Status from gBS->InstallMultipleProtocolInterfaces().
+
+**/
+EFI_STATUS
+EFIAPI
+EfiLibInstallDriverBinding (
+ IN CONST EFI_HANDLE ImageHandle,
+ IN CONST EFI_SYSTEM_TABLE *SystemTable,
+ IN EFI_DRIVER_BINDING_PROTOCOL *DriverBinding,
+ IN EFI_HANDLE DriverBindingHandle
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (DriverBinding != NULL);
+
+ //
+ // Update the ImageHandle and DriverBindingHandle fields of the Driver Binding Protocol
+ //
+ DriverBinding->ImageHandle = ImageHandle;
+ DriverBinding->DriverBindingHandle = DriverBindingHandle;
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ NULL
+ );
+ //
+ // ASSERT if the call to InstallMultipleProtocolInterfaces() failed
+ //
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+/**
+ Installs and completes the initialization of a Driver Binding Protocol instance and
+ optionally installs the Component Name, Driver Configuration and Driver Diagnostics Protocols.
+
+ Initializes a driver by installing the Driver Binding Protocol together with the
+ optional Component Name, optional Driver Configure and optional Driver Diagnostic
+ Protocols onto the driver's DriverBindingHandle. If DriverBindingHandle is NULL,
+ then the protocols are installed onto a newly created handle. DriverBindingHandle
+ is typically the same as the driver's ImageHandle, but it can be different if the
+ driver produces multiple Driver Binding Protocols.
+ If DriverBinding is NULL, then ASSERT().
+ If the installation fails, then ASSERT().
+
+ @param ImageHandle The image handle of the driver.
+ @param SystemTable The EFI System Table that was passed to the driver's entry point.
+ @param DriverBinding A Driver Binding Protocol instance that this driver is producing.
+ @param DriverBindingHandle The handle that DriverBinding is to be installed onto. If this
+ parameter is NULL, then a new handle is created.
+ @param ComponentName A Component Name Protocol instance that this driver is producing.
+ @param DriverConfiguration A Driver Configuration Protocol instance that this driver is producing.
+ @param DriverDiagnostics A Driver Diagnostics Protocol instance that this driver is producing.
+
+ @retval EFI_SUCCESS The protocol installation is completed successfully.
+ @retval EFI_OUT_OF_RESOURCES There was not enough memory in pool to install all the protocols.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiLibInstallAllDriverProtocols (
+ IN CONST EFI_HANDLE ImageHandle,
+ IN CONST EFI_SYSTEM_TABLE *SystemTable,
+ IN EFI_DRIVER_BINDING_PROTOCOL *DriverBinding,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN CONST EFI_COMPONENT_NAME_PROTOCOL *ComponentName, OPTIONAL
+ IN CONST EFI_DRIVER_CONFIGURATION_PROTOCOL *DriverConfiguration, OPTIONAL
+ IN CONST EFI_DRIVER_DIAGNOSTICS_PROTOCOL *DriverDiagnostics OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (DriverBinding != NULL);
+
+ //
+ // Update the ImageHandle and DriverBindingHandle fields of the Driver Binding Protocol
+ //
+ DriverBinding->ImageHandle = ImageHandle;
+ DriverBinding->DriverBindingHandle = DriverBindingHandle;
+
+ if (DriverDiagnostics == NULL || FeaturePcdGet(PcdDriverDiagnosticsDisable)) {
+ if (DriverConfiguration == NULL) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (DriverConfiguration == NULL) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ }
+ }
+
+ //
+ // ASSERT if the call to InstallMultipleProtocolInterfaces() failed
+ //
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+
+/**
+ Installs Driver Binding Protocol with optional Component Name and Component Name 2 Protocols.
+
+ Initializes a driver by installing the Driver Binding Protocol together with the
+ optional Component Name and optional Component Name 2 protocols onto the driver's
+ DriverBindingHandle. If DriverBindingHandle is NULL, then the protocols are installed
+ onto a newly created handle. DriverBindingHandle is typically the same as the driver's
+ ImageHandle, but it can be different if the driver produces multiple Driver Binding Protocols.
+ If DriverBinding is NULL, then ASSERT().
+ If the installation fails, then ASSERT().
+
+ @param ImageHandle The image handle of the driver.
+ @param SystemTable The EFI System Table that was passed to the driver's entry point.
+ @param DriverBinding A Driver Binding Protocol instance that this driver is producing.
+ @param DriverBindingHandle The handle that DriverBinding is to be installed onto. If this
+ parameter is NULL, then a new handle is created.
+ @param ComponentName A Component Name Protocol instance that this driver is producing.
+ @param ComponentName2 A Component Name 2 Protocol instance that this driver is producing.
+
+ @retval EFI_SUCCESS The protocol installation is completed successfully.
+ @retval EFI_OUT_OF_RESOURCES There was not enough memory in pool to install all the protocols.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiLibInstallDriverBindingComponentName2 (
+ IN CONST EFI_HANDLE ImageHandle,
+ IN CONST EFI_SYSTEM_TABLE *SystemTable,
+ IN EFI_DRIVER_BINDING_PROTOCOL *DriverBinding,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN CONST EFI_COMPONENT_NAME_PROTOCOL *ComponentName, OPTIONAL
+ IN CONST EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2 OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (DriverBinding != NULL);
+
+ //
+ // Update the ImageHandle and DriverBindingHandle fields of the Driver Binding Protocol
+ //
+ DriverBinding->ImageHandle = ImageHandle;
+ DriverBinding->DriverBindingHandle = DriverBindingHandle;
+
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ NULL
+ );
+ }
+ }
+
+ //
+ // ASSERT if the call to InstallMultipleProtocolInterfaces() failed
+ //
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+
+/**
+ Installs Driver Binding Protocol with optional Component Name, Component Name 2, Driver
+ Configuration, Driver Configuration 2, Driver Diagnostics, and Driver Diagnostics 2 Protocols.
+
+ Initializes a driver by installing the Driver Binding Protocol together with the optional
+ Component Name, optional Component Name 2, optional Driver Configuration, optional Driver Configuration 2,
+ optional Driver Diagnostic, and optional Driver Diagnostic 2 Protocols onto the driver's DriverBindingHandle.
+ DriverBindingHandle is typically the same as the driver's ImageHandle, but it can be different if the driver
+ produces multiple Driver Binding Protocols.
+ If DriverBinding is NULL, then ASSERT().
+ If the installation fails, then ASSERT().
+
+
+ @param ImageHandle The image handle of the driver.
+ @param SystemTable The EFI System Table that was passed to the driver's entry point.
+ @param DriverBinding A Driver Binding Protocol instance that this driver is producing.
+ @param DriverBindingHandle The handle that DriverBinding is to be installed onto. If this
+ parameter is NULL, then a new handle is created.
+ @param ComponentName A Component Name Protocol instance that this driver is producing.
+ @param ComponentName2 A Component Name 2 Protocol instance that this driver is producing.
+ @param DriverConfiguration A Driver Configuration Protocol instance that this driver is producing.
+ @param DriverConfiguration2 A Driver Configuration Protocol 2 instance that this driver is producing.
+ @param DriverDiagnostics A Driver Diagnostics Protocol instance that this driver is producing.
+ @param DriverDiagnostics2 A Driver Diagnostics Protocol 2 instance that this driver is producing.
+
+ @retval EFI_SUCCESS The protocol installation is completed successfully.
+ @retval EFI_OUT_OF_RESOURCES There was not enough memory in pool to install all the protocols.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiLibInstallAllDriverProtocols2 (
+ IN CONST EFI_HANDLE ImageHandle,
+ IN CONST EFI_SYSTEM_TABLE *SystemTable,
+ IN EFI_DRIVER_BINDING_PROTOCOL *DriverBinding,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN CONST EFI_COMPONENT_NAME_PROTOCOL *ComponentName, OPTIONAL
+ IN CONST EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2, OPTIONAL
+ IN CONST EFI_DRIVER_CONFIGURATION_PROTOCOL *DriverConfiguration, OPTIONAL
+ IN CONST EFI_DRIVER_CONFIGURATION2_PROTOCOL *DriverConfiguration2, OPTIONAL
+ IN CONST EFI_DRIVER_DIAGNOSTICS_PROTOCOL *DriverDiagnostics, OPTIONAL
+ IN CONST EFI_DRIVER_DIAGNOSTICS2_PROTOCOL *DriverDiagnostics2 OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (DriverBinding != NULL);
+
+ //
+ // Update the ImageHandle and DriverBindingHandle fields of the Driver Binding Protocol
+ //
+ DriverBinding->ImageHandle = ImageHandle;
+ DriverBinding->DriverBindingHandle = DriverBindingHandle;
+
+ if (DriverConfiguration2 == NULL) {
+ if (DriverConfiguration == NULL) {
+ if (DriverDiagnostics == NULL || FeaturePcdGet(PcdDriverDiagnosticsDisable)) {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ } else {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ }
+ } else {
+ if (DriverDiagnostics == NULL || FeaturePcdGet(PcdDriverDiagnosticsDisable)) {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ } else {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ }
+ }
+ } else {
+ if (DriverConfiguration == NULL) {
+ if (DriverDiagnostics == NULL || FeaturePcdGet(PcdDriverDiagnosticsDisable)) {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ } else {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ }
+ } else {
+ if (DriverDiagnostics == NULL || FeaturePcdGet(PcdDriverDiagnosticsDisable)) {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ } else {
+ if (DriverDiagnostics2 == NULL || FeaturePcdGet(PcdDriverDiagnostics2Disable)) {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (ComponentName == NULL || FeaturePcdGet(PcdComponentNameDisable)) {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ } else {
+ if (ComponentName2 == NULL || FeaturePcdGet(PcdComponentName2Disable)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBinding->DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, DriverBinding,
+ &gEfiComponentNameProtocolGuid, ComponentName,
+ &gEfiComponentName2ProtocolGuid, ComponentName2,
+ &gEfiDriverConfigurationProtocolGuid, DriverConfiguration,
+ &gEfiDriverConfiguration2ProtocolGuid, DriverConfiguration2,
+ &gEfiDriverDiagnosticsProtocolGuid, DriverDiagnostics,
+ &gEfiDriverDiagnostics2ProtocolGuid, DriverDiagnostics2,
+ NULL
+ );
+ }
+ }
+ }
+ }
+ }
+ }
+
+ //
+ // ASSERT if the call to InstallMultipleProtocolInterfaces() failed
+ //
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLib.c b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLib.c new file mode 100644 index 0000000000..554af2281e --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLib.c @@ -0,0 +1,1417 @@ +/** @file
+ The UEFI Library provides functions and macros that simplify the development of
+ UEFI Drivers and UEFI Applications. These functions and macros help manage EFI
+ events, build simple locks utilizing EFI Task Priority Levels (TPLs), install
+ EFI Driver Model related protocols, manage Unicode string tables for UEFI Drivers,
+ and print messages on the console output and standard error devices.
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include "UefiLibInternal.h"
+
+/**
+ Compare whether two names of languages are identical.
+
+ @param Language1 Name of language 1.
+ @param Language2 Name of language 2.
+
+ @retval TRUE Language 1 and language 2 are the same.
+ @retval FALSE Language 1 and language 2 are not the same.
+
+**/
+BOOLEAN
+CompareIso639LanguageCode (
+ IN CONST CHAR8 *Language1,
+ IN CONST CHAR8 *Language2
+ )
+{
+ UINT32 Name1;
+ UINT32 Name2;
+
+ Name1 = ReadUnaligned24 ((CONST UINT32 *) Language1);
+ Name2 = ReadUnaligned24 ((CONST UINT32 *) Language2);
+
+ return (BOOLEAN) (Name1 == Name2);
+}
+
+/**
+ Retrieves a pointer to the system configuration table from the EFI System Table
+ based on a specified GUID.
+
+ This function searches the list of configuration tables stored in the EFI System Table
+ for a table with a GUID that matches TableGuid. If a match is found, then a pointer to
+ the configuration table is returned in Table., and EFI_SUCCESS is returned. If a matching GUID
+ is not found, then EFI_NOT_FOUND is returned.
+ If TableGuid is NULL, then ASSERT().
+ If Table is NULL, then ASSERT().
+
+ @param TableGuid Pointer to table's GUID type..
+ @param Table Pointer to the table associated with TableGuid in the EFI System Table.
+
+ @retval EFI_SUCCESS A configuration table matching TableGuid was found.
+ @retval EFI_NOT_FOUND A configuration table matching TableGuid could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetSystemConfigurationTable (
+ IN EFI_GUID *TableGuid,
+ OUT VOID **Table
+ )
+{
+ EFI_SYSTEM_TABLE *SystemTable;
+ UINTN Index;
+
+ ASSERT (TableGuid != NULL);
+ ASSERT (Table != NULL);
+
+ SystemTable = gST;
+ *Table = NULL;
+ for (Index = 0; Index < SystemTable->NumberOfTableEntries; Index++) {
+ if (CompareGuid (TableGuid, &(SystemTable->ConfigurationTable[Index].VendorGuid))) {
+ *Table = SystemTable->ConfigurationTable[Index].VendorTable;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ Creates and returns a notification event and registers that event with all the protocol
+ instances specified by ProtocolGuid.
+
+ This function causes the notification function to be executed for every protocol of type
+ ProtocolGuid instance that exists in the system when this function is invoked. If there are
+ no instances of ProtocolGuid in the handle database at the time this function is invoked,
+ then the notification function is still executed one time. In addition, every time a protocol
+ of type ProtocolGuid instance is installed or reinstalled, the notification function is also
+ executed. This function returns the notification event that was created.
+ If ProtocolGuid is NULL, then ASSERT().
+ If NotifyTpl is not a legal TPL value, then ASSERT().
+ If NotifyFunction is NULL, then ASSERT().
+ If Registration is NULL, then ASSERT().
+
+
+ @param ProtocolGuid Supplies GUID of the protocol upon whose installation the event is fired.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+ This value is passed to LocateHandle() to obtain new handles that
+ have been added that support the ProtocolGuid-specified protocol.
+
+ @return The notification event that was created.
+
+**/
+EFI_EVENT
+EFIAPI
+EfiCreateProtocolNotifyEvent(
+ IN EFI_GUID *ProtocolGuid,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN VOID *NotifyContext, OPTIONAL
+ OUT VOID **Registration
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+
+ ASSERT (ProtocolGuid != NULL);
+ ASSERT (NotifyFunction != NULL);
+ ASSERT (Registration != NULL);
+
+ //
+ // Create the event
+ //
+
+ Status = gBS->CreateEvent (
+ EVT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ &Event
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Register for protocol notifications on this event
+ //
+
+ Status = gBS->RegisterProtocolNotify (
+ ProtocolGuid,
+ Event,
+ Registration
+ );
+
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Kick the event so we will perform an initial pass of
+ // current installed drivers
+ //
+
+ gBS->SignalEvent (Event);
+ return Event;
+}
+
+/**
+ Creates a named event that can be signaled with EfiNamedEventSignal().
+
+ This function creates an event using NotifyTpl, NoifyFunction, and NotifyContext.
+ This event is signaled with EfiNamedEventSignal(). This provides the ability for one or more
+ listeners on the same event named by the GUID specified by Name.
+ If Name is NULL, then ASSERT().
+ If NotifyTpl is not a legal TPL value, then ASSERT().
+ If NotifyFunction is NULL, then ASSERT().
+
+ @param Name Supplies GUID name of the event.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @retval EFI_SUCCESS A named event was created.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to create the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventListen (
+ IN CONST EFI_GUID *Name,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN CONST VOID *NotifyContext, OPTIONAL
+ OUT VOID *Registration OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+ VOID *RegistrationLocal;
+
+ ASSERT (Name != NULL);
+ ASSERT (NotifyFunction != NULL);
+ ASSERT (NotifyTpl <= TPL_HIGH_LEVEL);
+
+ //
+ // Create event
+ //
+ Status = gBS->CreateEvent (
+ EVT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ (VOID *) NotifyContext,
+ &Event
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // The Registration is not optional to RegisterProtocolNotify().
+ // To make it optional to EfiNamedEventListen(), may need to substitute with a local.
+ //
+ if (Registration != NULL) {
+ RegistrationLocal = Registration;
+ } else {
+ RegistrationLocal = &RegistrationLocal;
+ }
+
+ //
+ // Register for an installation of protocol interface
+ //
+
+ Status = gBS->RegisterProtocolNotify (
+ (EFI_GUID *) Name,
+ Event,
+ RegistrationLocal
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+/**
+ Signals a named event created with EfiNamedEventListen().
+
+ This function signals the named event specified by Name. The named event must have been
+ created with EfiNamedEventListen().
+ If Name is NULL, then ASSERT().
+
+ @param Name Supplies GUID name of the event.
+
+ @retval EFI_SUCCESS A named event was signaled.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to signal the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventSignal (
+ IN CONST EFI_GUID *Name
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+
+ ASSERT(Name != NULL);
+
+ Handle = NULL;
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ (EFI_GUID *) Name,
+ EFI_NATIVE_INTERFACE,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->UninstallProtocolInterface (
+ Handle,
+ (EFI_GUID *) Name,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+/**
+ Returns the current TPL.
+
+ This function returns the current TPL. There is no EFI service to directly
+ retrieve the current TPL. Instead, the RaiseTPL() function is used to raise
+ the TPL to TPL_HIGH_LEVEL. This will return the current TPL. The TPL level
+ can then immediately be restored back to the current TPL level with a call
+ to RestoreTPL().
+
+ @return The current TPL.
+
+**/
+EFI_TPL
+EFIAPI
+EfiGetCurrentTpl (
+ VOID
+ )
+{
+ EFI_TPL Tpl;
+
+ Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ gBS->RestoreTPL (Tpl);
+
+ return Tpl;
+}
+
+
+/**
+ Initializes a basic mutual exclusion lock.
+
+ This function initializes a basic mutual exclusion lock to the released state
+ and returns the lock. Each lock provides mutual exclusion access at its task
+ priority level. Since there is no preemption or multiprocessor support in EFI,
+ acquiring the lock only consists of raising to the locks TPL.
+ If Lock is NULL, then ASSERT().
+ If Priority is not a valid TPL value, then ASSERT().
+
+ @param Lock A pointer to the lock data structure to initialize.
+ @param Priority EFI TPL associated with the lock.
+
+ @return The lock.
+
+**/
+EFI_LOCK *
+EFIAPI
+EfiInitializeLock (
+ IN OUT EFI_LOCK *Lock,
+ IN EFI_TPL Priority
+ )
+{
+ ASSERT (Lock != NULL);
+ ASSERT (Priority <= TPL_HIGH_LEVEL);
+
+ Lock->Tpl = Priority;
+ Lock->OwnerTpl = TPL_APPLICATION;
+ Lock->Lock = EfiLockReleased ;
+ return Lock;
+}
+
+/**
+ Acquires ownership of a lock.
+
+ This function raises the system's current task priority level to the task
+ priority level of the mutual exclusion lock. Then, it places the lock in the
+ acquired state.
+ If Lock is NULL, then ASSERT().
+ If Lock is not initialized, then ASSERT().
+ If Lock is already in the acquired state, then ASSERT().
+
+ @param Lock A pointer to the lock to acquire.
+
+**/
+VOID
+EFIAPI
+EfiAcquireLock (
+ IN EFI_LOCK *Lock
+ )
+{
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock == EfiLockReleased);
+
+ Lock->OwnerTpl = gBS->RaiseTPL (Lock->Tpl);
+ Lock->Lock = EfiLockAcquired;
+}
+
+/**
+ Acquires ownership of a lock.
+
+ This function raises the system's current task priority level to the task priority
+ level of the mutual exclusion lock. Then, it attempts to place the lock in the acquired state.
+ If the lock is already in the acquired state, then EFI_ACCESS_DENIED is returned.
+ Otherwise, EFI_SUCCESS is returned.
+ If Lock is NULL, then ASSERT().
+ If Lock is not initialized, then ASSERT().
+
+ @param Lock A pointer to the lock to acquire.
+
+ @retval EFI_SUCCESS The lock was acquired.
+ @retval EFI_ACCESS_DENIED The lock could not be acquired because it is already owned.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiAcquireLockOrFail (
+ IN EFI_LOCK *Lock
+ )
+{
+
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock != EfiLockUninitialized);
+
+ if (Lock->Lock == EfiLockAcquired) {
+ //
+ // Lock is already owned, so bail out
+ //
+ return EFI_ACCESS_DENIED;
+ }
+
+ Lock->OwnerTpl = gBS->RaiseTPL (Lock->Tpl);
+
+ Lock->Lock = EfiLockAcquired;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Releases ownership of a lock.
+
+ This function transitions a mutual exclusion lock from the acquired state to
+ the released state, and restores the system's task priority level to its
+ previous level.
+ If Lock is NULL, then ASSERT().
+ If Lock is not initialized, then ASSERT().
+ If Lock is already in the released state, then ASSERT().
+
+ @param Lock A pointer to the lock to release.
+
+**/
+VOID
+EFIAPI
+EfiReleaseLock (
+ IN EFI_LOCK *Lock
+ )
+{
+ EFI_TPL Tpl;
+
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock == EfiLockAcquired);
+
+ Tpl = Lock->OwnerTpl;
+
+ Lock->Lock = EfiLockReleased;
+
+ gBS->RestoreTPL (Tpl);
+}
+
+/**
+ Tests whether a controller handle is being managed by a specific driver.
+
+ This function tests whether the driver specified by DriverBindingHandle is
+ currently managing the controller specified by ControllerHandle. This test
+ is performed by evaluating if the the protocol specified by ProtocolGuid is
+ present on ControllerHandle and is was opened by DriverBindingHandle with an
+ attribute of EFI_OPEN_PROTOCOL_BY_DRIVER.
+ If ProtocolGuid is NULL, then ASSERT().
+
+ @param ControllerHandle A handle for a controller to test.
+ @param DriverBindingHandle Specifies the driver binding handle for the
+ driver.
+ @param ProtocolGuid Specifies the protocol that the driver specified
+ by DriverBindingHandle opens in its Start()
+ function.
+
+ @retval EFI_SUCCESS ControllerHandle is managed by the driver
+ specified by DriverBindingHandle.
+ @retval EFI_UNSUPPORTED ControllerHandle is not managed by the driver
+ specified by DriverBindingHandle.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiTestManagedDevice (
+ IN CONST EFI_HANDLE ControllerHandle,
+ IN CONST EFI_HANDLE DriverBindingHandle,
+ IN CONST EFI_GUID *ProtocolGuid
+ )
+{
+ EFI_STATUS Status;
+ VOID *ManagedInterface;
+
+ ASSERT (ProtocolGuid != NULL);
+
+ Status = gBS->OpenProtocol (
+ ControllerHandle,
+ (EFI_GUID *) ProtocolGuid,
+ &ManagedInterface,
+ DriverBindingHandle,
+ ControllerHandle,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
+ if (!EFI_ERROR (Status)) {
+ gBS->CloseProtocol (
+ ControllerHandle,
+ (EFI_GUID *) ProtocolGuid,
+ DriverBindingHandle,
+ ControllerHandle
+ );
+ return EFI_UNSUPPORTED;
+ }
+
+ if (Status != EFI_ALREADY_STARTED) {
+ return EFI_UNSUPPORTED;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Tests whether a child handle is a child device of the controller.
+
+ This function tests whether ChildHandle is one of the children of
+ ControllerHandle. This test is performed by checking to see if the protocol
+ specified by ProtocolGuid is present on ControllerHandle and opened by
+ ChildHandle with an attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.
+ If ProtocolGuid is NULL, then ASSERT().
+
+ @param ControllerHandle A handle for a (parent) controller to test.
+ @param ChildHandle A child handle to test.
+ @param ProtocolGuid Supplies the protocol that the child controller
+ opens on its parent controller.
+
+ @retval EFI_SUCCESS ChildHandle is a child of the ControllerHandle.
+ @retval EFI_UNSUPPORTED ChildHandle is not a child of the
+ ControllerHandle.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiTestChildHandle (
+ IN CONST EFI_HANDLE ControllerHandle,
+ IN CONST EFI_HANDLE ChildHandle,
+ IN CONST EFI_GUID *ProtocolGuid
+ )
+{
+ EFI_STATUS Status;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
+ UINTN EntryCount;
+ UINTN Index;
+
+ ASSERT (ProtocolGuid != NULL);
+
+ //
+ // Retrieve the list of agents that are consuming the specific protocol
+ // on ControllerHandle.
+ //
+ Status = gBS->OpenProtocolInformation (
+ ControllerHandle,
+ (EFI_GUID *) ProtocolGuid,
+ &OpenInfoBuffer,
+ &EntryCount
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Inspect if ChildHandle is one of the agents.
+ //
+ Status = EFI_UNSUPPORTED;
+ for (Index = 0; Index < EntryCount; Index++) {
+ if ((OpenInfoBuffer[Index].ControllerHandle == ChildHandle) &&
+ (OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {
+ Status = EFI_SUCCESS;
+ break;
+ }
+ }
+
+ FreePool (OpenInfoBuffer);
+ return Status;
+}
+
+/**
+ This function looks up a Unicode string in UnicodeStringTable.
+
+ If Language is a member of SupportedLanguages and a Unicode string is found in
+ UnicodeStringTable that matches the language code specified by Language, then it
+ is returned in UnicodeString.
+
+ @param Language A pointer to the ISO 639-2 language code for the
+ Unicode string to look up and return.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports. Language
+ must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string from UnicodeStringTable
+ that matches the language specified by Language.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found
+ in the table of Unicode strings UnicodeStringTable,
+ and it was returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_UNSUPPORTED UnicodeStringTable is NULL.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+ @retval EFI_UNSUPPORTED The language specified by Language is not
+ supported by UnicodeStringTable.
+
+**/
+EFI_STATUS
+EFIAPI
+LookupUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN CONST EFI_UNICODE_STRING_TABLE *UnicodeStringTable,
+ OUT CHAR16 **UnicodeString
+ )
+{
+ //
+ // Make sure the parameters are valid
+ //
+ if (Language == NULL || UnicodeString == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, or the Unicode String Table is empty, then the
+ // Unicode String specified by Language is not supported by this Unicode String Table
+ //
+ if (SupportedLanguages == NULL || UnicodeStringTable == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Make sure Language is in the set of Supported Languages
+ //
+ while (*SupportedLanguages != 0) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+
+ //
+ // Search the Unicode String Table for the matching Language specifier
+ //
+ while (UnicodeStringTable->Language != NULL) {
+ if (CompareIso639LanguageCode (Language, UnicodeStringTable->Language)) {
+
+ //
+ // A matching string was found, so return it
+ //
+ *UnicodeString = UnicodeStringTable->UnicodeString;
+ return EFI_SUCCESS;
+ }
+
+ UnicodeStringTable++;
+ }
+
+ return EFI_UNSUPPORTED;
+ }
+
+ SupportedLanguages += 3;
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+
+
+/**
+ This function looks up a Unicode string in UnicodeStringTable.
+
+ If Language is a member of SupportedLanguages and a Unicode string is found in
+ UnicodeStringTable that matches the language code specified by Language, then
+ it is returned in UnicodeString.
+
+ @param Language A pointer to an ASCII string containing the ISO 639-2 or the
+ RFC 4646 language code for the Unicode string to look up and
+ return. If Iso639Language is TRUE, then this ASCII string is
+ not assumed to be Null-terminated, and only the first three
+ characters are used. If Iso639Language is FALSE, then this ASCII
+ string must be Null-terminated.
+ @param SupportedLanguages A pointer to a Null-terminated ASCII string that contains a
+ set of ISO 639-2 or RFC 4646 language codes that the Unicode
+ string table supports. Language must be a member of this set.
+ If Iso639Language is TRUE, then this string contains one or more
+ ISO 639-2 language codes with no separator characters. If Iso639Language
+ is FALSE, then is string contains one or more RFC 4646 language
+ codes separated by ';'.
+ @param UnicodeStringTable A pointer to the table of Unicode strings. Type EFI_UNICODE_STRING_TABLE
+ is defined in "Related Definitions".
+ @param UnicodeString A pointer to the Null-terminated Unicode string from UnicodeStringTable
+ that matches the language specified by Language.
+ @param Iso639Language Specifies the supported language code format. If it is TRUE, then
+ Language and SupportedLanguages follow ISO 639-2 language code format.
+ Otherwise, they follow RFC 4646 language code format.
+
+
+ @retval EFI_SUCCESS The Unicode string that matches the language specified by Language
+ was found in the table of Unicode strings UnicodeStringTable, and
+ it was returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_UNSUPPORTED UnicodeStringTable is NULL.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a member of SupportedLanguages.
+ @retval EFI_UNSUPPORTED The language specified by Language is not supported by UnicodeStringTable.
+
+**/
+EFI_STATUS
+EFIAPI
+LookupUnicodeString2 (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN CONST EFI_UNICODE_STRING_TABLE *UnicodeStringTable,
+ OUT CHAR16 **UnicodeString,
+ IN BOOLEAN Iso639Language
+ )
+{
+ BOOLEAN Found;
+ UINTN Index;
+ CHAR8 *LanguageString;
+
+ //
+ // Make sure the parameters are valid
+ //
+ if (Language == NULL || UnicodeString == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, or the Unicode String Table is empty, then the
+ // Unicode String specified by Language is not supported by this Unicode String Table
+ //
+ if (SupportedLanguages == NULL || UnicodeStringTable == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Make sure Language is in the set of Supported Languages
+ //
+ Found = FALSE;
+ while (*SupportedLanguages != 0) {
+ if (Iso639Language) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+ Found = TRUE;
+ break;
+ }
+ SupportedLanguages += 3;
+ } else {
+ for (Index = 0; SupportedLanguages[Index] != 0 && SupportedLanguages[Index] != ';'; Index++);
+ if ((AsciiStrnCmp(SupportedLanguages, Language, Index) == 0) && (Language[Index] == 0)) {
+ Found = TRUE;
+ break;
+ }
+ SupportedLanguages += Index;
+ for (; *SupportedLanguages != 0 && *SupportedLanguages == ';'; SupportedLanguages++);
+ }
+ }
+
+ //
+ // If Language is not a member of SupportedLanguages, then return EFI_UNSUPPORTED
+ //
+ if (!Found) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Search the Unicode String Table for the matching Language specifier
+ //
+ while (UnicodeStringTable->Language != NULL) {
+ LanguageString = UnicodeStringTable->Language;
+ while (0 != *LanguageString) {
+ for (Index = 0 ;LanguageString[Index] != 0 && LanguageString[Index] != ';'; Index++);
+ if (AsciiStrnCmp(LanguageString, Language, Index) == 0) {
+ *UnicodeString = UnicodeStringTable->UnicodeString;
+ return EFI_SUCCESS;
+ }
+ LanguageString += Index;
+ for (Index = 0 ;LanguageString[Index] != 0 && LanguageString[Index] == ';'; Index++);
+ }
+ UnicodeStringTable++;
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+
+/**
+ This function adds a Unicode string to UnicodeStringTable.
+
+ If Language is a member of SupportedLanguages then UnicodeString is added to
+ UnicodeStringTable. New buffers are allocated for both Language and
+ UnicodeString. The contents of Language and UnicodeString are copied into
+ these new buffers. These buffers are automatically freed when
+ FreeUnicodeStringTable() is called.
+
+ @param Language A pointer to the ISO 639-2 language code for the Unicode
+ string to add.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports.
+ Language must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string to add.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found in the table of
+ Unicode strings UnicodeStringTable, and it was
+ returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is an empty string.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_ALREADY_STARTED A Unicode string with language Language is
+ already present in UnicodeStringTable.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory to add another
+ Unicode string to UnicodeStringTable.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+
+**/
+EFI_STATUS
+EFIAPI
+AddUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN EFI_UNICODE_STRING_TABLE **UnicodeStringTable,
+ IN CONST CHAR16 *UnicodeString
+ )
+{
+ UINTN NumberOfEntries;
+ EFI_UNICODE_STRING_TABLE *OldUnicodeStringTable;
+ EFI_UNICODE_STRING_TABLE *NewUnicodeStringTable;
+ UINTN UnicodeStringLength;
+
+ //
+ // Make sure the parameter are valid
+ //
+ if (Language == NULL || UnicodeString == NULL || UnicodeStringTable == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, then a Unicode String can not be added
+ //
+ if (SupportedLanguages == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // If the Unicode String is empty, then a Unicode String can not be added
+ //
+ if (UnicodeString[0] == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Make sure Language is a member of SupportedLanguages
+ //
+ while (*SupportedLanguages != 0) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+
+ //
+ // Determine the size of the Unicode String Table by looking for a NULL Language entry
+ //
+ NumberOfEntries = 0;
+ if (*UnicodeStringTable != NULL) {
+ OldUnicodeStringTable = *UnicodeStringTable;
+ while (OldUnicodeStringTable->Language != NULL) {
+ if (CompareIso639LanguageCode (Language, OldUnicodeStringTable->Language)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ OldUnicodeStringTable++;
+ NumberOfEntries++;
+ }
+ }
+
+ //
+ // Allocate space for a new Unicode String Table. It must hold the current number of
+ // entries, plus 1 entry for the new Unicode String, plus 1 entry for the end of table
+ // marker
+ //
+ NewUnicodeStringTable = AllocatePool ((NumberOfEntries + 2) * sizeof (EFI_UNICODE_STRING_TABLE));
+ if (NewUnicodeStringTable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // If the current Unicode String Table contains any entries, then copy them to the
+ // newly allocated Unicode String Table.
+ //
+ if (*UnicodeStringTable != NULL) {
+ CopyMem (
+ NewUnicodeStringTable,
+ *UnicodeStringTable,
+ NumberOfEntries * sizeof (EFI_UNICODE_STRING_TABLE)
+ );
+ }
+
+ //
+ // Allocate space for a copy of the Language specifier
+ //
+ NewUnicodeStringTable[NumberOfEntries].Language = AllocateCopyPool (3, Language);
+ if (NewUnicodeStringTable[NumberOfEntries].Language == NULL) {
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Compute the length of the Unicode String
+ //
+ for (UnicodeStringLength = 0; UnicodeString[UnicodeStringLength] != 0; UnicodeStringLength++)
+ ;
+
+ //
+ // Allocate space for a copy of the Unicode String
+ //
+ NewUnicodeStringTable[NumberOfEntries].UnicodeString = AllocateCopyPool (
+ (UnicodeStringLength + 1) * sizeof (CHAR16),
+ UnicodeString
+ );
+ if (NewUnicodeStringTable[NumberOfEntries].UnicodeString == NULL) {
+ gBS->FreePool (NewUnicodeStringTable[NumberOfEntries].Language);
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Mark the end of the Unicode String Table
+ //
+ NewUnicodeStringTable[NumberOfEntries + 1].Language = NULL;
+ NewUnicodeStringTable[NumberOfEntries + 1].UnicodeString = NULL;
+
+ //
+ // Free the old Unicode String Table
+ //
+ if (*UnicodeStringTable != NULL) {
+ gBS->FreePool (*UnicodeStringTable);
+ }
+
+ //
+ // Point UnicodeStringTable at the newly allocated Unicode String Table
+ //
+ *UnicodeStringTable = NewUnicodeStringTable;
+
+ return EFI_SUCCESS;
+ }
+
+ SupportedLanguages += 3;
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+
+/**
+ This function adds the Null-terminated Unicode string specified by UnicodeString
+ to UnicodeStringTable.
+
+ If Language is a member of SupportedLanguages then UnicodeString is added to
+ UnicodeStringTable. New buffers are allocated for both Language and UnicodeString.
+ The contents of Language and UnicodeString are copied into these new buffers.
+ These buffers are automatically freed when EfiLibFreeUnicodeStringTable() is called.
+
+ @param Language A pointer to an ASCII string containing the ISO 639-2 or
+ the RFC 4646 language code for the Unicode string to add.
+ If Iso639Language is TRUE, then this ASCII string is not
+ assumed to be Null-terminated, and only the first three
+ chacters are used. If Iso639Language is FALSE, then this
+ ASCII string must be Null-terminated.
+ @param SupportedLanguages A pointer to a Null-terminated ASCII string that contains
+ a set of ISO 639-2 or RFC 4646 language codes that the Unicode
+ string table supports. Language must be a member of this set.
+ If Iso639Language is TRUE, then this string contains one or more
+ ISO 639-2 language codes with no separator characters.
+ If Iso639Language is FALSE, then is string contains one or more
+ RFC 4646 language codes separated by ';'.
+ @param UnicodeStringTable A pointer to the table of Unicode strings. Type EFI_UNICODE_STRING_TABLE
+ is defined in "Related Definitions".
+ @param UnicodeString A pointer to the Unicode string to add.
+ @param Iso639Language Specifies the supported language code format. If it is TRUE,
+ then Language and SupportedLanguages follow ISO 639-2 language code format.
+ Otherwise, they follow RFC 4646 language code format.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language specified by
+ Language was found in the table of Unicode strings UnicodeStringTable,
+ and it was returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is an empty string.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_ALREADY_STARTED A Unicode string with language Language is already present in
+ UnicodeStringTable.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory to add another Unicode string UnicodeStringTable.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a member of SupportedLanguages.
+
+**/
+EFI_STATUS
+EFIAPI
+AddUnicodeString2 (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN EFI_UNICODE_STRING_TABLE **UnicodeStringTable,
+ IN CONST CHAR16 *UnicodeString,
+ IN BOOLEAN Iso639Language
+ )
+{
+ UINTN NumberOfEntries;
+ EFI_UNICODE_STRING_TABLE *OldUnicodeStringTable;
+ EFI_UNICODE_STRING_TABLE *NewUnicodeStringTable;
+ UINTN UnicodeStringLength;
+ BOOLEAN Found;
+ UINTN Index;
+ CHAR8 *LanguageString;
+
+ //
+ // Make sure the parameter are valid
+ //
+ if (Language == NULL || UnicodeString == NULL || UnicodeStringTable == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, then a Unicode String can not be added
+ //
+ if (SupportedLanguages == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // If the Unicode String is empty, then a Unicode String can not be added
+ //
+ if (UnicodeString[0] == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Make sure Language is a member of SupportedLanguages
+ //
+ Found = FALSE;
+ while (*SupportedLanguages != 0) {
+ if (Iso639Language) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+ Found = TRUE;
+ break;
+ }
+ SupportedLanguages += 3;
+ } else {
+ for (Index = 0; SupportedLanguages[Index] != 0 && SupportedLanguages[Index] != ';'; Index++);
+ if (AsciiStrnCmp(SupportedLanguages, Language, Index) == 0) {
+ Found = TRUE;
+ break;
+ }
+ SupportedLanguages += Index;
+ for (; *SupportedLanguages != 0 && *SupportedLanguages == ';'; SupportedLanguages++);
+ }
+ }
+
+ //
+ // If Language is not a member of SupportedLanguages, then return EFI_UNSUPPORTED
+ //
+ if (!Found) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Determine the size of the Unicode String Table by looking for a NULL Language entry
+ //
+ NumberOfEntries = 0;
+ if (*UnicodeStringTable != NULL) {
+ OldUnicodeStringTable = *UnicodeStringTable;
+ while (OldUnicodeStringTable->Language != NULL) {
+ LanguageString = OldUnicodeStringTable->Language;
+
+ while (*LanguageString != 0) {
+ for (Index = 0; LanguageString[Index] != 0 && LanguageString[Index] != ';'; Index++);
+
+ if (AsciiStrnCmp (Language, LanguageString, Index) == 0) {
+ return EFI_ALREADY_STARTED;
+ }
+ LanguageString += Index;
+ for (; *LanguageString != 0 && *LanguageString == ';'; LanguageString++);
+ }
+ OldUnicodeStringTable++;
+ NumberOfEntries++;
+ }
+ }
+
+ //
+ // Allocate space for a new Unicode String Table. It must hold the current number of
+ // entries, plus 1 entry for the new Unicode String, plus 1 entry for the end of table
+ // marker
+ //
+ NewUnicodeStringTable = AllocatePool ((NumberOfEntries + 2) * sizeof (EFI_UNICODE_STRING_TABLE));
+ if (NewUnicodeStringTable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // If the current Unicode String Table contains any entries, then copy them to the
+ // newly allocated Unicode String Table.
+ //
+ if (*UnicodeStringTable != NULL) {
+ CopyMem (
+ NewUnicodeStringTable,
+ *UnicodeStringTable,
+ NumberOfEntries * sizeof (EFI_UNICODE_STRING_TABLE)
+ );
+ }
+
+ //
+ // Allocate space for a copy of the Language specifier
+ //
+ NewUnicodeStringTable[NumberOfEntries].Language = AllocateCopyPool (AsciiStrSize(Language), Language);
+ if (NewUnicodeStringTable[NumberOfEntries].Language == NULL) {
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Compute the length of the Unicode String
+ //
+ for (UnicodeStringLength = 0; UnicodeString[UnicodeStringLength] != 0; UnicodeStringLength++);
+
+ //
+ // Allocate space for a copy of the Unicode String
+ //
+ NewUnicodeStringTable[NumberOfEntries].UnicodeString = AllocateCopyPool (StrSize (UnicodeString), UnicodeString);
+ if (NewUnicodeStringTable[NumberOfEntries].UnicodeString == NULL) {
+ gBS->FreePool (NewUnicodeStringTable[NumberOfEntries].Language);
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Mark the end of the Unicode String Table
+ //
+ NewUnicodeStringTable[NumberOfEntries + 1].Language = NULL;
+ NewUnicodeStringTable[NumberOfEntries + 1].UnicodeString = NULL;
+
+ //
+ // Free the old Unicode String Table
+ //
+ if (*UnicodeStringTable != NULL) {
+ gBS->FreePool (*UnicodeStringTable);
+ }
+
+ //
+ // Point UnicodeStringTable at the newly allocated Unicode String Table
+ //
+ *UnicodeStringTable = NewUnicodeStringTable;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function frees the table of Unicode strings in UnicodeStringTable.
+
+ If UnicodeStringTable is NULL, then EFI_SUCCESS is returned.
+ Otherwise, each language code, and each Unicode string in the Unicode string
+ table are freed, and EFI_SUCCESS is returned.
+
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+
+ @retval EFI_SUCCESS The Unicode string table was freed.
+
+**/
+EFI_STATUS
+EFIAPI
+FreeUnicodeStringTable (
+ IN EFI_UNICODE_STRING_TABLE *UnicodeStringTable
+ )
+{
+ UINTN Index;
+
+ //
+ // If the Unicode String Table is NULL, then it is already freed
+ //
+ if (UnicodeStringTable == NULL) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Loop through the Unicode String Table until we reach the end of table marker
+ //
+ for (Index = 0; UnicodeStringTable[Index].Language != NULL; Index++) {
+
+ //
+ // Free the Language string from the Unicode String Table
+ //
+ gBS->FreePool (UnicodeStringTable[Index].Language);
+
+ //
+ // Free the Unicode String from the Unicode String Table
+ //
+ if (UnicodeStringTable[Index].UnicodeString != NULL) {
+ gBS->FreePool (UnicodeStringTable[Index].UnicodeString);
+ }
+ }
+
+ //
+ // Free the Unicode String Table itself
+ //
+ gBS->FreePool (UnicodeStringTable);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Returns a pointer to an allocated buffer that contains the contents of a
+ variable retrieved through the UEFI Runtime Service GetVariable(). The
+ returned buffer is allocated using AllocatePool(). The caller is responsible
+ for freeing this buffer with FreePool().
+
+ If Name is NULL, then ASSERT().
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Name Pointer to a Null-terminated Unicode string.
+ @param[in] Guid Pointer to an EFI_GUID structure
+
+ @retval NULL The variable could not be retrieved.
+ @retval NULL There are not enough resources available for the variable contents.
+ @retval Other A pointer to allocated buffer containing the variable contents.
+
+**/
+VOID *
+EFIAPI
+GetVariable (
+ IN CONST CHAR16 *Name,
+ IN CONST EFI_GUID *Guid
+ )
+{
+ EFI_STATUS Status;
+ UINTN Size;
+ VOID *Value;
+
+ ASSERT (Name != NULL);
+ ASSERT (Guid != NULL);
+
+ //
+ // Try to get the variable size.
+ //
+ Value = NULL;
+ Size = 0;
+ Status = gRT->GetVariable ((CHAR16 *) Name, (EFI_GUID *) Guid, NULL, &Size, Value);
+ if (Status != EFI_BUFFER_TOO_SMALL) {
+ return NULL;
+ }
+
+ //
+ // Allocate buffer to get the variable.
+ //
+ Value = AllocatePool (Size);
+ if (Value == NULL) {
+ return NULL;
+ }
+
+ //
+ // Get the variable data.
+ //
+ Status = gRT->GetVariable ((CHAR16 *) Name, (EFI_GUID *) Guid, NULL, &Size, Value);
+ if (EFI_ERROR (Status)) {
+ FreePool(Value);
+ return NULL;
+ }
+
+ return Value;
+}
+
+
+/**
+ Returns a pointer to an allocated buffer that contains the contents of a
+ variable retrieved through the UEFI Runtime Service GetVariable(). This
+ function always uses the EFI_GLOBAL_VARIABLE GUID to retrieve variables.
+ The returned buffer is allocated using AllocatePool(). The caller is
+ responsible for freeing this buffer with FreePool().
+
+ If Name is NULL, then ASSERT().
+
+ @param[in] Name Pointer to a Null-terminated Unicode string.
+
+ @retval NULL The variable could not be retrieved.
+ @retval NULL There are not enough resources available for the variable contents.
+ @retval Other A pointer to allocated buffer containing the variable contents.
+
+**/
+VOID *
+EFIAPI
+GetEfiGlobalVariable (
+ IN CONST CHAR16 *Name
+ )
+{
+ return GetVariable (Name, &gEfiGlobalVariableGuid);
+}
+
+
+/**
+ Returns a pointer to an allocated buffer that contains the best matching language
+ from a set of supported languages.
+
+ This function supports both ISO 639-2 and RFC 4646 language codes, but language
+ code types may not be mixed in a single call to this function. The language
+ code returned is allocated using AllocatePool(). The caller is responsible for
+ freeing the allocated buffer using FreePool(). This function supports a variable
+ argument list that allows the caller to pass in a prioritized list of language
+ codes to test against all the language codes in SupportedLanguages.
+
+ If SupportedLanguages is NULL, then ASSERT().
+
+ @param[in] SupportedLanguages A pointer to a Null-terminated ASCII string that
+ contains a set of language codes in the format
+ specified by Iso639Language.
+ @param[in] Iso639Language If TRUE, then all language codes are assumed to be
+ in ISO 639-2 format. If FALSE, then all language
+ codes are assumed to be in RFC 4646 language format
+ @param[in] ... A variable argument list that contains pointers to
+ Null-terminated ASCII strings that contain one or more
+ language codes in the format specified by Iso639Language.
+ The first language code from each of these language
+ code lists is used to determine if it is an exact or
+ close match to any of the language codes in
+ SupportedLanguages. Close matches only apply to RFC 4646
+ language codes, and the matching algorithm from RFC 4647
+ is used to determine if a close match is present. If
+ an exact or close match is found, then the matching
+ language code from SupportedLanguages is returned. If
+ no matches are found, then the next variable argument
+ parameter is evaluated. The variable argument list
+ is terminated by a NULL.
+
+ @retval NULL The best matching language could not be found in SupportedLanguages.
+ @retval NULL There are not enough resources available to return the best matching
+ language.
+ @retval Other A pointer to a Null-terminated ASCII string that is the best matching
+ language in SupportedLanguages.
+
+**/
+CHAR8 *
+EFIAPI
+GetBestLanguage (
+ IN CONST CHAR8 *SupportedLanguages,
+ IN BOOLEAN Iso639Language,
+ ...
+ )
+{
+ VA_LIST Args;
+ CHAR8 *Language;
+ UINTN CompareLength;
+ UINTN LanguageLength;
+ CONST CHAR8 *Supported;
+ CHAR8 *BestLanguage;
+
+ ASSERT (SupportedLanguages != NULL);
+
+ VA_START (Args, Iso639Language);
+ while ((Language = VA_ARG (Args, CHAR8 *)) != NULL) {
+ //
+ // Default to ISO 639-2 mode
+ //
+ CompareLength = 3;
+ LanguageLength = MIN (3, AsciiStrLen (Language));
+
+ //
+ // If in RFC 4646 mode, then determine the length of the first RFC 4646 language code in Language
+ //
+ if (!Iso639Language) {
+ for (LanguageLength = 0; Language[LanguageLength] != 0 && Language[LanguageLength] != ';'; LanguageLength++);
+ }
+
+ //
+ // Trim back the length of Language used until it is empty
+ //
+ while (LanguageLength > 0) {
+ //
+ // Loop through all language codes in SupportedLanguages
+ //
+ for (Supported = SupportedLanguages; *Supported != '\0'; Supported += CompareLength) {
+ //
+ // In RFC 4646 mode, then Loop through all language codes in SupportedLanguages
+ //
+ if (!Iso639Language) {
+ //
+ // Skip ';' characters in Supported
+ //
+ for (; *Supported != '\0' && *Supported == ';'; Supported++);
+ //
+ // Determine the length of the next language code in Supported
+ //
+ for (CompareLength = 0; Supported[CompareLength] != 0 && Supported[CompareLength] != ';'; CompareLength++);
+ //
+ // If Language is longer than the Supported, then skip to the next language
+ //
+ if (LanguageLength > CompareLength) {
+ continue;
+ }
+ }
+ //
+ // See if the first LanguageLength characters in Supported match Language
+ //
+ if (AsciiStrnCmp (Supported, Language, LanguageLength) == 0) {
+ VA_END (Args);
+ //
+ // Allocate, copy, and return the best matching language code from SupportedLanguages
+ //
+ BestLanguage = AllocateZeroPool (CompareLength + 1);
+ if (BestLanguage == NULL) {
+ return NULL;
+ }
+ return CopyMem (BestLanguage, Supported, CompareLength);
+ }
+ }
+
+ if (Iso639Language) {
+ //
+ // If ISO 639 mode, then each language can only be tested once
+ //
+ LanguageLength = 0;
+ } else {
+ //
+ // If RFC 4646 mode, then trim Language from the right to the next '-' character
+ //
+ for (LanguageLength--; LanguageLength > 0 && Language[LanguageLength] != '-'; LanguageLength--);
+ }
+ }
+ }
+ VA_END (Args);
+
+ //
+ // No matches were found
+ //
+ return NULL;
+}
+
diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLibInternal.h b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLibInternal.h new file mode 100644 index 0000000000..e4bc433be4 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLibInternal.h @@ -0,0 +1,44 @@ +/** @file
+ Internal include file for UefiLib.
+
+ Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __UEFI_LIB_INTERNAL_H_
+#define __UEFI_LIB_INTERNAL_H_
+
+
+#include <FrameworkDxe.h>
+#include <Protocol/DriverBinding.h>
+#include <Protocol/ComponentName.h>
+#include <Protocol/ComponentName2.h>
+#include <Protocol/DriverConfiguration.h>
+#include <Protocol/DriverConfiguration2.h>
+#include <Protocol/DriverDiagnostics.h>
+#include <Protocol/DriverDiagnostics2.h>
+#include <Protocol/LoadedImage.h>
+#include <Protocol/GraphicsOutput.h>
+#include <Protocol/UgaDraw.h>
+#include <Protocol/HiiFont.h>
+
+#include <Guid/EventGroup.h>
+#include <Guid/EventLegacyBios.h>
+#include <Guid/GlobalVariable.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PrintLib.h>
+#include <Library/DevicePathLib.h>
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLibPrint.c b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLibPrint.c new file mode 100644 index 0000000000..f0dcf9fb25 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiLibPrint.c @@ -0,0 +1,815 @@ +/** @file
+ Mde UEFI library API implementation.
+ Print to StdErr or ConOut defined in EFI_SYSTEM_TABLE
+
+ Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "UefiLibInternal.h"
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_GRAPHICS_OUTPUT_BLT_PIXEL mEfiColors[16] = {
+ { 0x00, 0x00, 0x00, 0x00 },
+ { 0x98, 0x00, 0x00, 0x00 },
+ { 0x00, 0x98, 0x00, 0x00 },
+ { 0x98, 0x98, 0x00, 0x00 },
+ { 0x00, 0x00, 0x98, 0x00 },
+ { 0x98, 0x00, 0x98, 0x00 },
+ { 0x00, 0x98, 0x98, 0x00 },
+ { 0x98, 0x98, 0x98, 0x00 },
+ { 0x10, 0x10, 0x10, 0x00 },
+ { 0xff, 0x10, 0x10, 0x00 },
+ { 0x10, 0xff, 0x10, 0x00 },
+ { 0xff, 0xff, 0x10, 0x00 },
+ { 0x10, 0x10, 0xff, 0x00 },
+ { 0xf0, 0x10, 0xff, 0x00 },
+ { 0x10, 0xff, 0xff, 0x00 },
+ { 0xff, 0xff, 0xff, 0x00 }
+};
+
+/**
+ Internal function which prints a formatted Unicode string to the console output device
+ specified by Console
+
+ This function prints a formatted Unicode string to the console output device
+ specified by Console and returns the number of Unicode characters that printed
+ to it. If the length of the formatted Unicode string is greater than PcdUefiLibMaxPrintBufferSize,
+ then only the first PcdUefiLibMaxPrintBufferSize characters are sent to Console.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Format Null-terminated Unicode format string.
+ @param Console The output console.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of Unicode characters in the produced
+ output buffer not including the Null-terminator.
+**/
+UINTN
+InternalPrint (
+ IN CONST CHAR16 *Format,
+ IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *Console,
+ IN VA_LIST Marker
+ )
+{
+ EFI_STATUS Status;
+ UINTN Return;
+ CHAR16 *Buffer;
+ UINTN BufferSize;
+
+ ASSERT (Format != NULL);
+ ASSERT (((UINTN) Format & BIT0) == 0);
+ ASSERT (Console != NULL);
+
+ BufferSize = (PcdGet32 (PcdUefiLibMaxPrintBufferSize) + 1) * sizeof (CHAR16);
+
+ Buffer = (CHAR16 *) AllocatePool(BufferSize);
+ ASSERT (Buffer != NULL);
+
+ Return = UnicodeVSPrint (Buffer, BufferSize, Format, Marker);
+
+ if (Console != NULL && Return > 0) {
+ //
+ // To be extra safe make sure Console has been initialized
+ //
+ Status = Console->OutputString (Console, Buffer);
+ if (EFI_ERROR (Status)) {
+ Return = 0;
+ }
+ }
+
+ FreePool (Buffer);
+
+ return Return;
+}
+
+/**
+ Prints a formatted Unicode string to the console output device specified by
+ ConOut defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted Unicode string to the console output device
+ specified by ConOut in EFI_SYSTEM_TABLE and returns the number of Unicode
+ characters that printed to ConOut. If the length of the formatted Unicode
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to ConOut.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+ If gST->ConOut is NULL, then ASSERT().
+
+ @param Format Null-terminated Unicode format string.
+ @param ... Variable argument list whose contents are accessed based
+ on the format string specified by Format.
+
+ @return Number of Unicode characters printed to ConOut.
+
+**/
+UINTN
+EFIAPI
+Print (
+ IN CONST CHAR16 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+
+ VA_START (Marker, Format);
+
+ Return = InternalPrint (Format, gST->ConOut, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
+/**
+ Prints a formatted Unicode string to the console output device specified by
+ StdErr defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted Unicode string to the console output device
+ specified by StdErr in EFI_SYSTEM_TABLE and returns the number of Unicode
+ characters that printed to StdErr. If the length of the formatted Unicode
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to StdErr.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+ If gST->StdErr is NULL, then ASSERT().
+
+ @param Format Null-terminated Unicode format string.
+ @param ... Variable argument list whose contents are accessed based
+ on the format string specified by Format.
+
+ @return Number of Unicode characters printed to StdErr.
+
+**/
+UINTN
+EFIAPI
+ErrorPrint (
+ IN CONST CHAR16 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+
+ VA_START (Marker, Format);
+
+ Return = InternalPrint( Format, gST->StdErr, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
+
+/**
+ Internal function which prints a formatted ASCII string to the console output device
+ specified by Console
+
+ This function prints a formatted ASCII string to the console output device
+ specified by Console and returns the number of ASCII characters that printed
+ to it. If the length of the formatted ASCII string is greater than PcdUefiLibMaxPrintBufferSize,
+ then only the first PcdUefiLibMaxPrintBufferSize characters are sent to Console.
+
+ If Format is NULL, then ASSERT().
+
+ @param Format Null-terminated ASCII format string.
+ @param Console The output console.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of Unicode characters in the produced
+ output buffer not including the Null-terminator.
+
+**/
+UINTN
+AsciiInternalPrint (
+ IN CONST CHAR8 *Format,
+ IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *Console,
+ IN VA_LIST Marker
+ )
+{
+ EFI_STATUS Status;
+ UINTN Return;
+ CHAR16 *Buffer;
+ UINTN BufferSize;
+
+ ASSERT (Format != NULL);
+ ASSERT (Console != NULL);
+
+ BufferSize = (PcdGet32 (PcdUefiLibMaxPrintBufferSize) + 1) * sizeof (CHAR16);
+
+ Buffer = (CHAR16 *) AllocatePool(BufferSize);
+ ASSERT (Buffer != NULL);
+
+ Return = UnicodeVSPrintAsciiFormat (Buffer, BufferSize, Format, Marker);
+
+ if (Console != NULL) {
+ //
+ // To be extra safe make sure Console has been initialized
+ //
+ Status = Console->OutputString (Console, Buffer);
+ if (EFI_ERROR (Status)) {
+ Return = 0;
+ }
+ }
+
+ FreePool (Buffer);
+
+ return Return;
+}
+
+/**
+ Prints a formatted ASCII string to the console output device specified by
+ ConOut defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted ASCII string to the console output device
+ specified by ConOut in EFI_SYSTEM_TABLE and returns the number of ASCII
+ characters that printed to ConOut. If the length of the formatted ASCII
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to ConOut.
+ If Format is NULL, then ASSERT().
+ If gST->ConOut is NULL, then ASSERT().
+
+ @param Format Null-terminated ASCII format string.
+ @param ... Variable argument list whose contents are accessed based
+ on the format string specified by Format.
+
+ @return Number of ASCII characters printed to ConOut.
+
+**/
+UINTN
+EFIAPI
+AsciiPrint (
+ IN CONST CHAR8 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+ ASSERT (Format != NULL);
+
+ VA_START (Marker, Format);
+
+ Return = AsciiInternalPrint( Format, gST->ConOut, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
+/**
+ Prints a formatted ASCII string to the console output device specified by
+ StdErr defined in the EFI_SYSTEM_TABLE.
+
+ This function prints a formatted ASCII string to the console output device
+ specified by StdErr in EFI_SYSTEM_TABLE and returns the number of ASCII
+ characters that printed to StdErr. If the length of the formatted ASCII
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first
+ PcdUefiLibMaxPrintBufferSize characters are sent to StdErr.
+ If Format is NULL, then ASSERT().
+ If gST->StdErr is NULL, then ASSERT().
+
+ @param Format Null-terminated ASCII format string.
+ @param ... Variable argument list whose contents are accessed based
+ on the format string specified by Format.
+
+ @return Number of ASCII characters printed to ConErr.
+
+**/
+UINTN
+EFIAPI
+AsciiErrorPrint (
+ IN CONST CHAR8 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ UINTN Return;
+
+ ASSERT (Format != NULL);
+
+ VA_START (Marker, Format);
+
+ Return = AsciiInternalPrint( Format, gST->StdErr, Marker);
+
+ VA_END (Marker);
+
+ return Return;
+}
+
+/**
+ Internal function to print a formatted Unicode string to a graphics console device specified by
+ ConsoleOutputHandle defined in the EFI_SYSTEM_TABLE at the given (X,Y) coordinates.
+
+ This function prints a formatted Unicode string to the graphics console device
+ specified by ConsoleOutputHandle in EFI_SYSTEM_TABLE and returns the number of
+ Unicode characters printed. The EFI_HII_FONT_PROTOCOL is used to convert the
+ string to a bitmap using the glyphs registered with the
+ HII database. No wrapping is performed, so any portions of the string the fall
+ outside the active display region will not be displayed.
+
+ If a graphics console device is not associated with the ConsoleOutputHandle
+ defined in the EFI_SYSTEM_TABLE then no string is printed, and 0 is returned.
+ If the EFI_HII_FONT_PROTOCOL is not present in the handle database, then no
+ string is printed, and 0 is returned.
+
+ @param PointX X coordinate to print the string.
+ @param PointY Y coordinate to print the string.
+ @param Foreground The foreground color of the string being printed. This is
+ an optional parameter that may be NULL. If it is NULL,
+ then the foreground color of the current ConOut device
+ in the EFI_SYSTEM_TABLE is used.
+ @param Background The background color of the string being printed. This is
+ an optional parameter that may be NULL. If it is NULL,
+ then the background color of the current ConOut device
+ in the EFI_SYSTEM_TABLE is used.
+ @param Buffer Null-terminated Unicode formatted string.
+ @param PrintNum The number of Unicode formatted string to be printed.
+
+ @return Number of Unicode Characters printed. Zero means no any character
+ displayed successfully.
+
+**/
+UINTN
+InternalPrintGraphic (
+ IN UINTN PointX,
+ IN UINTN PointY,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Foreground,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Background,
+ IN CHAR16 *Buffer,
+ IN UINTN PrintNum
+ )
+{
+ EFI_STATUS Status;
+ UINT32 HorizontalResolution;
+ UINT32 VerticalResolution;
+ UINT32 ColorDepth;
+ UINT32 RefreshRate;
+ EFI_HII_FONT_PROTOCOL *HiiFont;
+ EFI_IMAGE_OUTPUT *Blt;
+ EFI_FONT_DISPLAY_INFO FontInfo;
+ EFI_HII_ROW_INFO *RowInfoArray;
+ UINTN RowInfoArraySize;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
+ EFI_UGA_DRAW_PROTOCOL *UgaDraw;
+ EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *Sto;
+ EFI_HANDLE ConsoleHandle;
+ UINTN Width;
+ UINTN Height;
+ UINTN Delta;
+
+ HorizontalResolution = 0;
+ VerticalResolution = 0;
+ Blt = NULL;
+ RowInfoArray = NULL;
+
+ ConsoleHandle = gST->ConsoleOutHandle;
+
+ ASSERT( ConsoleHandle != NULL);
+
+ Status = gBS->HandleProtocol (
+ ConsoleHandle,
+ &gEfiGraphicsOutputProtocolGuid,
+ (VOID **) &GraphicsOutput
+ );
+
+ UgaDraw = NULL;
+ if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) {
+ //
+ // If no GOP available, try to open UGA Draw protocol if supported.
+ //
+ GraphicsOutput = NULL;
+
+ Status = gBS->HandleProtocol (
+ ConsoleHandle,
+ &gEfiUgaDrawProtocolGuid,
+ (VOID **) &UgaDraw
+ );
+ }
+ if (EFI_ERROR (Status)) {
+ goto Error;
+ }
+
+ Status = gBS->HandleProtocol (
+ ConsoleHandle,
+ &gEfiSimpleTextOutProtocolGuid,
+ (VOID **) &Sto
+ );
+
+ if (EFI_ERROR (Status)) {
+ goto Error;
+ }
+
+ if (GraphicsOutput != NULL) {
+ HorizontalResolution = GraphicsOutput->Mode->Info->HorizontalResolution;
+ VerticalResolution = GraphicsOutput->Mode->Info->VerticalResolution;
+ } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
+ UgaDraw->GetMode (UgaDraw, &HorizontalResolution, &VerticalResolution, &ColorDepth, &RefreshRate);
+ } else {
+ goto Error;
+ }
+
+ ASSERT ((HorizontalResolution != 0) && (VerticalResolution !=0));
+
+ Status = gBS->LocateProtocol (&gEfiHiiFontProtocolGuid, NULL, (VOID **) &HiiFont);
+ if (EFI_ERROR (Status)) {
+ goto Error;
+ }
+
+ Blt = (EFI_IMAGE_OUTPUT *) AllocateZeroPool (sizeof (EFI_IMAGE_OUTPUT));
+ ASSERT (Blt != NULL);
+
+ Blt->Width = (UINT16) (HorizontalResolution);
+ Blt->Height = (UINT16) (VerticalResolution);
+
+ ZeroMem (&FontInfo, sizeof (EFI_FONT_DISPLAY_INFO));
+
+ if (Foreground != NULL) {
+ CopyMem (&FontInfo.ForegroundColor, Foreground, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+ } else {
+ CopyMem (
+ &FontInfo.ForegroundColor,
+ &mEfiColors[Sto->Mode->Attribute & 0x0f],
+ sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
+ );
+ }
+ if (Background != NULL) {
+ CopyMem (&FontInfo.BackgroundColor, Background, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+ } else {
+ CopyMem (
+ &FontInfo.BackgroundColor,
+ &mEfiColors[Sto->Mode->Attribute >> 4],
+ sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
+ );
+ }
+
+ if (GraphicsOutput != NULL) {
+ Blt->Image.Screen = GraphicsOutput;
+
+ Status = HiiFont->StringToImage (
+ HiiFont,
+ EFI_HII_IGNORE_IF_NO_GLYPH | EFI_HII_OUT_FLAG_CLIP |
+ EFI_HII_OUT_FLAG_CLIP_CLEAN_X | EFI_HII_OUT_FLAG_CLIP_CLEAN_Y |
+ EFI_HII_IGNORE_LINE_BREAK | EFI_HII_DIRECT_TO_SCREEN,
+ Buffer,
+ &FontInfo,
+ &Blt,
+ PointX,
+ PointY,
+ &RowInfoArray,
+ &RowInfoArraySize,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ goto Error;
+ }
+
+ } else if (FeaturePcdGet (PcdUgaConsumeSupport)) {
+ ASSERT (UgaDraw!= NULL);
+
+ Blt->Image.Bitmap = AllocateZeroPool (Blt->Width * Blt->Height * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+ ASSERT (Blt->Image.Bitmap != NULL);
+
+ //
+ // StringToImage only support blt'ing image to device using GOP protocol. If GOP is not supported in this platform,
+ // we ask StringToImage to print the string to blt buffer, then blt to device using UgaDraw.
+ //
+ Status = HiiFont->StringToImage (
+ HiiFont,
+ EFI_HII_IGNORE_IF_NO_GLYPH | EFI_HII_OUT_FLAG_CLIP |
+ EFI_HII_OUT_FLAG_CLIP_CLEAN_X | EFI_HII_OUT_FLAG_CLIP_CLEAN_Y |
+ EFI_HII_IGNORE_LINE_BREAK,
+ Buffer,
+ &FontInfo,
+ &Blt,
+ PointX,
+ PointY,
+ &RowInfoArray,
+ &RowInfoArraySize,
+ NULL
+ );
+
+ if (!EFI_ERROR (Status)) {
+ ASSERT (RowInfoArray != NULL);
+ //
+ // Explicit Line break characters are ignored, so the updated parameter RowInfoArraySize by StringToImage will
+ // always be 1 or 0 (if there is no valid Unicode Char can be printed). ASSERT here to make sure.
+ //
+ ASSERT (RowInfoArraySize <= 1);
+
+ if (RowInfoArraySize != 0) {
+ Width = RowInfoArray[0].LineWidth;
+ Height = RowInfoArray[0].LineHeight;
+ Delta = Blt->Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL);
+ } else {
+ Width = 0;
+ Height = 0;
+ Delta = 0;
+ }
+ Status = UgaDraw->Blt (
+ UgaDraw,
+ (EFI_UGA_PIXEL *) Blt->Image.Bitmap,
+ EfiUgaBltBufferToVideo,
+ PointX,
+ PointY,
+ PointX,
+ PointY,
+ Width,
+ Height,
+ Delta
+ );
+ } else {
+ goto Error;
+ }
+ FreePool (Blt->Image.Bitmap);
+ } else {
+ goto Error;
+ }
+ //
+ // Calculate the number of actual printed characters
+ //
+ if (RowInfoArraySize != 0) {
+ PrintNum = RowInfoArray[0].EndIndex - RowInfoArray[0].StartIndex + 1;
+ } else {
+ PrintNum = 0;
+ }
+
+ FreePool (RowInfoArray);
+ FreePool (Blt);
+ return PrintNum;
+
+Error:
+ if (Blt != NULL) {
+ FreePool (Blt);
+ }
+ return 0;
+}
+
+/**
+ Prints a formatted Unicode string to a graphics console device specified by
+ ConsoleOutputHandle defined in the EFI_SYSTEM_TABLE at the given (X,Y) coordinates.
+
+ This function prints a formatted Unicode string to the graphics console device
+ specified by ConsoleOutputHandle in EFI_SYSTEM_TABLE and returns the number of
+ Unicode characters displayed, not including partial characters that may be clipped
+ by the right edge of the display. If the length of the formatted Unicode string is
+ greater than PcdUefiLibMaxPrintBufferSize, then at most the first
+ PcdUefiLibMaxPrintBufferSize characters are printed.The EFI_HII_FONT_PROTOCOL
+ StringToImage() service is used to convert the string to a bitmap using the glyphs
+ registered with the HII database. No wrapping is performed, so any portions of the
+ string the fall outside the active display region will not be displayed. Please see
+ Section 27.2.6 of the UEFI Specification for a description of the supported string
+ format including the set of control codes supported by the StringToImage() service.
+
+ If a graphics console device is not associated with the ConsoleOutputHandle
+ defined in the EFI_SYSTEM_TABLE then no string is printed, and 0 is returned.
+ If the EFI_HII_FONT_PROTOCOL is not present in the handle database, then no
+ string is printed, and 0 is returned.
+ If Format is NULL, then ASSERT().
+ If Format is not aligned on a 16-bit boundary, then ASSERT().
+ If gST->ConsoleOutputHandle is NULL, then ASSERT().
+
+ @param PointX X coordinate to print the string.
+ @param PointY Y coordinate to print the string.
+ @param ForeGround The foreground color of the string being printed. This is
+ an optional parameter that may be NULL. If it is NULL,
+ then the foreground color of the current ConOut device
+ in the EFI_SYSTEM_TABLE is used.
+ @param BackGround The background color of the string being printed. This is
+ an optional parameter that may be NULL. If it is NULL,
+ then the background color of the current ConOut device
+ in the EFI_SYSTEM_TABLE is used.
+ @param Format Null-terminated Unicode format string. See Print Library
+ for the supported format string syntax.
+ @param ... Variable argument list whose contents are accessed based on
+ the format string specified by Format.
+
+ @return The number of Unicode characters printed.
+
+**/
+UINTN
+EFIAPI
+PrintXY (
+ IN UINTN PointX,
+ IN UINTN PointY,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *ForeGround, OPTIONAL
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BackGround, OPTIONAL
+ IN CONST CHAR16 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ CHAR16 *Buffer;
+ UINTN BufferSize;
+ UINTN PrintNum;
+ UINTN ReturnNum;
+
+ ASSERT (Format != NULL);
+ ASSERT (((UINTN) Format & BIT0) == 0);
+
+ VA_START (Marker, Format);
+
+ BufferSize = (PcdGet32 (PcdUefiLibMaxPrintBufferSize) + 1) * sizeof (CHAR16);
+
+ Buffer = (CHAR16 *) AllocatePool (BufferSize);
+ ASSERT (Buffer != NULL);
+
+ PrintNum = UnicodeVSPrint (Buffer, BufferSize, Format, Marker);
+
+ VA_END (Marker);
+
+ ReturnNum = InternalPrintGraphic (PointX, PointY, ForeGround, BackGround, Buffer, PrintNum);
+
+ FreePool (Buffer);
+
+ return ReturnNum;
+}
+
+/**
+ Prints a formatted ASCII string to a graphics console device specified by
+ ConsoleOutputHandle defined in the EFI_SYSTEM_TABLE at the given (X,Y) coordinates.
+
+ This function prints a formatted ASCII string to the graphics console device
+ specified by ConsoleOutputHandle in EFI_SYSTEM_TABLE and returns the number of
+ ASCII characters displayed, not including partial characters that may be clipped
+ by the right edge of the display. If the length of the formatted ASCII string is
+ greater than PcdUefiLibMaxPrintBufferSize, then at most the first
+ PcdUefiLibMaxPrintBufferSize characters are printed.The EFI_HII_FONT_PROTOCOL
+ StringToImage() service is used to convert the string to a bitmap using the glyphs
+ registered with the HII database. No wrapping is performed, so any portions of the
+ string the fall outside the active display region will not be displayed. Please see
+ Section 27.2.6 of the UEFI Specification for a description of the supported string
+ format including the set of control codes supported by the StringToImage() service.
+
+ If a graphics console device is not associated with the ConsoleOutputHandle
+ defined in the EFI_SYSTEM_TABLE then no string is printed, and 0 is returned.
+ If the EFI_HII_FONT_PROTOCOL is not present in the handle database, then no
+ string is printed, and 0 is returned.
+ If Format is NULL, then ASSERT().
+ If gST->ConsoleOutputHandle is NULL, then ASSERT().
+
+ @param PointX X coordinate to print the string.
+ @param PointY Y coordinate to print the string.
+ @param ForeGround The foreground color of the string being printed. This is
+ an optional parameter that may be NULL. If it is NULL,
+ then the foreground color of the current ConOut device
+ in the EFI_SYSTEM_TABLE is used.
+ @param BackGround The background color of the string being printed. This is
+ an optional parameter that may be NULL. If it is NULL,
+ then the background color of the current ConOut device
+ in the EFI_SYSTEM_TABLE is used.
+ @param Format Null-terminated ASCII format string. See Print Library
+ for the supported format string syntax.
+ @param ... Variable argument list whose contents are accessed based on
+ the format string specified by Format.
+
+ @return The number of ASCII characters printed.
+
+**/
+UINTN
+EFIAPI
+AsciiPrintXY (
+ IN UINTN PointX,
+ IN UINTN PointY,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *ForeGround, OPTIONAL
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BackGround, OPTIONAL
+ IN CONST CHAR8 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+ CHAR16 *Buffer;
+ UINTN BufferSize;
+ UINTN PrintNum;
+ UINTN ReturnNum;
+
+ ASSERT (Format != NULL);
+
+ VA_START (Marker, Format);
+
+ BufferSize = (PcdGet32 (PcdUefiLibMaxPrintBufferSize) + 1) * sizeof (CHAR16);
+
+ Buffer = (CHAR16 *) AllocatePool (BufferSize);
+ ASSERT (Buffer != NULL);
+
+ PrintNum = UnicodeSPrintAsciiFormat (Buffer, BufferSize, Format, Marker);
+
+ VA_END (Marker);
+
+ ReturnNum = InternalPrintGraphic (PointX, PointY, ForeGround, BackGround, Buffer, PrintNum);
+
+ FreePool (Buffer);
+
+ return ReturnNum;
+}
+
+/**
+ Appends a formatted Unicode string to a Null-terminated Unicode string
+
+ This function appends a formatted Unicode string to the Null-terminated
+ Unicode string specified by String. String is optional and may be NULL.
+ Storage for the formatted Unicode string returned is allocated using
+ AllocatePool(). The pointer to the appended string is returned. The caller
+ is responsible for freeing the returned string.
+
+ If String is not NULL and not aligned on a 16-bit boundary, then ASSERT().
+ If FormatString is NULL, then ASSERT().
+ If FormatString is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] String A Null-terminated Unicode string.
+ @param[in] FormatString A Null-terminated Unicode format string.
+ @param[in] Marker VA_LIST marker for the variable argument list.
+
+ @retval NULL There was not enough available memory.
+ @return Null-terminated Unicode string is that is the formatted
+ string appended to String.
+**/
+CHAR16*
+EFIAPI
+CatVSPrint (
+ IN CHAR16 *String, OPTIONAL
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ UINTN CharactersRequired;
+ UINTN SizeRequired;
+ CHAR16 *BufferToReturn;
+ VA_LIST ExtraMarker;
+
+ VA_COPY (ExtraMarker, Marker);
+ CharactersRequired = SPrintLength(FormatString, ExtraMarker);
+ VA_END (ExtraMarker);
+
+ if (String != NULL) {
+ SizeRequired = StrSize(String) + (CharactersRequired * sizeof(CHAR16));
+ } else {
+ SizeRequired = sizeof(CHAR16) + (CharactersRequired * sizeof(CHAR16));
+ }
+
+ BufferToReturn = AllocatePool(SizeRequired);
+
+ if (BufferToReturn == NULL) {
+ return NULL;
+ } else {
+ BufferToReturn[0] = L'\0';
+ }
+
+ if (String != NULL) {
+ StrCpyS(BufferToReturn, SizeRequired / sizeof(CHAR16), String);
+ }
+
+ UnicodeVSPrint(BufferToReturn + StrLen(BufferToReturn), (CharactersRequired+1) * sizeof(CHAR16), FormatString, Marker);
+
+ ASSERT(StrSize(BufferToReturn)==SizeRequired);
+
+ return (BufferToReturn);
+}
+
+/**
+ Appends a formatted Unicode string to a Null-terminated Unicode string
+
+ This function appends a formatted Unicode string to the Null-terminated
+ Unicode string specified by String. String is optional and may be NULL.
+ Storage for the formatted Unicode string returned is allocated using
+ AllocatePool(). The pointer to the appended string is returned. The caller
+ is responsible for freeing the returned string.
+
+ If String is not NULL and not aligned on a 16-bit boundary, then ASSERT().
+ If FormatString is NULL, then ASSERT().
+ If FormatString is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] String A Null-terminated Unicode string.
+ @param[in] FormatString A Null-terminated Unicode format string.
+ @param[in] ... The variable argument list whose contents are
+ accessed based on the format string specified by
+ FormatString.
+
+ @retval NULL There was not enough available memory.
+ @return Null-terminated Unicode string is that is the formatted
+ string appended to String.
+**/
+CHAR16 *
+EFIAPI
+CatSPrint (
+ IN CHAR16 *String, OPTIONAL
+ IN CONST CHAR16 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+ CHAR16 *NewString;
+
+ VA_START (Marker, FormatString);
+ NewString = CatVSPrint(String, FormatString, Marker);
+ VA_END (Marker);
+ return NewString;
+}
+
diff --git a/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiNotTiano.c b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiNotTiano.c new file mode 100644 index 0000000000..2f8b1807fd --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/FrameworkUefiLib/UefiNotTiano.c @@ -0,0 +1,348 @@ +/** @file
+ Library functions that abstract areas of conflict between framework and UEFI 2.0.
+
+ Help Port Framework code that has conflicts with UEFI 2.0 by hiding the
+ old conflicts with library functions and supporting implementations of the old
+ (EDK/EFI 1.10) and new (EDK II/UEFI 2.0) way. This module is a DXE driver as
+ it contains DXE enum extensions for EFI event services.
+
+Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+#include "UefiLibInternal.h"
+
+/**
+ An empty function to pass error checking of CreateEventEx ().
+
+ This empty function ensures that EVT_NOTIFY_SIGNAL_ALL is error
+ checked correctly since it is now mapped into CreateEventEx() in UEFI 2.0.
+
+ @param Event Event whose notification function is being invoked.
+ @param Context Pointer to the notification function's context,
+ which is implementation-dependent.
+
+**/
+VOID
+EFIAPI
+InternalEmptyFuntion (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ return;
+}
+
+/**
+ Create a Legacy Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a legacy boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification by
+ declaring a GUID for the legacy boot event class. This library supports
+ the EDK/EFI 1.10 form and EDK II/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventLegacyBoot (
+ OUT EFI_EVENT *LegacyBootEvent
+ )
+{
+ return EfiCreateEventLegacyBootEx (
+ TPL_CALLBACK,
+ InternalEmptyFuntion,
+ NULL,
+ LegacyBootEvent
+ );
+}
+
+/**
+ Create an EFI event in the Legacy Boot Event Group and allows
+ the caller to specify a notification function.
+
+ This function abstracts the creation of the Legacy Boot Event.
+ The Framework moved from a proprietary to UEFI 2.0 based mechanism.
+ This library abstracts the caller from how this event is created to prevent
+ to code form having to change with the version of the specification supported.
+ If LegacyBootEvent is NULL, then ASSERT().
+
+ @param NotifyTpl The task priority level of the event.
+ @param NotifyFunction The notification function to call when the event is signaled.
+ @param NotifyContext The content to pass to NotifyFunction when the event is signaled.
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventLegacyBootEx (
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL
+ IN VOID *NotifyContext, OPTIONAL
+ OUT EFI_EVENT *LegacyBootEvent
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (LegacyBootEvent != NULL);
+
+ if (gST->Hdr.Revision < 0x00020000) {
+ //
+ // prior to UEFI 2.0 use Tiano extension to EFI
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_LEGACY_BOOT | EVT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ LegacyBootEvent
+ );
+ } else {
+ //
+ // For UEFI 2.0 and the future use an Event Group
+ //
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ &gEfiEventLegacyBootGuid,
+ LegacyBootEvent
+ );
+ }
+
+ return Status;
+}
+
+/**
+ Create a Read to Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a ready to boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification and use
+ the ready to boot event class defined in UEFI 2.0. This library supports
+ the EDK/EFI 1.10 form and EDK II/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param ReadyToBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventReadyToBoot (
+ OUT EFI_EVENT *ReadyToBootEvent
+ )
+{
+ return EfiCreateEventReadyToBootEx (
+ TPL_CALLBACK,
+ InternalEmptyFuntion,
+ NULL,
+ ReadyToBootEvent
+ );
+}
+
+/**
+ Create an EFI event in the Ready To Boot Event Group and allows
+ the caller to specify a notification function.
+
+ This function abstracts the creation of the Ready to Boot Event.
+ The Framework moved from a proprietary to UEFI 2.0 based mechanism.
+ This library abstracts the caller from how this event is created to prevent
+ to code form having to change with the version of the specification supported.
+ If ReadyToBootEvent is NULL, then ASSERT().
+
+ @param NotifyTpl The task priority level of the event.
+ @param NotifyFunction The notification function to call when the event is signaled.
+ @param NotifyContext The content to pass to NotifyFunction when the event is signaled.
+ @param ReadyToBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventReadyToBootEx (
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL
+ IN VOID *NotifyContext, OPTIONAL
+ OUT EFI_EVENT *ReadyToBootEvent
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (ReadyToBootEvent != NULL);
+
+ if (gST->Hdr.Revision < 0x00020000) {
+ //
+ // prior to UEFI 2.0 use Tiano extension to EFI
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ ReadyToBootEvent
+ );
+ } else {
+ //
+ // For UEFI 2.0 and the future use an Event Group
+ //
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ &gEfiEventReadyToBootGuid,
+ ReadyToBootEvent
+ );
+ }
+
+ return Status;
+}
+
+
+/**
+ Signal a Ready to Boot Event.
+
+ Create a Ready to Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventReadyToBoot (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT ReadyToBootEvent;
+
+ Status = EfiCreateEventReadyToBoot (&ReadyToBootEvent);
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (ReadyToBootEvent);
+ gBS->CloseEvent (ReadyToBootEvent);
+ }
+}
+
+/**
+ Signal a Legacy Boot Event.
+
+ Create a legacy Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventLegacyBoot (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT LegacyBootEvent;
+
+ Status = EfiCreateEventLegacyBoot (&LegacyBootEvent);
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (LegacyBootEvent);
+ gBS->CloseEvent (LegacyBootEvent);
+ }
+}
+
+
+/**
+ Check to see if the Firmware Volume (FV) Media Device Path is valid
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for Tiano extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability. The return value to this
+ function points to a location in FvDevicePathNode and it does not allocate
+ new memory for the GUID pointer that is returned.
+
+ @param FvDevicePathNode Pointer to FV device path to check.
+
+ @retval NULL FvDevicePathNode is not valid.
+ @retval Other FvDevicePathNode is valid and pointer to NameGuid was returned.
+
+**/
+EFI_GUID *
+EFIAPI
+EfiGetNameGuidFromFwVolDevicePathNode (
+ IN CONST MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode
+ )
+{
+ ASSERT (FvDevicePathNode != NULL);
+
+ //
+ // EFI Specification extension on Media Device Path. MEDIA_FW_VOL_FILEPATH_DEVICE_PATH is adopted by UEFI later and added in UEFI2.10.
+ // In EdkCompatibility Package, we only support MEDIA_FW_VOL_FILEPATH_DEVICE_PATH that complies with
+ // EFI 1.10 and UEFI 2.10.
+ //
+ if (DevicePathType (&FvDevicePathNode->Header) == MEDIA_DEVICE_PATH &&
+ DevicePathSubType (&FvDevicePathNode->Header) == MEDIA_PIWG_FW_FILE_DP) {
+ return (EFI_GUID *) &FvDevicePathNode->FvFileName;
+ }
+
+ return NULL;
+}
+
+
+/**
+ Initialize a Firmware Volume (FV) Media Device Path node.
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for Tiano extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability.
+
+ @param FvDevicePathNode Pointer to a FV device path node to initialize
+ @param NameGuid FV file name to use in FvDevicePathNode
+
+**/
+VOID
+EFIAPI
+EfiInitializeFwVolDevicepathNode (
+ IN OUT MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode,
+ IN CONST EFI_GUID *NameGuid
+ )
+{
+ ASSERT (FvDevicePathNode != NULL);
+ ASSERT (NameGuid != NULL);
+
+ //
+ // EFI Specification extension on Media Device Path. MEDIA_FW_VOL_FILEPATH_DEVICE_PATH is adopted by UEFI later and added in UEFI2.10.
+ // In EdkCompatibility Package, we only support MEDIA_FW_VOL_FILEPATH_DEVICE_PATH that complies with
+ // EFI 1.10 and UEFI 2.10.
+ //
+ FvDevicePathNode->Header.Type = MEDIA_DEVICE_PATH;
+ FvDevicePathNode->Header.SubType = MEDIA_PIWG_FW_FILE_DP;
+ SetDevicePathNodeLength (&FvDevicePathNode->Header, sizeof (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH));
+
+ CopyGuid (&FvDevicePathNode->FvFileName, NameGuid);
+}
+
diff --git a/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/HobLib.c b/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/HobLib.c new file mode 100644 index 0000000000..b41536e2a1 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/HobLib.c @@ -0,0 +1,738 @@ +/** @file
+ Instance of HOB Library using PEI Services.
+
+ HOB Library implementation that uses PEI Services to retrieve the HOB List.
+ This library instance uses EFI_HOB_TYPE_CV defined in Intel framework HOB specification v0.9
+ to implement HobLib BuildCvHob() API.
+
+Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <FrameworkPei.h>
+
+#include <Guid/MemoryAllocationHob.h>
+
+#include <Library/HobLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/BaseMemoryLib.h>
+
+/**
+ Returns the pointer to the HOB list.
+
+ This function returns the pointer to first HOB in the list.
+ For PEI phase, the PEI service GetHobList() can be used to retrieve the pointer
+ to the HOB list. For the DXE phase, the HOB list pointer can be retrieved through
+ the EFI System Table by looking up theHOB list GUID in the System Configuration Table.
+ Since the System Configuration Table does not exist that the time the DXE Core is
+ launched, the DXE Core uses a global variable from the DXE Core Entry Point Library
+ to manage the pointer to the HOB list.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ VOID *HobList;
+
+ Status = PeiServicesGetHobList (&HobList);
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (HobList != NULL);
+
+ return HobList;
+}
+
+/**
+ Returns the next instance of a HOB type from the starting HOB.
+
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If HobStart is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ IN UINT16 Type,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list until end of list or matching type is found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ Returns the first instance of a HOB type among the whole HOB list.
+
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ IN UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ Returns the next instance of the matched GUID HOB from the starting HOB.
+
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
+
+ If Guid is NULL, then ASSERT().
+ If HobStart is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ Returns the first instance of the matched GUID HOB among the whole HOB list.
+
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
+ to extract the data section and its size info respectively.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+ If Guid is NULL, then ASSERT().
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ IN CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
+
+/**
+ Get the system boot mode from the HOB list.
+
+ This function returns the system boot mode information from the
+ PHIT HOB in HOB list.
+
+ If the pointer to the HOB list is NULL, then ASSERT().
+
+ @param VOID
+
+ @return The Boot Mode.
+
+**/
+EFI_BOOT_MODE
+EFIAPI
+GetBootModeHob (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+
+ Status = PeiServicesGetBootMode (&BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ return BootMode;
+}
+
+/**
+ Adds a new HOB to the HOB List.
+
+ This internal function enables PEIMs to create various types of HOBs.
+
+ @param Type Type of the new HOB.
+ @param Length Length of the new HOB to allocate.
+
+ @retval NULL The HOB could not be allocated.
+ @retval others The address of new HOB.
+
+**/
+VOID *
+EFIAPI
+InternalPeiCreateHob (
+ IN UINT16 Type,
+ IN UINT16 Length
+ )
+{
+ EFI_STATUS Status;
+ VOID *Hob;
+
+ Status = PeiServicesCreateHob (Type, Length, &Hob);
+ if (EFI_ERROR (Status)) {
+ Hob = NULL;
+ }
+ //
+ // Assume the process of HOB building is always successful.
+ //
+ ASSERT (Hob != NULL);
+ return Hob;
+}
+
+/**
+ Builds a HOB for a loaded PE32 module.
+
+ This function builds a HOB for a loaded PE32 module.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If ModuleName is NULL, then ASSERT().
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param ModuleName The GUID File Name of the module.
+ @param MemoryAllocationModule The 64 bit physical address of the module.
+ @param ModuleLength The length of the module in bytes.
+ @param EntryPoint The 64 bit physical address of the module entry point.
+
+**/
+VOID
+EFIAPI
+BuildModuleHob (
+ IN CONST EFI_GUID *ModuleName,
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
+ IN UINT64 ModuleLength,
+ IN EFI_PHYSICAL_ADDRESS EntryPoint
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION_MODULE *Hob;
+
+ ASSERT (((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) == 0) &&
+ ((ModuleLength & (EFI_PAGE_SIZE - 1)) == 0));
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, (UINT16) sizeof (EFI_HOB_MEMORY_ALLOCATION_MODULE));
+ if (Hob == NULL) {
+ return;
+ }
+
+ CopyGuid (&(Hob->MemoryAllocationHeader.Name), &gEfiHobMemoryAllocModuleGuid);
+ Hob->MemoryAllocationHeader.MemoryBaseAddress = MemoryAllocationModule;
+ Hob->MemoryAllocationHeader.MemoryLength = ModuleLength;
+ Hob->MemoryAllocationHeader.MemoryType = EfiBootServicesCode;
+
+ //
+ // Zero the reserved space to match HOB spec
+ //
+ ZeroMem (Hob->MemoryAllocationHeader.Reserved, sizeof (Hob->MemoryAllocationHeader.Reserved));
+
+ CopyGuid (&Hob->ModuleName, ModuleName);
+ Hob->EntryPoint = EntryPoint;
+}
+
+/**
+ Builds a HOB that describes a chunk of system memory with Owner GUID.
+
+ This function builds a HOB that describes a chunk of system memory.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param ResourceType The type of resource described by this HOB.
+ @param ResourceAttribute The resource attributes of the memory described by this HOB.
+ @param PhysicalStart The 64 bit physical address of memory described by this HOB.
+ @param NumberOfBytes The length of the memory described by this HOB in bytes.
+ @param OwnerGUID GUID for the owner of this resource.
+
+**/
+VOID
+EFIAPI
+BuildResourceDescriptorWithOwnerHob (
+ IN EFI_RESOURCE_TYPE ResourceType,
+ IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,
+ IN EFI_PHYSICAL_ADDRESS PhysicalStart,
+ IN UINT64 NumberOfBytes,
+ IN EFI_GUID *OwnerGUID
+ )
+{
+ EFI_HOB_RESOURCE_DESCRIPTOR *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (UINT16) sizeof (EFI_HOB_RESOURCE_DESCRIPTOR));
+ if (Hob == NULL) {
+ return;
+ }
+
+ Hob->ResourceType = ResourceType;
+ Hob->ResourceAttribute = ResourceAttribute;
+ Hob->PhysicalStart = PhysicalStart;
+ Hob->ResourceLength = NumberOfBytes;
+
+ CopyGuid (&Hob->Owner, OwnerGUID);
+}
+
+/**
+ Builds a HOB that describes a chunk of system memory.
+
+ This function builds a HOB that describes a chunk of system memory.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param ResourceType The type of resource described by this HOB.
+ @param ResourceAttribute The resource attributes of the memory described by this HOB.
+ @param PhysicalStart The 64 bit physical address of memory described by this HOB.
+ @param NumberOfBytes The length of the memory described by this HOB in bytes.
+
+**/
+VOID
+EFIAPI
+BuildResourceDescriptorHob (
+ IN EFI_RESOURCE_TYPE ResourceType,
+ IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,
+ IN EFI_PHYSICAL_ADDRESS PhysicalStart,
+ IN UINT64 NumberOfBytes
+ )
+{
+ EFI_HOB_RESOURCE_DESCRIPTOR *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (UINT16) sizeof (EFI_HOB_RESOURCE_DESCRIPTOR));
+ if (Hob == NULL) {
+ return;
+ }
+
+ Hob->ResourceType = ResourceType;
+ Hob->ResourceAttribute = ResourceAttribute;
+ Hob->PhysicalStart = PhysicalStart;
+ Hob->ResourceLength = NumberOfBytes;
+ ZeroMem (&(Hob->Owner), sizeof (EFI_GUID));
+}
+
+/**
+ Builds a customized HOB tagged with a GUID for identification and returns
+ the start address of GUID HOB data.
+
+ This function builds a customized HOB tagged with a GUID for identification
+ and returns the start address of GUID HOB data so that caller can fill the customized data.
+ The HOB Header and Name field is already stripped.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If Guid is NULL, then ASSERT().
+ If there is no additional space for HOB creation, then ASSERT().
+ If DataLength >= (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT().
+
+ @param Guid The GUID to tag the customized HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @retval NULL The GUID HOB could not be allocated.
+ @retval others The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN DataLength
+ )
+{
+ EFI_HOB_GUID_TYPE *Hob;
+
+ //
+ // Make sure Guid is valid
+ //
+ ASSERT (Guid != NULL);
+
+ //
+ // Make sure that data length is not too long.
+ //
+ ASSERT (DataLength <= (0xffff - sizeof (EFI_HOB_GUID_TYPE)));
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_GUID_EXTENSION, (UINT16) (sizeof (EFI_HOB_GUID_TYPE) + DataLength));
+ if (Hob == NULL) {
+ return Hob;
+ }
+ CopyGuid (&Hob->Name, Guid);
+ return Hob + 1;
+}
+
+/**
+ Builds a customized HOB tagged with a GUID for identification, copies the input data to the HOB
+ data field, and returns the start address of the GUID HOB data.
+
+ This function builds a customized HOB tagged with a GUID for identification and copies the input
+ data to the HOB data field and returns the start address of the GUID HOB data. It can only be
+ invoked during PEI phase; for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+ The HOB Header and Name field is already stripped.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If Guid is NULL, then ASSERT().
+ If Data is NULL and DataLength > 0, then ASSERT().
+ If there is no additional space for HOB creation, then ASSERT().
+ If DataLength >= (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT().
+
+ @param Guid The GUID to tag the customized HOB.
+ @param Data The data to be copied into the data field of the GUID HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @retval NULL The GUID HOB could not be allocated.
+ @retval others The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidDataHob (
+ IN CONST EFI_GUID *Guid,
+ IN VOID *Data,
+ IN UINTN DataLength
+ )
+{
+ VOID *HobData;
+
+ ASSERT (Data != NULL || DataLength == 0);
+
+ HobData = BuildGuidHob (Guid, DataLength);
+ if (HobData == NULL) {
+ return HobData;
+ }
+
+ return CopyMem (HobData, Data, DataLength);
+}
+
+/**
+ Builds a Firmware Volume HOB.
+
+ This function builds a Firmware Volume HOB.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param BaseAddress The base address of the Firmware Volume.
+ @param Length The size of the Firmware Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildFvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_HOB_FIRMWARE_VOLUME *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_FV, (UINT16) sizeof (EFI_HOB_FIRMWARE_VOLUME));
+ if (Hob == NULL) {
+ return;
+ }
+
+ Hob->BaseAddress = BaseAddress;
+ Hob->Length = Length;
+}
+
+/**
+ Builds a EFI_HOB_TYPE_FV2 HOB.
+
+ This function builds a EFI_HOB_TYPE_FV2 HOB.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param BaseAddress The base address of the Firmware Volume.
+ @param Length The size of the Firmware Volume in bytes.
+ @param FvName The name of the Firmware Volume.
+ @param FileName The name of the file.
+
+**/
+VOID
+EFIAPI
+BuildFv2Hob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN CONST EFI_GUID *FvName,
+ IN CONST EFI_GUID *FileName
+ )
+{
+ EFI_HOB_FIRMWARE_VOLUME2 *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_FV2, (UINT16) sizeof (EFI_HOB_FIRMWARE_VOLUME2));
+ if (Hob == NULL) {
+ return;
+ }
+
+ Hob->BaseAddress = BaseAddress;
+ Hob->Length = Length;
+ CopyGuid (&Hob->FvName, FvName);
+ CopyGuid (&Hob->FileName, FileName);
+}
+
+/**
+ Builds a Capsule Volume HOB.
+
+ This function builds a Capsule Volume HOB.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If the platform does not support Capsule Volume HOBs, then ASSERT().
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param BaseAddress The base address of the Capsule Volume.
+ @param Length The size of the Capsule Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildCvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_HOB_CAPSULE_VOLUME *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_CV, (UINT16) sizeof (EFI_HOB_CAPSULE_VOLUME));
+ if (Hob == NULL) {
+ return;
+ }
+
+ Hob->BaseAddress = BaseAddress;
+ Hob->Length = Length;
+}
+
+/**
+ Builds a HOB for the CPU.
+
+ This function builds a HOB for the CPU.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param SizeOfMemorySpace The maximum physical memory addressability of the processor.
+ @param SizeOfIoSpace The maximum physical I/O addressability of the processor.
+
+**/
+VOID
+EFIAPI
+BuildCpuHob (
+ IN UINT8 SizeOfMemorySpace,
+ IN UINT8 SizeOfIoSpace
+ )
+{
+ EFI_HOB_CPU *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_CPU, (UINT16) sizeof (EFI_HOB_CPU));
+ if (Hob == NULL) {
+ return;
+ }
+
+ Hob->SizeOfMemorySpace = SizeOfMemorySpace;
+ Hob->SizeOfIoSpace = SizeOfIoSpace;
+
+ //
+ // Zero the reserved space to match HOB spec
+ //
+ ZeroMem (Hob->Reserved, sizeof (Hob->Reserved));
+}
+
+/**
+ Builds a HOB for the Stack.
+
+ This function builds a HOB for the stack.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param BaseAddress The 64 bit physical address of the Stack.
+ @param Length The length of the stack in bytes.
+
+**/
+VOID
+EFIAPI
+BuildStackHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION_STACK *Hob;
+
+ ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
+ ((Length & (EFI_PAGE_SIZE - 1)) == 0));
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, (UINT16) sizeof (EFI_HOB_MEMORY_ALLOCATION_STACK));
+ if (Hob == NULL) {
+ return;
+ }
+
+ CopyGuid (&(Hob->AllocDescriptor.Name), &gEfiHobMemoryAllocStackGuid);
+ Hob->AllocDescriptor.MemoryBaseAddress = BaseAddress;
+ Hob->AllocDescriptor.MemoryLength = Length;
+ Hob->AllocDescriptor.MemoryType = EfiBootServicesData;
+
+ //
+ // Zero the reserved space to match HOB spec
+ //
+ ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob->AllocDescriptor.Reserved));
+}
+
+/**
+ Builds a HOB for the BSP store.
+
+ This function builds a HOB for BSP store.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param BaseAddress The 64 bit physical address of the BSP.
+ @param Length The length of the BSP store in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildBspStoreHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION_BSP_STORE *Hob;
+
+ ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
+ ((Length & (EFI_PAGE_SIZE - 1)) == 0));
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, (UINT16) sizeof (EFI_HOB_MEMORY_ALLOCATION_BSP_STORE));
+ if (Hob == NULL) {
+ return;
+ }
+
+ CopyGuid (&(Hob->AllocDescriptor.Name), &gEfiHobMemoryAllocBspStoreGuid);
+ Hob->AllocDescriptor.MemoryBaseAddress = BaseAddress;
+ Hob->AllocDescriptor.MemoryLength = Length;
+ Hob->AllocDescriptor.MemoryType = MemoryType;
+
+ //
+ // Zero the reserved space to match HOB spec
+ //
+ ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob->AllocDescriptor.Reserved));
+}
+
+/**
+ Builds a HOB for the memory allocation.
+
+ This function builds a HOB for the memory allocation.
+ It can only be invoked during PEI phase;
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
+
+ If there is no additional space for HOB creation, then ASSERT().
+
+ @param BaseAddress The 64 bit physical address of the memory.
+ @param Length The length of the memory allocation in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildMemoryAllocationHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION *Hob;
+
+ ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
+ ((Length & (EFI_PAGE_SIZE - 1)) == 0));
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, (UINT16) sizeof (EFI_HOB_MEMORY_ALLOCATION));
+ if (Hob == NULL) {
+ return;
+ }
+
+ ZeroMem (&(Hob->AllocDescriptor.Name), sizeof (EFI_GUID));
+ Hob->AllocDescriptor.MemoryBaseAddress = BaseAddress;
+ Hob->AllocDescriptor.MemoryLength = Length;
+ Hob->AllocDescriptor.MemoryType = MemoryType;
+ //
+ // Zero the reserved space to match HOB spec
+ //
+ ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob->AllocDescriptor.Reserved));
+}
diff --git a/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/PeiHobLib.uni b/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/PeiHobLib.uni Binary files differnew file mode 100644 index 0000000000..f5914167a8 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/PeiHobLib.uni diff --git a/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/PeiHobLibFramework.inf b/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/PeiHobLibFramework.inf new file mode 100644 index 0000000000..b10be00685 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiHobLibFramework/PeiHobLibFramework.inf @@ -0,0 +1,58 @@ +## @file
+# Instance of HOB Library using PEI Services.
+#
+# HOB Library implementation that uses PEI Services to retrieve the HOB List.
+# This library instance uses EFI_HOB_TYPE_CV defined in Intel framework HOB specification v0.9
+# to implement HobLib BuildCvHob() API.
+#
+# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiHobLib
+ MODULE_UNI_FILE = PeiHobLib.uni
+ FILE_GUID = B6684612-6F5D-425d-952C-F462792EC00B
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = HobLib|PEIM PEI_CORE SEC
+
+
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)
+#
+
+[Sources]
+ HobLib.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ PeiServicesLib
+ DebugLib
+
+[Guids]
+ gEfiHobMemoryAllocStackGuid ## SOMETIMES_PRODUCES ## HOB # MemoryAllocation StackHob
+ gEfiHobMemoryAllocBspStoreGuid ## SOMETIMES_PRODUCES ## HOB # MemoryAllocation BspStoreHob
+ gEfiHobMemoryAllocModuleGuid ## SOMETIMES_PRODUCES ## HOB # MemoryAllocation ModuleHob
+
+#
+# [Hob]
+# MEMORY_ALLOCATION ## SOMETIMES_PRODUCES
+# RESOURCE_DESCRIPTOR ## SOMETIMES_PRODUCES
+# FIRMWARE_VOLUME ## SOMETIMES_PRODUCES
+#
+
diff --git a/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/InternalSmbusLib.h b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/InternalSmbusLib.h new file mode 100644 index 0000000000..c6ea2dabf7 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/InternalSmbusLib.h @@ -0,0 +1,78 @@ +/** @file
+ Internal header file for Smbus library.
+
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _INTERNAL_SMBUS_LIB_H_
+#define _INTERNAL_SMBUS_LIB_H_
+
+
+#include <FrameworkPei.h>
+
+#include <Ppi/Smbus.h>
+
+#include <Library/SmbusLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+
+//
+// Declaration for internal functions
+//
+
+/**
+ Gets Smbus PPIs.
+
+ This internal function retrieves Smbus PPI from PPI database.
+
+ @param VOID
+
+ @return The pointer to Smbus PPI.
+
+**/
+EFI_PEI_SMBUS_PPI *
+InternalGetSmbusPpi (
+ VOID
+ );
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ This function provides a standard way to execute Smbus script
+ as defined in the SmBus Specification. The data can either be of
+ the Length byte, word, or a block of data.
+
+ @param SmbusOperation Signifies which particular SMBus hardware protocol instance that it will use to
+ execute the SMBus transactions.
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Length Signifies the number of bytes that this operation will do. The maximum number of
+ bytes can be revision specific and operation specific.
+ @param Buffer Contains the value of data to execute to the SMBus slave device. Not all operations
+ require this argument. The length of this buffer is identified by Length.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The actual number of bytes that are executed for this operation.
+
+**/
+UINTN
+InternalSmBusExec (
+ IN EFI_SMBUS_OPERATION SmbusOperation,
+ IN UINTN SmBusAddress,
+ IN UINTN Length,
+ IN OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+#endif
diff --git a/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLib.c b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLib.c new file mode 100644 index 0000000000..33d9096833 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLib.c @@ -0,0 +1,95 @@ +/** @file
+ Implementation of SmBusLib class library for PEI phase.
+
+Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "InternalSmbusLib.h"
+
+/**
+ Gets Smbus PPIs.
+
+ This internal function retrieves Smbus PPI from PPI database.
+ If gEfiPeiSmbusPpiGuid can not be located, then ASSERT()
+
+ @return The pointer to Smbus PPI.
+
+**/
+EFI_PEI_SMBUS_PPI *
+InternalGetSmbusPpi (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_SMBUS_PPI *SmbusPpi;
+
+ Status = PeiServicesLocatePpi (&gEfiPeiSmbusPpiGuid, 0, NULL, (VOID **) &SmbusPpi);
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (SmbusPpi != NULL);
+
+ return SmbusPpi;
+}
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ This function provides a standard way to execute Smbus script
+ as defined in the SmBus Specification. The data can either be of
+ the Length byte, word, or a block of data.
+
+ @param SmbusOperation Signifies which particular SMBus hardware protocol instance that it will use to
+ execute the SMBus transactions.
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Length Signifies the number of bytes that this operation will do. The maximum number of
+ bytes can be revision specific and operation specific.
+ @param Buffer Contains the value of data to execute to the SMBus slave device. Not all operations
+ require this argument. The length of this buffer is identified by Length.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The actual number of bytes that are executed for this operation..
+
+**/
+UINTN
+InternalSmBusExec (
+ IN EFI_SMBUS_OPERATION SmbusOperation,
+ IN UINTN SmBusAddress,
+ IN UINTN Length,
+ IN OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ EFI_PEI_SMBUS_PPI *SmbusPpi;
+ CONST EFI_PEI_SERVICES **PeiServices;
+ RETURN_STATUS ReturnStatus;
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ SmbusPpi = InternalGetSmbusPpi ();
+ SmbusDeviceAddress.SmbusDeviceAddress = SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress);
+
+ ReturnStatus = SmbusPpi->Execute (
+ (EFI_PEI_SERVICES **) PeiServices,
+ SmbusPpi,
+ SmbusDeviceAddress,
+ SMBUS_LIB_COMMAND (SmBusAddress),
+ SmbusOperation,
+ SMBUS_LIB_PEC (SmBusAddress),
+ &Length,
+ Buffer
+ );
+ if (Status != NULL) {
+ *Status = ReturnStatus;
+ }
+
+ return Length;
+}
diff --git a/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLibSmbusPpi.inf b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLibSmbusPpi.inf new file mode 100644 index 0000000000..d56d4d3fa9 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLibSmbusPpi.inf @@ -0,0 +1,53 @@ +## @file
+# SMBUS library that layers on top of the SMBUS PPI.
+#
+# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiSmbusLibSmbusPpi
+ MODULE_UNI_FILE = PeiSmbusLibSmbusPpi.uni
+ FILE_GUID = 51C4C059-67F0-4e3c-9A55-FF42A8291C8C
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SmbusLib|PEIM
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[Sources]
+ SmbusLib.c
+ PeiSmbusLib.c
+ InternalSmbusLib.h
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+
+[LibraryClasses]
+ BaseMemoryLib
+ PeiServicesLib
+ DebugLib
+ PeiServicesTablePointerLib
+
+[Ppis]
+ gEfiPeiSmbusPpiGuid ## CONSUMES
+
+[Depex]
+ gEfiPeiSmbusPpiGuid
diff --git a/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLibSmbusPpi.uni b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLibSmbusPpi.uni Binary files differnew file mode 100644 index 0000000000..6a4ae142d0 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/PeiSmbusLibSmbusPpi.uni diff --git a/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/SmbusLib.c b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/SmbusLib.c new file mode 100644 index 0000000000..40b482e392 --- /dev/null +++ b/Core/IntelFrameworkPkg/Library/PeiSmbusLibSmbusPpi/SmbusLib.c @@ -0,0 +1,470 @@ +/** @file
+Implementation of SmBusLib class library for PEI phase.
+
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: SmbusLib.c
+
+**/
+
+#include "InternalSmbusLib.h"
+
+/**
+ Executes an SMBUS quick read command.
+
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+VOID
+EFIAPI
+SmBusQuickRead (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusQuickRead, SmBusAddress, 0, NULL, Status);
+}
+
+/**
+ Executes an SMBUS quick write command.
+
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+VOID
+EFIAPI
+SmBusQuickWrite (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusQuickWrite, SmBusAddress, 0, NULL, Status);
+}
+
+/**
+ Executes an SMBUS receive byte command.
+
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ The byte received from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte received from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReceiveByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte, Status);
+
+ return Byte;
+}
+
+/**
+ Executes an SMBUS send byte command.
+
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.
+ The byte specified by Value is sent.
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to send.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusSendByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ Byte = Value;
+ InternalSmBusExec (EfiSmbusSendByte, SmBusAddress, 1, &Byte, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read data byte command.
+
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 8-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReadDataByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReadByte, SmBusAddress, 1, &Byte, Status);
+
+ return Byte;
+}
+
+/**
+ Executes an SMBUS write data byte command.
+
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.
+ The 8-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusWriteDataByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ Byte = Value;
+ InternalSmBusExec (EfiSmbusWriteByte, SmBusAddress, 1, &Byte, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read data word command.
+
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT16
+EFIAPI
+SmBusReadDataWord (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT16 Word;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReadWord, SmBusAddress, 2, &Word, Status);
+
+ return Word;
+}
+
+/**
+ Executes an SMBUS write data word command.
+
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT16
+EFIAPI
+SmBusWriteDataWord (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT16 Word;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ Word = Value;
+ InternalSmBusExec (EfiSmbusWriteWord, SmBusAddress, 2, &Word, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS process call command.
+
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value returned by the process call command is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The 16-bit value returned by the process call command.
+
+**/
+UINT16
+EFIAPI
+SmBusProcessCall (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusProcessCall, SmBusAddress, 2, &Value, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read block command.
+
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Bytes are read from the SMBUS and stored in Buffer.
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes read.
+
+**/
+UINTN
+EFIAPI
+SmBusReadBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 0x20, Buffer, Status);
+}
+
+/**
+ Executes an SMBUS write block command.
+
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from Buffer.
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusWriteBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINTN Length;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ Length = SMBUS_LIB_LENGTH (SmBusAddress);
+ return InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, Length, Buffer, Status);
+}
+
+/**
+ Executes an SMBUS block process call command.
+
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().
+ If WriteBuffer is NULL, then ASSERT().
+ If ReadBuffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.
+ @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusBlockProcessCall (
+ IN UINTN SmBusAddress,
+ IN VOID *WriteBuffer,
+ OUT VOID *ReadBuffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINTN Length;
+
+ ASSERT (WriteBuffer != NULL);
+ ASSERT (ReadBuffer != NULL);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);
+ ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
+
+ Length = SMBUS_LIB_LENGTH (SmBusAddress);
+ //
+ // Assuming that ReadBuffer is large enough to save another memory copy.
+ //
+ ReadBuffer = CopyMem (ReadBuffer, WriteBuffer, Length);
+ return InternalSmBusExec (EfiSmbusBWBRProcessCall, SmBusAddress, Length, ReadBuffer, Status);
+}
diff --git a/Core/IntelFrameworkPkg/License.txt b/Core/IntelFrameworkPkg/License.txt new file mode 100644 index 0000000000..be68999be6 --- /dev/null +++ b/Core/IntelFrameworkPkg/License.txt @@ -0,0 +1,25 @@ +Copyright (c) 2012, Intel Corporation. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
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