diff options
| author | Jeff Fan <jeff.fan@intel.com> | 2017-05-24 13:45:25 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-07-12 11:24:50 +0800 |
| commit | cd13f226532a2783557707852f59b22f2179a75b (patch) | |
| tree | 7e52a0f5dc5eb4c50ab9cddb7d7b432a3ac33eb1 /Core | |
| parent | 2437902888dd01f1e823afd3a686e277fd217223 (diff) | |
| download | edk2-platforms-cd13f226532a2783557707852f59b22f2179a75b.tar.xz | |
UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC enable
Current X2APIC is enabled in MpInitLib (used by CpuMpPei and CpuDxe) to follow
SDM suggestion. That means we only enable X2APIC if we found there are any
initial CPU ID value >= 255.
This patch is to provide one chance for platform to enable X2APIC even there is
no any initial CPU ID value >= 255.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
(cherry picked from commit 6661abb6953fcb6dafe4eee9ec741685ceb3a552)
Diffstat (limited to 'Core')
3 files changed, 77 insertions, 10 deletions
diff --git a/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h index aa6d1122b1..9a7afed105 100644 --- a/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h +++ b/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h @@ -798,6 +798,21 @@ C1eInitialize ( );
/**
+ Prepares for the data used by CPU feature detection and initialization.
+
+ @param[in] NumberOfProcessors The number of CPUs in the platform.
+
+ @return Pointer to a buffer of CPU related configuration data.
+
+ @note This service could be called by BSP only.
+**/
+VOID *
+EFIAPI
+X2ApicGetConfigData (
+ IN UINTN NumberOfProcessors
+ );
+
+/**
Detects if X2Apci feature supported on current processor.
Detect if X2Apci has been already enabled.
diff --git a/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c index 3390aa8f2a..793a0956d3 100644 --- a/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c +++ b/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c @@ -211,7 +211,7 @@ CpuCommonFeaturesLibConstructor ( if (IsCpuFeatureSupported (CPU_FEATURE_X2APIC)) {
Status = RegisterCpuFeature (
"X2Apic",
- NULL,
+ X2ApicGetConfigData,
X2ApicSupport,
X2ApicInitialize,
CPU_FEATURE_X2APIC,
diff --git a/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c b/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c index 9c2ad9ad31..b4a453c352 100644 --- a/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c +++ b/Core/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c @@ -15,6 +15,28 @@ #include "CpuCommonFeatures.h"
/**
+ Prepares for the data used by CPU feature detection and initialization.
+
+ @param[in] NumberOfProcessors The number of CPUs in the platform.
+
+ @return Pointer to a buffer of CPU related configuration data.
+
+ @note This service could be called by BSP only.
+**/
+VOID *
+EFIAPI
+X2ApicGetConfigData (
+ IN UINTN NumberOfProcessors
+ )
+{
+ BOOLEAN *ConfigData;
+
+ ConfigData = AllocateZeroPool (sizeof (BOOLEAN) * NumberOfProcessors);
+ ASSERT (ConfigData != NULL);
+ return ConfigData;
+}
+
+/**
Detects if X2Apci feature supported on current processor.
Detect if X2Apci has been already enabled.
@@ -40,7 +62,16 @@ X2ApicSupport ( IN VOID *ConfigData OPTIONAL
)
{
- return (GetApicMode () == LOCAL_APIC_MODE_X2APIC);
+ BOOLEAN *X2ApicEnabled;
+
+ ASSERT (ConfigData != NULL);
+ X2ApicEnabled = (BOOLEAN *) ConfigData;
+ //
+ // *ConfigData indicates if X2APIC enabled on current processor
+ //
+ X2ApicEnabled[ProcessorNumber] = (GetApicMode () == LOCAL_APIC_MODE_X2APIC) ? TRUE : FALSE;
+
+ return (CpuInfo->CpuIdVersionInfoEcx.Bits.x2APIC == 1);
}
/**
@@ -69,13 +100,34 @@ X2ApicInitialize ( IN BOOLEAN State
)
{
- PRE_SMM_CPU_REGISTER_TABLE_WRITE_FIELD (
- ProcessorNumber,
- Msr,
- MSR_IA32_APIC_BASE,
- MSR_IA32_APIC_BASE_REGISTER,
- Bits.EXTD,
- (State) ? 1 : 0
- );
+ BOOLEAN *X2ApicEnabled;
+
+ ASSERT (ConfigData != NULL);
+ X2ApicEnabled = (BOOLEAN *) ConfigData;
+ if (X2ApicEnabled[ProcessorNumber]) {
+ PRE_SMM_CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_APIC_BASE,
+ MSR_IA32_APIC_BASE_REGISTER,
+ Bits.EXTD,
+ 1
+ );
+ } else {
+ //
+ // Enable X2APIC mode only if X2APIC is not enabled,
+ // Needn't to disabe X2APIC mode again if X2APIC is not enabled
+ //
+ if (State) {
+ CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_APIC_BASE,
+ MSR_IA32_APIC_BASE_REGISTER,
+ Bits.EXTD,
+ 1
+ );
+ }
+ }
return RETURN_SUCCESS;
}
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