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authorLeahy, Leroy P <leroy.p.leahy@intel.com>2016-05-09 10:57:55 -0700
committerPrince Agyeman <prince.agyeman@intel.com>2016-05-10 10:13:40 -0700
commit24ca2f3507056e6a86cb0c0f088bba96cd117d71 (patch)
treef0d892a8e1c9945ba095a3a22958e2140111faca /CorebootModulePkg/Library
parentdeac23ab9678722c84c4ea0f70ff2bbbf04ff3aa (diff)
downloadedk2-platforms-24ca2f3507056e6a86cb0c0f088bba96cd117d71.tar.xz
CorebootPayloadPkg/PlatformBdsLib: Pass more serial parameters
Pass the serial port baudrate, register stride, input clock rate and ID from coreboot to CorebootPayloadPkg. Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Diffstat (limited to 'CorebootModulePkg/Library')
-rw-r--r--CorebootModulePkg/Library/CbParseLib/CbParseLib.c32
1 files changed, 25 insertions, 7 deletions
diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c
index 377abf3c67..7c81a51054 100644
--- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c
+++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c
@@ -33,7 +33,7 @@
@return the UNIT64 value after convertion.
**/
-UINT64
+UINT64
cb_unpack64 (
IN struct cbuint64 val
)
@@ -469,12 +469,12 @@ CbParseFadtInfo (
}
DEBUG ((EFI_D_INFO, "Reset Value 0x%x\n", Fadt->ResetValue));
- if (pPmEvtReg != NULL) {
+ if (pPmEvtReg != NULL) {
*pPmEvtReg = Fadt->Pm1aEvtBlk;
DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
}
- if (pPmGpeEnReg != NULL) {
+ if (pPmGpeEnReg != NULL) {
*pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
}
@@ -519,15 +519,15 @@ CbParseFadtInfo (
*pResetValue = Fadt->ResetValue;
DEBUG ((EFI_D_ERROR, "Reset Value 0x%x\n", Fadt->ResetValue));
- if (pPmEvtReg != NULL) {
+ if (pPmEvtReg != NULL) {
*pPmEvtReg = Fadt->Pm1aEvtBlk;
DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
}
- if (pPmGpeEnReg != NULL) {
+ if (pPmGpeEnReg != NULL) {
*pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
- }
+ }
return RETURN_SUCCESS;
}
}
@@ -541,7 +541,10 @@ CbParseFadtInfo (
@param pRegBase Pointer to the base address of serial port registers
@param pRegAccessType Pointer to the access type of serial port registers
+ @param pRegWidth Pointer to the register width in bytes
@param pBaudrate Pointer to the serial port baudrate
+ @param pInputHertz Pointer to the input clock frequency
+ @param pUartPciAddr Pointer to the UART PCI bus, dev and func address
@retval RETURN_SUCCESS Successfully find the serial port information.
@retval RETURN_NOT_FOUND Failed to find the serial port information .
@@ -551,7 +554,10 @@ RETURN_STATUS
CbParseSerialInfo (
OUT UINT32 *pRegBase,
OUT UINT32 *pRegAccessType,
- OUT UINT32 *pBaudrate
+ OUT UINT32 *pRegWidth,
+ OUT UINT32 *pBaudrate,
+ OUT UINT32 *pInputHertz,
+ OUT UINT32 *pUartPciAddr
)
{
struct cb_serial *CbSerial;
@@ -569,6 +575,10 @@ CbParseSerialInfo (
*pRegBase = CbSerial->baseaddr;
}
+ if (pRegWidth != NULL) {
+ *pRegWidth = CbSerial->regwidth;
+ }
+
if (pRegAccessType != NULL) {
*pRegAccessType = CbSerial->type;
}
@@ -577,6 +587,14 @@ CbParseSerialInfo (
*pBaudrate = CbSerial->baud;
}
+ if (pInputHertz != NULL) {
+ *pInputHertz = CbSerial->input_hertz;
+ }
+
+ if (pUartPciAddr != NULL) {
+ *pUartPciAddr = CbSerial->uart_pci_addr;
+ }
+
return RETURN_SUCCESS;
}