diff options
author | Leahy, Leroy P <leroy.p.leahy@intel.com> | 2016-05-09 10:57:55 -0700 |
---|---|---|
committer | Prince Agyeman <prince.agyeman@intel.com> | 2016-05-10 10:13:40 -0700 |
commit | 24ca2f3507056e6a86cb0c0f088bba96cd117d71 (patch) | |
tree | f0d892a8e1c9945ba095a3a22958e2140111faca /CorebootPayloadPkg | |
parent | deac23ab9678722c84c4ea0f70ff2bbbf04ff3aa (diff) | |
download | edk2-platforms-24ca2f3507056e6a86cb0c0f088bba96cd117d71.tar.xz |
CorebootPayloadPkg/PlatformBdsLib: Pass more serial parameters
Pass the serial port baudrate, register stride, input clock rate and
ID from coreboot to CorebootPayloadPkg.
Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Diffstat (limited to 'CorebootPayloadPkg')
4 files changed, 71 insertions, 5 deletions
diff --git a/CorebootPayloadPkg/Library/PlatformBdsLib/BdsPlatform.c b/CorebootPayloadPkg/Library/PlatformBdsLib/BdsPlatform.c index ef6a1b26ca..c0a2b19645 100644 --- a/CorebootPayloadPkg/Library/PlatformBdsLib/BdsPlatform.c +++ b/CorebootPayloadPkg/Library/PlatformBdsLib/BdsPlatform.c @@ -78,6 +78,10 @@ PlatformBdsInit ( VOID
)
{
+ gUartDeviceNode.BaudRate = PcdGet64 (PcdUartDefaultBaudRate); + gUartDeviceNode.DataBits = PcdGet8 (PcdUartDefaultDataBits); + gUartDeviceNode.Parity = PcdGet8 (PcdUartDefaultParity); + gUartDeviceNode.StopBits = PcdGet8 (PcdUartDefaultStopBits); }
@@ -786,6 +790,7 @@ PlatformBdsPolicyBehavior ( DEBUG ((EFI_D_INFO, "PlatformBdsPolicyBehavior\n"));
+ PlatformBdsInit(); ConnectRootBridge ();
//
diff --git a/CorebootPayloadPkg/Library/PlatformBdsLib/PlatformBdsLib.inf b/CorebootPayloadPkg/Library/PlatformBdsLib/PlatformBdsLib.inf index 9c102721d5..b1a79b866c 100644 --- a/CorebootPayloadPkg/Library/PlatformBdsLib/PlatformBdsLib.inf +++ b/CorebootPayloadPkg/Library/PlatformBdsLib/PlatformBdsLib.inf @@ -45,6 +45,12 @@ DebugLib
PcdLib
GenericBdsLib
+ PlatformHookLib + [Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits diff --git a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c index 8449997050..b1cfb8e2c0 100644 --- a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c +++ b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c @@ -14,10 +14,23 @@ #include <Base.h>
#include <Uefi/UefiBaseType.h>
+#include <Library/PciLib.h> #include <Library/PlatformHookLib.h>
#include <Library/CbParseLib.h>
#include <Library/PcdLib.h>
+typedef struct { + UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries. + UINT16 DeviceId; ///< Device ID to match the PCI device + UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz + UINT64 Offset; ///< The byte offset into to the BAR + UINT8 BarIndex; ///< Which BAR to get the UART base address + UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte. + UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. + UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. + UINT8 Reserved[2]; +} PCI_SERIAL_PARAMETER; + /**
Performs platform specific initialization required for the CPU to access
the hardware associated with a SerialPortLib instance. This function does
@@ -38,8 +51,16 @@ PlatformHookSerialPortInitialize ( RETURN_STATUS Status;
UINT32 SerialRegBase;
UINT32 SerialRegAccessType;
+ UINT32 BaudRate; + UINT32 RegWidth; + UINT32 InputHertz; + UINT32 PayloadParam; + UINT32 DeviceVendor; + PCI_SERIAL_PARAMETER *SerialParam; - Status = CbParseSerialInfo (&SerialRegBase, &SerialRegAccessType, NULL);
+ Status = CbParseSerialInfo (&SerialRegBase, &SerialRegAccessType, + &RegWidth, &BaudRate, &InputHertz, + &PayloadParam); if (RETURN_ERROR (Status)) {
return Status;
}
@@ -57,6 +78,34 @@ PlatformHookSerialPortInitialize ( return Status;
}
+ Status = PcdSet32S (PcdSerialRegisterStride, RegWidth); + if (RETURN_ERROR (Status)) { + return Status; + } + + Status = PcdSet32S (PcdSerialBaudRate, BaudRate); + if (RETURN_ERROR (Status)) { + return Status; + } + + Status = PcdSet64S (PcdUartDefaultBaudRate, BaudRate); + if (RETURN_ERROR (Status)) { + return Status; + } + + Status = PcdSet32S (PcdSerialClockRate, InputHertz); + if (RETURN_ERROR (Status)) { + return Status; + } + + if (PayloadParam >= 0x80000000) { + DeviceVendor = PciRead32 (PayloadParam & 0x0ffff000); + SerialParam = PcdGetPtr(PcdPciSerialParameters); + SerialParam->VendorId = (UINT16)DeviceVendor; + SerialParam->DeviceId = DeviceVendor >> 16; + SerialParam->ClockRate = InputHertz; + SerialParam->RegisterStride = (UINT8)RegWidth; + } + return RETURN_SUCCESS;
}
-
diff --git a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf index e5db75fa95..3230105901 100644 --- a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf +++ b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf @@ -19,6 +19,7 @@ MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = PlatformHookLib
+ CONSTRUCTOR = PlatformHookSerialPortInitialize [Sources]
PlatformHookLib.c
@@ -26,6 +27,7 @@ [LibraryClasses]
CbParseLib
PcdLib
+ PciLib [Packages]
MdePkg/MdePkg.dec
@@ -33,6 +35,10 @@ CorebootModulePkg/CorebootModulePkg.dec
[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## PRODUCES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## PRODUCES
-
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## PRODUCES + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters ## PRODUCES |