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authorjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2008-11-23 23:55:02 +0000
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2008-11-23 23:55:02 +0000
commit8e53d24672edba2361b05e6e9046358b199f10b5 (patch)
tree2d8818aea4c49d73d74680256ebf09c33a9d5aed /DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
parentd4f59c13fb89ef9d679be640ff3c6b19393829b0 (diff)
downloadedk2-platforms-8e53d24672edba2361b05e6e9046358b199f10b5.tar.xz
Resolved several warnings generated by GCC.
In PcatPciRootBridge.c -> GetPciExpressBaseAddressForRootBridge, fixed a hang condition if the PCI Express Base Address HOB is not present. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6684 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c')
-rw-r--r--DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
index 92dd1c3d24..9edbc698bc 100644
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
@@ -1,6 +1,6 @@
/*++
-Copyright (c) 2005 - 2006, Intel Corporation
+Copyright (c) 2005 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -608,7 +608,7 @@ ScanPciRootBridgeForRoms(
mPciOptionRomTableInstalled = TRUE;
}
- Status = IoDev->Configuration(IoDev, &Descriptors);
+ Status = IoDev->Configuration(IoDev, (VOID **)&Descriptors);
if (EFI_ERROR (Status) || Descriptors == NULL) {
return EFI_NOT_FOUND;
}
@@ -632,7 +632,7 @@ ScanPciRootBridgeForRoms(
//
// Find Memory Descriptors that are less than 4GB, so the PPB Memory Window can be used for downstream devices
//
- if (Descriptors->AddrRangeMax < 0x100000000) {
+ if (Descriptors->AddrRangeMax < 0x100000000ULL) {
//
// Find the largest Non-Prefetchable Memory Descriptor that is less than 4GB
//
@@ -679,7 +679,7 @@ ScanPciRootBridgeForRoms(
Status = gBS->AllocatePool(
EfiBootServicesData,
sizeof(UINT16) * (MaxBus - MinBus + 1) * (PCI_MAX_DEVICE+1) * (PCI_MAX_FUNC+1),
- &Context.CommandRegisterBuffer
+ (VOID **)&Context.CommandRegisterBuffer
);
if (EFI_ERROR (Status)) {