diff options
| author | qwang12 <qwang12@6f19259b-4bc3-4df7-8a09-765794883524> | 2008-07-21 14:01:55 +0000 |
|---|---|---|
| committer | qwang12 <qwang12@6f19259b-4bc3-4df7-8a09-765794883524> | 2008-07-21 14:01:55 +0000 |
| commit | 34a6b78805305fe2e18ade9f64ffc8487ab7b236 (patch) | |
| tree | 71d6cf511bbcbf825f92a37dd22f2efffdf1bad2 /EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib | |
| parent | 7acc6db7c87ec822915bd1bf2e4deed6aea1eb13 (diff) | |
| download | edk2-platforms-34a6b78805305fe2e18ade9f64ffc8487ab7b236.tar.xz | |
Inline ASM in .c file is specific to MS tool-chain. Other tool-chain (such as Intel compiler) may not support it. Add in .asm files to make these function to be built by Assembler so that they are avaliable too for other tool-chain.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5540 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib')
| -rw-r--r-- | EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.asm | 202 |
1 files changed, 202 insertions, 0 deletions
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.asm b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.asm new file mode 100644 index 0000000000..e9c9f54710 --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.asm @@ -0,0 +1,202 @@ +;/*++
+;
+;Copyright (c) 2006, Intel Corporation
+;All rights reserved. This program and the accompanying materials
+;are licensed and made available under the terms and conditions of the BSD License
+;which accompanies this distribution. The full text of the license may be found at
+;http://opensource.org/licenses/bsd-license.php
+;
+;THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;Module Name:
+;
+; CpuIA32.c
+;
+;Abstract:
+;
+;--*/
+
+;#include "CpuIA32.h"
+
+;---------------------------------------------------------------------------
+ .586p
+ .model flat,C
+ .code
+
+;---------------------------------------------------------------------------
+;VOID
+;EfiHalt (
+; VOID
+;)
+EfiHalt PROC C PUBLIC
+ hlt
+ ret
+EfiHalt ENDP
+
+;VOID
+;EfiWbinvd (
+; VOID
+;)
+EfiWbinvd PROC C PUBLIC
+ wbinvd
+ ret
+EfiWbinvd ENDP
+
+;VOID
+;EfiInvd (
+; VOID
+;)
+EfiInvd PROC C PUBLIC
+ invd
+ ret
+EfiInvd ENDP
+
+;VOID
+;EfiCpuid (IN UINT32 RegisterInEax,
+; OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
+EfiCpuid PROC C PUBLIC
+ push ebp
+ mov ebp, esp
+ push ebx
+ push esi
+ push edi
+ pushad
+
+ mov eax, dword ptr[ebp + 8] ;egisterInEax
+ cpuid
+ cmp dword ptr[ebp + 0Ch], 0 ; Reg
+ je @F
+ mov edi,dword ptr [ebp+0Ch] ; Reg
+
+ mov dword ptr [edi],eax ; Reg->RegEax
+ mov dword ptr [edi+4],ebx ; Reg->RegEbx
+ mov dword ptr [edi+8],ecx ; Reg->RegEcx
+ mov dword ptr [edi+0Ch],edx ; Reg->RegEdx
+
+@@:
+ popad
+ pop edi
+ pop esi
+ pop ebx
+ pop ebp
+
+ ret
+EfiCpuid ENDP
+
+
+;UINT64
+;EfiReadMsr (
+; IN UINT32 Index
+; );
+EfiReadMsr PROC C PUBLIC
+ mov ecx, dword ptr [esp + 4]; Index
+ rdmsr
+ ret
+EfiReadMsr ENDP
+
+;VOID
+;EfiWriteMsr (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+EfiWriteMsr PROC C PUBLIC
+ mov ecx, dword ptr [esp+4]; Index
+ mov eax, dword ptr [esp+8]; DWORD PTR Value[0]
+ mov edx, dword ptr [esp+0Ch]; DWORD PTR Value[4]
+ wrmsr
+ ret
+EfiWriteMsr ENDP
+
+;UINT64
+;EfiReadTsc (
+; VOID
+; )
+EfiReadTsc PROC C PUBLIC
+ rdtsc
+ ret
+EfiReadTsc ENDP
+
+;VOID
+;EfiDisableCache (
+; VOID
+;)
+EfiDisableCache PROC C PUBLIC
+ mov eax, cr0
+ bswap eax
+ and al, 60h
+ cmp al, 60h
+ je @F
+ mov eax, cr0
+ or eax, 060000000h
+ mov cr0, eax
+ wbinvd
+@@:
+ ret
+EfiDisableCache ENDP
+
+;VOID
+;EfiEnableCache (
+; VOID
+; )
+EfiEnableCache PROC C PUBLIC
+ invd
+ mov eax, cr0
+ and eax, 09fffffffh
+ mov cr0, eax
+ ret
+EfiEnableCache ENDP
+
+;UINT32
+;EfiGetEflags (
+; VOID
+; )
+EfiGetEflags PROC C PUBLIC
+ pushfd
+ pop eax
+ ret
+EfiGetEflags ENDP
+
+;VOID
+;EfiDisableInterrupts (
+; VOID
+; )
+EfiDisableInterrupts PROC C PUBLIC
+ cli
+ ret
+EfiDisableInterrupts ENDP
+
+;VOID
+;EfiEnableInterrupts (
+; VOID
+; )
+EfiEnableInterrupts PROC C PUBLIC
+ sti
+ ret
+EfiEnableInterrupts ENDP
+
+;VOID
+;EfiCpuidExt (
+; IN UINT32 RegisterInEax,
+; IN UINT32 CacheLevel,
+; OUT EFI_CPUID_REGISTER *Regs
+; )
+EfiCpuidExt PROC C PUBLIC USES ebx edi esi
+ pushad
+
+ mov eax, dword ptr [esp + 30h] ; RegisterInEax
+ mov ecx, dword ptr [esp + 34h] ; CacheLevel
+ cpuid
+ mov edi, dword ptr [esp + 38h] ; DWORD PTR Regs
+
+ mov dword ptr [edi], eax ; Reg->RegEax
+ mov dword ptr [edi + 4], ebx ; Reg->RegEbx
+ mov dword ptr [edi + 8], ecx ; Reg->RegEcx
+ mov dword ptr [edi + 0Ch], edx ; Reg->RegEdx
+
+ popad
+ ret
+EfiCpuidExt ENDP
+
+ END
+
|