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| author | Jiewen Yao <jiewen.yao@intel.com> | 2016-06-17 10:38:09 +0800 |
|---|---|---|
| committer | Hao Wu <hao.a.wu@intel.com> | 2016-07-05 11:17:31 +0800 |
| commit | 9612b7c0a5f42c61fe0f7c4dee57571d04b0ac33 (patch) | |
| tree | eb35e781cac7194782664d4f2bc978be87254ede /IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c | |
| parent | 0e1ea6cfaac78f96285d4f2f4dc060330d61a755 (diff) | |
| download | edk2-platforms-9612b7c0a5f42c61fe0f7c4dee57571d04b0ac33.tar.xz | |
IntelFsp2WrapperPkg: Add support to handle ResetRequired return Status from FSP.
As per FSP 2.0 spec, FSP shall not trigger system reset and instead it
shall return from the FSP API to the BL/Wrapper with the required reset
type. The changes are to handle the ResetRequired return code from FSP
APIs and provide lib interface for platform to trigger the actual reset.
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
(cherry picked from commit f862a3b6f9dc026ea0e108fd548c65c75346bada)
Diffstat (limited to 'IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c')
| -rw-r--r-- | IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c index 30c06b88bf..0797f44a68 100644 --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c @@ -22,6 +22,7 @@ #include <Library/BaseMemoryLib.h>
#include <Library/UefiLib.h>
#include <Library/FspWrapperApiLib.h>
+#include <Library/FspWrapperPlatformLib.h>
#include <Library/PerformanceLib.h>
#include <Library/HobLib.h>
@@ -93,6 +94,15 @@ OnPciEnumerationComplete ( PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x6000);
Status = CallFspNotifyPhase (&NotifyPhaseParams);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x607F);
+
+ //
+ // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
+ //
+ if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {
+ DEBUG((DEBUG_INFO, "FSP NotifyPhase AfterPciEnumeration requested reset 0x%x\n", Status));
+ CallFspWrapperResetSystem ((UINT32)Status);
+ }
+
if (Status != EFI_SUCCESS) {
DEBUG((DEBUG_ERROR, "FSP NotifyPhase AfterPciEnumeration failed, status: 0x%x\n", Status));
} else {
@@ -130,6 +140,15 @@ OnReadyToBoot ( PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x4000);
Status = CallFspNotifyPhase (&NotifyPhaseParams);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x407F);
+
+ //
+ // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
+ //
+ if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {
+ DEBUG((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot requested reset 0x%x\n", Status));
+ CallFspWrapperResetSystem ((UINT32)Status);
+ }
+
if (Status != EFI_SUCCESS) {
DEBUG((DEBUG_ERROR, "FSP NotifyPhase ReadyToBoot failed, status: 0x%x\n", Status));
} else {
@@ -179,6 +198,15 @@ OnEndOfFirmware ( PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x2000);
Status = CallFspNotifyPhase (&NotifyPhaseParams);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x207F);
+
+ //
+ // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
+ //
+ if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {
+ DEBUG((DEBUG_INFO, "FSP NotifyPhase EndOfFirmware requested reset 0x%x\n", Status));
+ CallFspWrapperResetSystem ((UINT32)Status);
+ }
+
if (Status != EFI_SUCCESS) {
DEBUG((DEBUG_ERROR, "FSP NotifyPhase EndOfFirmware failed, status: 0x%x\n", Status));
} else {
|