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author | Hao Wu <hao.a.wu@intel.com> | 2017-02-15 16:04:26 +0800 |
---|---|---|
committer | Hao Wu <hao.a.wu@intel.com> | 2017-03-06 14:33:23 +0800 |
commit | bcee1b9f172a606b1c4ee86dcda04c15718c4ed9 (patch) | |
tree | a21cc325469cb4fe46e44aa641c9a11e98aad80f /IntelFspWrapperPkg/FspNotifyDxe | |
parent | d953f4f1ae9cce2c09cd71aa3e2a2cb2283b33fa (diff) | |
download | edk2-platforms-bcee1b9f172a606b1c4ee86dcda04c15718c4ed9.tar.xz |
IntelFspWrapperPkg: Refine casting expression result to bigger size
There are cases that the operands of an expression are all with rank less
than UINT64/INT64 and the result of the expression is explicitly cast to
UINT64/INT64 to fit the target size.
An example will be:
UINT32 a,b;
// a and b can be any unsigned int type with rank less than UINT64, like
// UINT8, UINT16, etc.
UINT64 c;
c = (UINT64) (a + b);
Some static code checkers may warn that the expression result might
overflow within the rank of "int" (integer promotions) and the result is
then cast to a bigger size.
The commit refines codes by the following rules:
1). When the expression is possible to overflow the range of unsigned int/
int:
c = (UINT64)a + b;
2). When the expression will not overflow within the rank of "int", remove
the explicit type casts:
c = a + b;
3). When the expression will be cast to pointer of possible greater size:
UINT32 a,b;
VOID *c;
c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b);
4). When one side of a comparison expression contains only operands with
rank less than UINT32:
UINT8 a;
UINT16 b;
UINTN c;
if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...}
For rule 4), if we remove the 'UINTN' type cast like:
if (a + b > c) {...}
The VS compiler will complain with warning C4018 (signed/unsigned
mismatch, level 3 warning) due to promoting 'a + b' to type 'int'.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'IntelFspWrapperPkg/FspNotifyDxe')
-rw-r--r-- | IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c b/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c index 6f06e24cae..089413cc3e 100644 --- a/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c +++ b/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c @@ -1,6 +1,6 @@ /** @file
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -115,7 +115,7 @@ RelocateImageUnder4GIfNeeded ( // Align buffer on section boundary
//
ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;
- ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)(ImageContext.SectionAlignment - 1));
+ ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)ImageContext.SectionAlignment - 1);
//
// Load the image to our new buffer
//
|