diff options
| author | Feng Tian <feng.tian@intel.com> | 2016-11-30 13:14:23 +0800 |
|---|---|---|
| committer | Feng Tian <feng.tian@intel.com> | 2016-12-02 08:58:23 +0800 |
| commit | d9077743b67c03061edbb7ce25e29087702694b8 (patch) | |
| tree | 56323f5f181e0d34ed5fa9893a5299f0d3371030 /MdeModulePkg/Bus/Pci/EhciDxe | |
| parent | 12547a99edd1adfc047e05434a20119f20cb6172 (diff) | |
| download | edk2-platforms-d9077743b67c03061edbb7ce25e29087702694b8.tar.xz | |
MdeModulePkg/Ehci: don't clear port status bits during init
Port status bits are clear in original code, so no enumeration
takes place.
Changing this to prevent the status bits from being cleared
allows enumeration to proceed normally.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Mike Turner <Michael.Turner@microsoft.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mike Turner <Michael.Turner@microsoft.com>
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'MdeModulePkg/Bus/Pci/EhciDxe')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c index 88a66aee71..3a6ed02be7 100644 --- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c +++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c @@ -591,6 +591,7 @@ EhcInitHC ( {
EFI_STATUS Status;
UINT32 Index;
+ UINT32 RegVal;
// This ASSERT crashes the BeagleBoard. There is some issue in the USB stack.
// This ASSERT needs to be removed so the BeagleBoard will boot. When we fix
@@ -626,7 +627,14 @@ EhcInitHC ( //
if (Ehc->HcStructParams & HCSP_PPC) {
for (Index = 0; Index < (UINT8) (Ehc->HcStructParams & HCSP_NPORTS); Index++) {
- EhcSetOpRegBit (Ehc, (UINT32) (EHC_PORT_STAT_OFFSET + (4 * Index)), PORTSC_POWER);
+ //
+ // Do not clear port status bits on initialization. Otherwise devices will
+ // not enumerate properly at startup.
+ //
+ RegVal = EhcReadOpReg(Ehc, (UINT32)(EHC_PORT_STAT_OFFSET + (4 * Index)));
+ RegVal &= ~PORTSC_CHANGE_MASK;
+ RegVal |= PORTSC_POWER;
+ EhcWriteOpReg (Ehc, (UINT32) (EHC_PORT_STAT_OFFSET + (4 * Index)), RegVal);
}
}
|