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| author | Olivier Martin <olivier.martin@arm.com> | 2013-07-18 07:21:35 +0000 |
|---|---|---|
| committer | niruiyu <niruiyu@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-07-18 07:21:35 +0000 |
| commit | ea8d98fa9f862ba533448983f81a79e4e71008f5 (patch) | |
| tree | e07968e211b798db01883feeb5890eea7aaa3508 /MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | |
| parent | 591fb3781aa5947ab05332463a22d3f660714fec (diff) | |
| download | edk2-platforms-ea8d98fa9f862ba533448983f81a79e4e71008f5.tar.xz | |
The PCI host bridge can signal failures in its initialization to
the PCI Bus driver through the function call NotifyPhase().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14483 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 28 |
1 files changed, 22 insertions, 6 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c index 9e1184e00a..a5cea9e52a 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c @@ -759,7 +759,11 @@ PciHostBridgeResourceAllocator ( //
// Notify pci bus driver starts to program the resource
//
- NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources);
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
RootBridgeDev = NULL;
@@ -898,9 +902,9 @@ PciHostBridgeResourceAllocator ( //
// Notify the resource allocation phase is to end
//
- NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation);
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation);
- return EFI_SUCCESS;
+ return Status;
}
/**
@@ -1443,7 +1447,11 @@ PciHostBridgeEnumerator ( //
// Notify the bus allocation phase is about to start
//
- NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
DEBUG((EFI_D_INFO, "PCI Bus First Scanning\n"));
RootBridgeHandle = NULL;
@@ -1531,7 +1539,11 @@ PciHostBridgeEnumerator ( //
// Notify the bus allocation phase is about to start for the 2nd time
//
- NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
DEBUG((EFI_D_INFO, "PCI Bus Second Scanning\n"));
RootBridgeHandle = NULL;
@@ -1569,7 +1581,11 @@ PciHostBridgeEnumerator ( //
// Notify the resource allocation phase is to start
//
- NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation);
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
|