diff options
| author | eric_tian <eric_tian@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-09-14 05:26:09 +0000 |
|---|---|---|
| committer | eric_tian <eric_tian@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-09-14 05:26:09 +0000 |
| commit | 3af875e2209cc43c8d14a75061eebde7bd91b198 (patch) | |
| tree | f251e2b2bc50850fdfcdddbc2295e5e1e12a246a /MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h | |
| parent | ef12a160dea622228b1e489ef28e8812a07b1f84 (diff) | |
| download | edk2-platforms-3af875e2209cc43c8d14a75061eebde7bd91b198.tar.xz | |
In various archs, Processor memory address may not be same with Pci memory address. For usb host controller, we should use pci memory address to initialize framelist register and all address field in QH/TD.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9259 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h b/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h index 70e7f377de..d89e2713ad 100644 --- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h +++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h @@ -97,14 +97,14 @@ struct _UHCI_TD_SW { /**
Link the TD To QH.
+ @param Uhc The UHCI device.
@param Qh The queue head for the TD to link to.
@param Td The TD to link.
- @return None.
-
**/
VOID
UhciLinkTdToQh (
+ IN USB_HC_DEV *Uhc,
IN UHCI_QH_SW *Qh,
IN UHCI_TD_SW *Td
);
@@ -212,8 +212,10 @@ UhciCreateQh ( @param Uhc The UHCI device.
@param DeviceAddr The device address.
@param DataPktId Packet Identification of Data Tds.
- @param Request A pointer to request structure buffer to transfer.
- @param Data A pointer to user data buffer to transfer.
+ @param Request A pointer to cpu memory address of request structure buffer to transfer.
+ @param RequestPhy A pointer to pci memory address of request structure buffer to transfer.
+ @param Data A pointer to cpu memory address of user data buffer to transfer.
+ @param DataPhy A pointer to pci memory address of user data buffer to transfer.
@param DataLen Length of user data to transfer.
@param MaxPacket Maximum packet size for control transfer.
@param IsLow Full speed or low speed.
@@ -227,7 +229,9 @@ UhciCreateCtrlTds ( IN UINT8 DeviceAddr,
IN UINT8 DataPktId,
IN UINT8 *Request,
+ IN UINT8 *RequestPhy,
IN UINT8 *Data,
+ IN UINT8 *DataPhy,
IN UINTN DataLen,
IN UINT8 MaxPacket,
IN BOOLEAN IsLow
@@ -241,7 +245,8 @@ UhciCreateCtrlTds ( @param DevAddr Address of Device.
@param EndPoint Endpoint Number.
@param PktId Packet Identification of Data Tds.
- @param Data A pointer to user data buffer to transfer.
+ @param Data A pointer to cpu memory address of user data buffer to transfer.
+ @param DataPhy A pointer to pci memory address of user data buffer to transfer.
@param DataLen Length of user data to transfer.
@param DataToggle Data Toggle Pointer.
@param MaxPacket Maximum packet size for Bulk/Interrupt transfer.
@@ -257,6 +262,7 @@ UhciCreateBulkOrIntTds ( IN UINT8 EndPoint,
IN UINT8 PktId,
IN UINT8 *Data,
+ IN UINT8 *DataPhy,
IN UINTN DataLen,
IN OUT UINT8 *DataToggle,
IN UINT8 MaxPacket,
|