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authorvanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524>2007-10-25 07:59:45 +0000
committervanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524>2007-10-25 07:59:45 +0000
commit68246fa809e4a8ab61ce7bbfdd1a0b31d03e83fb (patch)
tree0725e1e638d299d3e103eebbe622bd740bb5ef43 /MdeModulePkg/Bus/Pci/UhciDxe
parentc9a0a0fcf18a9b99fb3522ad0a775fffc32c0e71 (diff)
downloadedk2-platforms-68246fa809e4a8ab61ce7bbfdd1a0b31d03e83fb.tar.xz
Save original PCI attributes in start() function and restore it in Stop() for those PCI device drivers.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4212 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus/Pci/UhciDxe')
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c70
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h11
2 files changed, 52 insertions, 29 deletions
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
index 36ce1bd4fe..82142b6a85 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
@@ -82,7 +82,7 @@ UhciReset (
default:
goto ON_INVAILD_PARAMETER;
}
-
+
//
// Delete all old transactions on the USB bus, then
// reinitialize the frame list
@@ -92,13 +92,13 @@ UhciReset (
UhciInitFrameList (Uhc);
gBS->RestoreTPL (OldTpl);
-
+
return EFI_SUCCESS;
ON_INVAILD_PARAMETER:
-
+
gBS->RestoreTPL (OldTpl);
-
+
return EFI_INVALID_PARAMETER;
}
@@ -213,7 +213,7 @@ UhciSetState (
UsbCmd |= USBCMD_FGR;
UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);
}
-
+
//
// wait 20ms to let resume complete (20ms is specified by UHCI spec)
//
@@ -237,7 +237,7 @@ UhciSetState (
Status = EFI_DEVICE_ERROR;
goto ON_EXIT;
}
-
+
//
// Set Enter Global Suspend Mode bit to 1.
//
@@ -1941,7 +1941,8 @@ ON_EXIT:
STATIC
USB_HC_DEV *
UhciAllocateDev (
- IN EFI_PCI_IO_PROTOCOL *PciIo
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT64 OriginalPciAttributes
)
{
USB_HC_DEV *Uhc;
@@ -1990,8 +1991,9 @@ UhciAllocateDev (
Uhc->Usb2Hc.MajorRevision = 0x1;
Uhc->Usb2Hc.MinorRevision = 0x1;
- Uhc->PciIo = PciIo;
- Uhc->MemPool = UsbHcInitMemPool (PciIo, TRUE, 0);
+ Uhc->PciIo = PciIo;
+ Uhc->OriginalPciAttributes = OriginalPciAttributes;
+ Uhc->MemPool = UsbHcInitMemPool (PciIo, TRUE, 0);
if (Uhc->MemPool == NULL) {
Status = EFI_OUT_OF_RESOURCES;
@@ -2068,7 +2070,6 @@ UhciCleanDevUp (
)
{
USB_HC_DEV *Uhc;
- UINT64 Supports;
//
// Uninstall the USB_HC and USB_HC2 protocol, then disable the controller
@@ -2090,20 +2091,16 @@ UhciCleanDevUp (
UhciFreeAllAsyncReq (Uhc);
UhciDestoryFrameList (Uhc);
-
- Uhc->PciIo->Attributes (
- Uhc->PciIo,
- EfiPciIoAttributeOperationSupported,
- 0,
- &Supports
- );
- Supports &= EFI_PCI_DEVICE_ENABLE;
+
+ //
+ // Restore original PCI attributes
+ //
Uhc->PciIo->Attributes (
- Uhc->PciIo,
- EfiPciIoAttributeOperationDisable,
- Supports,
- NULL
- );
+ Uhc->PciIo,
+ EfiPciIoAttributeOperationSet,
+ Uhc->OriginalPciAttributes,
+ NULL
+ );
UhciFreeDev (Uhc);
}
@@ -2135,6 +2132,7 @@ UhciDriverBindingStart (
EFI_PCI_IO_PROTOCOL *PciIo;
USB_HC_DEV *Uhc;
UINT64 Supports;
+ UINT64 OriginalPciAttributes;
//
// Open PCIIO, then enable the EHC device and turn off emulation
@@ -2153,6 +2151,20 @@ UhciDriverBindingStart (
return Status;
}
+ //
+ // Save original PCI attributes
+ //
+ Status = PciIo->Attributes (
+ PciIo,
+ EfiPciIoAttributeOperationGet,
+ 0,
+ &OriginalPciAttributes
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
UhciTurnOffUsbEmulation (PciIo);
Status = PciIo->Attributes (
@@ -2175,7 +2187,7 @@ UhciDriverBindingStart (
goto CLOSE_PCIIO;
}
- Uhc = UhciAllocateDev (PciIo);
+ Uhc = UhciAllocateDev (PciIo, OriginalPciAttributes);
if (Uhc == NULL) {
Status = EFI_OUT_OF_RESOURCES;
@@ -2250,6 +2262,16 @@ FREE_UHC:
UhciFreeDev (Uhc);
CLOSE_PCIIO:
+ //
+ // Restore original PCI attributes
+ //
+ PciIo->Attributes (
+ PciIo,
+ EfiPciIoAttributeOperationSet,
+ OriginalPciAttributes,
+ NULL
+ );
+
gBS->CloseProtocol (
Controller,
&gEfiPciIoProtocolGuid,
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
index cd92f6dd84..e47679515b 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
@@ -59,28 +59,28 @@ enum {
// UHCI register operation timeout, set by experience
//
UHC_GENERIC_TIMEOUT = UHC_1_SECOND,
-
+
//
// Wait for force global resume(FGR) complete, refers to
// specification[UHCI11-2.1.1]
- //
+ //
UHC_FORCE_GLOBAL_RESUME_STALL = 20 * UHC_1_MILLISECOND,
//
// Wait for roothub port reset and recovery, reset stall
- // is set by experience, and recovery stall refers to
+ // is set by experience, and recovery stall refers to
// specification[UHCI11-2.1.1]
//
UHC_ROOT_PORT_RESET_STALL = 50 * UHC_1_MILLISECOND,
UHC_ROOT_PORT_RECOVERY_STALL = 10 * UHC_1_MILLISECOND,
//
- // Sync and Async transfer polling interval, set by experience,
+ // Sync and Async transfer polling interval, set by experience,
// and the unit of Async is 100us.
//
UHC_SYNC_POLL_INTERVAL = 50 * UHC_1_MICROSECOND,
UHC_ASYNC_POLL_INTERVAL = 50 * 10000UL,
-
+
//
// UHC raises TPL to TPL_NOTIFY to serialize all its operations
// to protect shared data structures.
@@ -117,6 +117,7 @@ struct _USB_HC_DEV {
EFI_USB_HC_PROTOCOL UsbHc;
EFI_USB2_HC_PROTOCOL Usb2Hc;
EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 OriginalPciAttributes;
//
// Schedule data structures