diff options
| author | Star Zeng <star.zeng@intel.com> | 2014-09-15 09:33:16 +0000 |
|---|---|---|
| committer | lzeng14 <lzeng14@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-09-15 09:33:16 +0000 |
| commit | 04910ceb352b54fe8edac4c20d9a6515cd5fdad5 (patch) | |
| tree | a2f7966b46cf4b3804ba373abca863809f5c39aa /MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c | |
| parent | c4a7d20890eb3002926ec669fb229cea3b3528fb (diff) | |
| download | edk2-platforms-04910ceb352b54fe8edac4c20d9a6515cd5fdad5.tar.xz | |
MdeModulePkg XhciPei/UsbBusPei: Enhance code for better device compatibility.
1. Add delay after set device address and get configuration descriptor.
2. Sync the change at R15876 in XhciDxe to do not access transfer ring when endpoint is isochronous type or control type.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16105 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c | 32 |
1 files changed, 26 insertions, 6 deletions
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c index dde31e0f1a..8e768bc470 100644 --- a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c @@ -1706,7 +1706,12 @@ XhcPeiSetConfigCmd ( InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
- break;
+ //
+ // Do not support isochronous transfer now.
+ //
+ DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd: Unsupport ISO EP found, Transfer ring is not allocated.\n"));
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
+ continue;
case USB_ENDPOINT_INTERRUPT:
if (Direction == EfiUsbDataIn) {
InputContext->EP[Dci-1].CErr = 3;
@@ -1744,9 +1749,14 @@ XhcPeiSetConfigCmd ( break;
case USB_ENDPOINT_CONTROL:
+ //
+ // Do not support control transfer now.
+ //
+ DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd: Unsupport Control EP found, Transfer ring is not allocated.\n"));
default:
- ASSERT (FALSE);
- break;
+ DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd: Unknown EP found, Transfer ring is not allocated.\n"));
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
+ continue;
}
PhyAddr = UsbHcGetPciAddrForHostAddr (
@@ -1899,7 +1909,12 @@ XhcPeiSetConfigCmd64 ( InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
- break;
+ //
+ // Do not support isochronous transfer now.
+ //
+ DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd64: Unsupport ISO EP found, Transfer ring is not allocated.\n"));
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
+ continue;
case USB_ENDPOINT_INTERRUPT:
if (Direction == EfiUsbDataIn) {
InputContext->EP[Dci-1].CErr = 3;
@@ -1937,9 +1952,14 @@ XhcPeiSetConfigCmd64 ( break;
case USB_ENDPOINT_CONTROL:
+ //
+ // Do not support control transfer now.
+ //
+ DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd64: Unsupport Control EP found, Transfer ring is not allocated.\n"));
default:
- ASSERT (0);
- break;
+ DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd64: Unknown EP found, Transfer ring is not allocated.\n"));
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
+ continue;
}
PhyAddr = UsbHcGetPciAddrForHostAddr (
|